mirror of
https://github.com/TwilitRealm/dusklight
synced 2026-06-10 12:22:12 -04:00
added computeSurfaceInfo from decaf for NextPow2 padded mips in GTX
This commit is contained in:
Lurs
@@ -40,6 +40,7 @@
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#include <algorithm>
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#include <cstring>
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#include <bit>
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namespace dusk::tphd::addrlib {
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@@ -70,6 +71,16 @@ static u32 Log2(u32 v) {
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return r;
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}
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static constexpr bool IsPow2(u32 v) { return v != 0 && (v & (v - 1)) == 0; }
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static constexpr u32 NextPow2(u32 v) {
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return v <= 1 ? 1u : std::bit_ceil(v);
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}
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static constexpr u32 PowTwoAlign(u32 v, u32 align) {
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return (v + align - 1) & ~(align - 1);
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}
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// ---- Tile-mode classification ---------------------------------------------
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static u32 ComputeSurfaceThickness(TileMode tm) {
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@@ -432,4 +443,249 @@ std::vector<u8> deswizzle(const SurfaceDesc& desc, std::span<const u8> tiledByte
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return linear;
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}
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// R600AddrLib::ConvertToNonBankSwappedMode (r600addrlib.cpp:355)
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static TileMode ConvertToNonBankSwappedMode(TileMode tm) {
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switch (tm) {
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case TileMode::Tiled2BThin1: return TileMode::Tiled2DThin1;
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case TileMode::Tiled2BThin2: return TileMode::Tiled2DThin2;
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case TileMode::Tiled2BThin4: return TileMode::Tiled2DThin4;
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case TileMode::Tiled2BThick: return TileMode::Tiled2DThick;
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case TileMode::Tiled3BThin1: return TileMode::Tiled3DThin1;
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case TileMode::Tiled3BThick: return TileMode::Tiled3DThick;
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default: return tm;
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}
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}
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// R600AddrLib::ComputeSurfaceMipLevelTileMode (r600addrlib.cpp:544).
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static TileMode ComputeSurfaceMipLevelTileMode(TileMode baseTileMode,
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u32 bpp,
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u32 level,
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u32 width,
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u32 height,
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u32 numSamples,
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bool noRecursive) {
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// ComputeSurfaceTileSlices == 1 for our case (numSamples=1, thin).
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// HwlDegradeThickTileMode is identity for thin tiles.
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TileMode tileMode = baseTileMode;
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const u32 rotation = ComputeSurfaceRotationFromTileMode(tileMode);
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if ((rotation % kPipes) == 0) {
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switch (tileMode) {
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case TileMode::Tiled3DThin1: tileMode = TileMode::Tiled2DThin1; break;
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case TileMode::Tiled3DThick: tileMode = TileMode::Tiled2DThick; break;
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case TileMode::Tiled3BThin1: tileMode = TileMode::Tiled2BThin1; break;
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case TileMode::Tiled3BThick: tileMode = TileMode::Tiled2BThick; break;
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default: break;
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}
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}
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if (noRecursive || level == 0) {
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return tileMode;
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}
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if (bpp == 96 || bpp == 48 || bpp == 24) bpp /= 3;
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width = NextPow2(width);
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height = NextPow2(height);
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tileMode = ConvertToNonBankSwappedMode(tileMode);
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const u32 thickness = ComputeSurfaceThickness(tileMode);
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const u32 microTileBytes = BITS_TO_BYTES(thickness * bpp * 64);
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const u32 widthAlignFactor = (microTileBytes <= kPipeInterleaveBytes)
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? (kPipeInterleaveBytes / microTileBytes) : 1u;
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u32 macroTileWidth = 8 * kBanks;
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u32 macroTileHeight = 8 * kPipes;
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switch (tileMode) {
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case TileMode::Tiled2DThin1:
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case TileMode::Tiled3DThin1:
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if (width < widthAlignFactor * macroTileWidth || height < macroTileHeight) {
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tileMode = TileMode::Tiled1DThin1;
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}
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break;
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case TileMode::Tiled2DThin2:
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macroTileWidth >>= 1; macroTileHeight *= 2;
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if (width < widthAlignFactor * macroTileWidth || height < macroTileHeight) {
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tileMode = TileMode::Tiled1DThin1;
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}
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break;
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case TileMode::Tiled2DThin4:
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macroTileWidth >>= 2; macroTileHeight *= 4;
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if (width < widthAlignFactor * macroTileWidth || height < macroTileHeight) {
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tileMode = TileMode::Tiled1DThin1;
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}
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break;
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case TileMode::Tiled2DThick:
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case TileMode::Tiled3DThick:
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if (width < widthAlignFactor * macroTileWidth || height < macroTileHeight) {
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tileMode = TileMode::Tiled1DThick;
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}
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break;
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default: break;
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}
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// numSlices < 4 collapse — our textures are all 2D (slices=1), so the
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// Thick→Thin demote always fires when we hit a thick mode.
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if (tileMode == TileMode::Tiled1DThick) tileMode = TileMode::Tiled1DThin1;
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else if (tileMode == TileMode::Tiled2DThick) tileMode = TileMode::Tiled2DThin1;
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else if (tileMode == TileMode::Tiled3DThick) tileMode = TileMode::Tiled3DThin1;
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return ComputeSurfaceMipLevelTileMode(tileMode, bpp, level, width, height,
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numSamples, /*noRecursive*/ true);
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}
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// R600AddrLib::ComputeSurfaceAlignmentsMicrotiled (r600addrlib.cpp:714).
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static void ComputeAlignmentsMicroTiled(TileMode tileMode, u32 bpp, u32 numSamples,
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u32& pitchAlign, u32& heightAlign) {
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if (bpp == 96 || bpp == 48 || bpp == 24) bpp /= 3;
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const u32 thickness = ComputeSurfaceThickness(tileMode);
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const u32 pitchAlignment = kPipeInterleaveBytes / bpp / numSamples / thickness;
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pitchAlign = std::max<u32>(8u, pitchAlignment);
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heightAlign = 8;
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// AdjustPitchAlignment is no-op without flags.display.
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}
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// R600AddrLib::ComputeSurfaceAlignmentsMacrotiled (r600addrlib.cpp:805).
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static void ComputeAlignmentsMacroTiled(TileMode tileMode, u32 bpp, u32 numSamples,
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u32& pitchAlign, u32& heightAlign,
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u32& macroTileWidth, u32& macroTileHeight) {
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const u32 aspectRatio = (tileMode == TileMode::Tiled2DThin2 ||
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tileMode == TileMode::Tiled2BThin2) ? 2u
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: (tileMode == TileMode::Tiled2DThin4 ||
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tileMode == TileMode::Tiled2BThin4) ? 4u : 1u;
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const u32 thickness = ComputeSurfaceThickness(tileMode);
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if (bpp == 96 || bpp == 48 || bpp == 24) bpp /= 3;
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if (bpp == 3) bpp = 1;
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macroTileWidth = 8 * kBanks / aspectRatio;
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macroTileHeight = aspectRatio * 8 * kPipes;
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pitchAlign = std::max<u32>(macroTileWidth,
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macroTileWidth * (kPipeInterleaveBytes / bpp / (8 * thickness) / numSamples));
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heightAlign = macroTileHeight;
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// IsDualBaseAlignNeeded is R6XX-only -> false here; baseAlign branch skipped.
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}
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// AddrLib::PadDimensions (addrlib.cpp:433), simplified: no cube, no slice padding.
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static void PadDimensions(TileMode /*tm*/, u32& pitch, u32 pitchAlign,
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u32& height, u32 heightAlign, u32 padDims) {
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if (padDims == 0) padDims = 3;
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if (IsPow2(pitchAlign)) {
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pitch = PowTwoAlign(pitch, pitchAlign);
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} else {
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pitch = ((pitch + pitchAlign - 1) / pitchAlign) * pitchAlign;
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}
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if (padDims > 1) {
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height = PowTwoAlign(height, heightAlign);
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}
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}
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// R600AddrLib::ComputeSurfaceInfoMicroTiled (r600addrlib.cpp:969).
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static void ComputeSurfaceInfoMicroTiled(u32 width, u32 height, u32 numSamples, u32 bpp,
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TileMode tileMode, u32 mipLevel, SurfaceInfoOut& out) {
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u32 pitch = width;
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u32 h = height;
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if (mipLevel) {
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pitch = NextPow2(pitch);
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h = NextPow2(h);
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// numSlices < 4 / thick collapse: no thick at this point for our flow.
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}
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u32 pitchAlign = 0, heightAlign = 0;
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ComputeAlignmentsMicroTiled(tileMode, bpp, numSamples, pitchAlign, heightAlign);
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PadDimensions(tileMode, pitch, pitchAlign, h, heightAlign, /*padDims*/ 0);
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out.pitch = pitch;
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out.height = height;
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out.heightAligned = h;
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out.tileMode = tileMode;
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}
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// R600AddrLib::ComputeSurfaceInfoMacroTiled (r600addrlib.cpp:1198).
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static void ComputeSurfaceInfoMacroTiled(u32 width, u32 height, u32 numSamples, u32 bpp,
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TileMode tileMode, TileMode baseTileMode,
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u32 mipLevel, SurfaceInfoOut& out) {
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u32 pitch = width;
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u32 h = height;
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if (mipLevel) {
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pitch = NextPow2(pitch);
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h = NextPow2(h);
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}
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u32 pitchAlignBase = 0, heightAlignBase = 0, mwBase = 0, mhBase = 0;
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if (tileMode != baseTileMode && mipLevel != 0 &&
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IsThickMacroTiled(baseTileMode) && !IsThickMacroTiled(tileMode)) {
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ComputeAlignmentsMacroTiled(baseTileMode, bpp, numSamples,
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pitchAlignBase, heightAlignBase, mwBase, mhBase);
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const u32 pitchAlignFactor = std::max<u32>(1u, (kPipeInterleaveBytes >> 3) / bpp);
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if (pitch < (pitchAlignBase * pitchAlignFactor) || h < heightAlignBase) {
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ComputeSurfaceInfoMicroTiled(width, height, numSamples, bpp,
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TileMode::Tiled1DThin1, mipLevel, out);
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return;
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}
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}
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u32 pitchAlign = 0, heightAlign = 0, macroWidth = 0, macroHeight = 0;
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ComputeAlignmentsMacroTiled(tileMode, bpp, numSamples,
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pitchAlign, heightAlign, macroWidth, macroHeight);
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const u32 bankSwappedWidth = ComputeSurfaceBankSwappedWidth(tileMode, bpp, numSamples, pitch);
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pitchAlign = std::max(pitchAlign, bankSwappedWidth);
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// IsDualPitchAlignNeeded is R6XX-only -> false here.
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PadDimensions(tileMode, pitch, pitchAlign, h, heightAlign, /*padDims*/ 0);
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out.pitch = pitch;
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out.height = height;
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out.heightAligned = h;
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out.tileMode = tileMode;
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}
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void computeSurfaceInfo(const SurfaceInfoIn& in, SurfaceInfoOut& out) {
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// AddrLib::ComputeMipLevel + R600AddrLib::HwlComputeMipLevel: align BCN
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// base dims to 4 pixels; for mipLevel>0, reduce dims and NextPow2 them.
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u32 width = in.width;
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u32 height = in.height;
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if (in.isBcn && in.mipLevel == 0) {
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width = PowTwoAlign(width, 4u);
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height = PowTwoAlign(height, 4u);
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}
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if (in.mipLevel > 0) {
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width = std::max(1u, width >> in.mipLevel);
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height = std::max(1u, height >> in.mipLevel);
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width = NextPow2(width);
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height = NextPow2(height);
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}
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if (in.isBcn) {
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width = (width + 3) / 4;
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height = (height + 3) / 4;
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}
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const u32 numSamples = 1;
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const TileMode demoted = ComputeSurfaceMipLevelTileMode(in.tileMode, in.bpp,
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in.mipLevel, width, height,
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numSamples, /*noRecursive*/ false);
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out.width = width;
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out.height = height;
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out.tileMode = demoted;
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switch (demoted) {
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case TileMode::LinearGeneral:
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case TileMode::LinearAligned: {
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// ComputeSurfaceInfoLinear
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const u32 pa = std::max<u32>(64u, kPipeInterleaveBytes / in.bpp / numSamples);
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u32 pitch = width, h = height;
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if (in.mipLevel) { pitch = NextPow2(pitch); h = NextPow2(h); }
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PadDimensions(demoted, pitch, pa, h, 1u, /*padDims*/ 0);
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out.pitch = pitch; out.heightAligned = h;
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break;
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}
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case TileMode::Tiled1DThin1:
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case TileMode::Tiled1DThick:
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ComputeSurfaceInfoMicroTiled(width, height, numSamples, in.bpp,
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demoted, in.mipLevel, out);
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break;
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default:
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ComputeSurfaceInfoMacroTiled(width, height, numSamples, in.bpp,
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demoted, in.tileMode, in.mipLevel, out);
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break;
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}
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}
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} // namespace dusk::tphd::addrlib
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@@ -52,6 +52,27 @@ struct SurfaceDesc {
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// Deswizzle a single surface mip level into a row-major linear buffer.
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std::vector<u8> deswizzle(const SurfaceDesc& desc, std::span<const u8> tiledBytes);
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struct SurfaceInfoIn {
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u32 width; // pixels at mip 0 (caller supplies surface base dims)
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u32 height; // pixels at mip 0
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u32 bpp; // bits per pixel (e.g. 32 for RGBA8). For BCN, bits per
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// 4x4 block (64 for BC1, 128 for BC3/5).
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u32 mipLevel; // 0 = base, 1..N = mip
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TileMode tileMode;
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bool isBcn;
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};
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struct SurfaceInfoOut {
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u32 width; // possibly NextPow2'd / block-converted dim used for
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// the address computation (BCN blocks if isBcn)
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u32 height; // similar
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u32 pitch; // aligned pitch used by deswizzle (block units if BCN)
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u32 heightAligned;
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TileMode tileMode; // possibly demoted (2D→1D for small mips)
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};
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void computeSurfaceInfo(const SurfaceInfoIn& in, SurfaceInfoOut& out);
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} // namespace dusk::tphd::addrlib
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#endif
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@@ -324,36 +324,25 @@ MipLevelDesc mipLevelDesc(const GtxSurface& s, u32 level, bool isBcn, u32 bpp) {
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MipLevelDesc d{};
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d.width = std::max(1u, s.width >> level);
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d.height = std::max(1u, s.height >> level);
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d.tileMode = static_cast<addrlib::TileMode>(s.tileMode);
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if (level == 0) {
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d.pitch = s.pitch;
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d.pitch = s.pitch;
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d.tileMode = static_cast<addrlib::TileMode>(s.tileMode);
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return d;
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}
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// Mirror decaf's widthAlignFactor: when one microtile is smaller than
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// the pipe interleave (256 B), the demote threshold scales up.
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const u32 microTileBytes = (bpp * 64u) / 8u;
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const u32 widthAlignFactor = (microTileBytes <= 256u) ? (256u / microTileBytes) : 1u;
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if (d.tileMode == addrlib::TileMode::Tiled2DThin1 ||
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d.tileMode == addrlib::TileMode::Tiled2BThin1) {
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const u32 demoteWidth = widthAlignFactor * 32u;
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const u32 wElem = isBcn ? (d.width + 3u) / 4u : d.width;
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const u32 hElem = isBcn ? (d.height + 3u) / 4u : d.height;
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if (wElem < demoteWidth || hElem < 16u) {
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d.tileMode = addrlib::TileMode::Tiled1DThin1;
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}
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}
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const bool is1D = (d.tileMode == addrlib::TileMode::Tiled1DThin1 ||
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d.tileMode == addrlib::TileMode::Tiled1DThick);
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const u32 alignment = is1D ? (8u * widthAlignFactor) : 32u;
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const u32 pixelsPerBlock = isBcn ? 4u : 1u;
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const u32 widthInBlock = (d.width + pixelsPerBlock - 1u) / pixelsPerBlock;
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u32 levelPitch = ((widthInBlock + alignment - 1u) / alignment) * alignment;
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d.pitch = std::max(1u, levelPitch);
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const addrlib::SurfaceInfoIn si{
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.width = s.width,
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.height = s.height,
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.bpp = bpp,
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.mipLevel = level,
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.tileMode = static_cast<addrlib::TileMode>(s.tileMode),
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.isBcn = isBcn,
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};
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addrlib::SurfaceInfoOut so{};
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addrlib::computeSurfaceInfo(si, so);
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d.pitch = so.pitch; // block units for BCN, pixel units for plain.
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d.tileMode = so.tileMode;
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return d;
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}
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