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https://git.eden-emu.dev/eden-emu/eden
synced 2026-10-21 17:03:00 -04:00
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2 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 589ea324e6 | |||
| 989768aa46 |
@@ -57,8 +57,21 @@ u32 HardwareComposer::ComposeLocked(f32* out_speed_scale, Display& display,
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// Set default speed limit to 100%.
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*out_speed_scale = 1.0f;
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// If no layers are visible, skip the logic. Acquiring and holding buffers here would
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// consume the producer's queue without ever presenting.
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bool any_visible = false;
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for (auto& layer : display.stack.layers) {
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if (layer->visible) {
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any_visible = true;
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break;
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}
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}
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if (!any_visible) {
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return 1;
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}
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// Wait for the previous composite, bounding the number of in-flight composites.
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nvdisp.WaitForComposite();
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this->ReleaseFramebuffersLocked(display);
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// Determine the number of vsync periods to wait before composing again.
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std::optional<s32> swap_interval{};
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@@ -152,6 +165,13 @@ u32 HardwareComposer::ComposeLocked(f32* out_speed_scale, Display& display,
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// Advance by 1 frame (60 FPS compositing)
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m_frame_number += 1;
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// Release framebuffers once the frame has been handed to the compositor. This happens
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// within the same vsync period as the acquire (release_frame_number is checked against
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// the advanced counter), so the producer gets its buffers back immediately instead of
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// losing a queue slot for a whole frame.
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// TODO: support release fences; releasing before the composite has finished can tear.
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this->ReleaseFramebuffersLocked(display);
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return 1;
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}
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@@ -447,7 +447,9 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
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driver_id == VK_DRIVER_ID_AMD_OPEN_SOURCE ||
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driver_id == VK_DRIVER_ID_MESA_RADV ||
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driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS ||
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driver_id == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA,
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driver_id == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA ||
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driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY ||
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driver_id == VK_DRIVER_ID_MESA_TURNIP,
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.has_broken_spirv_clamp = driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS,
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.has_broken_spirv_position_input = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
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