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https://github.com/open-goal/jak-project
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Hat Kid
117 lines
3.5 KiB
Common Lisp
117 lines
3.5 KiB
Common Lisp
;;-*-Lisp-*-
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(in-package goal)
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;; name: timer-h.gc
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;; name in dgo: timer-h
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;; dgos: GAME
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#|@file
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There are two sources for timing:
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- EE TIMER1, used for the frame profiler. There are 9765 counts of this per frame. It gets reset in drawable.
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- The "stopwatch" system, used for reading the CPU clock cycle counter, at 300 MHz (32-bit)
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|#
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;; The Emotion Engine has 4 hardware timers, timer1 is used as the
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(defconstant TIMER0_BANK (the timer-bank #x10000000)) ;; has HOLD register!
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(defconstant TIMER1_BANK (the timer-bank #x10000800)) ;; has HOLD register!
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(defconstant TIMER2_BANK (the timer-bank #x10001000)) ;; does NOT have HOLD register!
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(defconstant TIMER3_BANK (the timer-bank #x10001800)) ;; does NOT have HOLD register!
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; PC Port Timer
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(defmacro get-cpu-clock ()
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"Read the 300 MHz clock."
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;; __read-ee-timer is a 300 MHz timer from the C Kernel.
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;; it's a real timer.
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`(the uint (logand #xffffffff (__read-ee-timer)))
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)
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(defmacro get-bus-clock/256 ()
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"Read the 150 MHz / 256 clock."
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;; 300 MHz / (2^9)
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`(the uint (logand #xffffffff (shr (__read-ee-timer) 9)))
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)
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(#when PC_PORT
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;; the bus clock can be reset, which just stores the current count here.
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(define *timer-reset-value* (the uint 0))
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)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Timer HW
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(defenum timer-clock-selection
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:type uint8
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(busclk 0)
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(busclk/16 1)
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(busclk/256 2)
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(hblank 3)
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)
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;; DECOMP BEGINS
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(deftype timer-mode (uint32)
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"This matches the Tn_MODE register structure of the ps2 EE timers.
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Only the lower 32 bits of these registers are usable, and the upper 16 hardwired to zero."
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((clks timer-clock-selection :offset 0 :size 2)
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(gate uint8 :offset 2 :size 1)
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(gats uint8 :offset 3 :size 1)
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(gatm uint8 :offset 4 :size 2)
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(zret uint8 :offset 6 :size 1)
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(cue uint8 :offset 7 :size 1)
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(cmpe uint8 :offset 8 :size 1)
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(ovfe uint8 :offset 9 :size 1)
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(equf uint8 :offset 10 :size 1)
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(ovff uint8 :offset 11 :size 1)
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)
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)
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(deftype timer-bank (structure)
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"This matches an EE timer (without a HOLD register, timers 2 and 3).
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Each register is 128-bits wide, but only the lower 32-bits are usable, and the upper
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16-bits of that are hardwired to zero."
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((count uint32)
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(mode timer-mode :offset 16)
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(comp uint32 :offset 32)
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)
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)
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(deftype timer-hold-bank (timer-bank)
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"This matches an EE timer (with a HOLD register, timers 0 and 1)."
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((hold uint32 :offset 48)
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)
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)
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(deftype stopwatch (basic)
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"Stopwatches are used to measure CPU clock cycles.
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They don't use the timer above, but instead the Count COP0 register,
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which counts CPU clock cycles directly."
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((prev-time-elapsed time-frame)
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(start-time time-frame)
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(begin-level int32)
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)
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)
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;; Confusing! What IS this measuring exactly? Hmm...
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;; this is set by default for NTSC, it will later be changed if PAL.
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(define *ticks-per-frame* (/ 2500000 256)) ;; 2 500 000 / 256 = 9765
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(defun timer-init ((arg0 timer-bank) (arg1 timer-mode))
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"Initiate a timer, start counting at a rate of 1 every 256 bus clocks (BUSCLK: ~147.456MHz)."
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(set! (-> arg0 mode) arg1)
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(set! (-> arg0 count) (the-as uint 0))
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0
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)
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;; og:preserve-this
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;; needs PS2 TIMER porting
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(#unless PC_PORT
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(timer-init (the-as timer-bank TIMER1_BANK) (new 'static 'timer-mode :clks (timer-clock-selection busclk/16) :cue 1))
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)
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