mirror/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

drm/xe/vf: Add proper detection of the SR-IOV VF mode

Browse Source 
SR-IOV VF mode detection is based on testing VF capability bit on
the register that is accessible from both the PF and enabled VFs.

Bspec: 49904, 53227
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240327182740.407-4-michal.wajdeczko@intel.com
This commit is contained in:
Michal Wajdeczko
2024-03-27 19:27:40 +01:00
parent d79c88c45d
commit 0613834f3d
2 changed files with 18 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/xe/regs/xe_sriov_regs.h
View File

@@ -14,4 +14,7 @@
#define LMEM_EN REG_BIT(31)
#define LMTT_DIR_PTR REG_GENMASK(30, 0) /* in multiples of 64KB */
#define VF_CAP_REG XE_REG(0x1901f8, XE_REG_OPTION_VF)
#define VF_CAP REG_BIT(0)
#endif

17
drivers/gpu/drm/xe/xe_sriov.c
View File

@@ -5,7 +5,11 @@
#include <drm/drm_managed.h>
#include "regs/xe_sriov_regs.h"
#include "xe_assert.h"
#include "xe_device.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
/**
@@ -28,6 +32,13 @@ const char *xe_sriov_mode_to_string(enum xe_sriov_mode mode)
}
}
static bool test_is_vf(struct xe_device *xe)
{
u32 value = xe_mmio_read32(xe_root_mmio_gt(xe), VF_CAP_REG);
return value & VF_CAP;
}
/**
* xe_sriov_probe_early - Probe a SR-IOV mode.
* @xe: the &xe_device to probe mode on
@@ -44,8 +55,10 @@ void xe_sriov_probe_early(struct xe_device *xe)
enum xe_sriov_mode mode = XE_SRIOV_MODE_NONE;
bool has_sriov = xe->info.has_sriov;
/* TODO: replace with proper mode detection */
xe_assert(xe, !has_sriov);
if (has_sriov) {
if (test_is_vf(xe))
mode = XE_SRIOV_MODE_VF;
}
xe_assert(xe, !xe->sriov.__mode);
xe->sriov.__mode = mode;