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ARM: dts: stm32: add DCMIPP pinctrl on STM32MP13x SoC family

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Adds DCMIPP pinctrl support and assigns dedicated GPIO pins.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Alain Volmat
2024-04-26 17:05:24 +02:00
committed by Alexandre Torgue
parent 9c8d852dab
commit 0948424cd5
1 changed files with 33 additions and 0 deletions
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33
arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
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@@ -13,6 +13,39 @@
};
};
dcmipp_pins_a: dcmi-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
<STM32_PINMUX('G', 9, AF13)>,/* DCMI_VSYNC */
<STM32_PINMUX('B', 7, AF14)>,/* DCMI_PIXCLK */
<STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */
<STM32_PINMUX('D', 0, AF13)>,/* DCMI_D1 */
<STM32_PINMUX('G', 10, AF13)>,/* DCMI_D2 */
<STM32_PINMUX('E', 4, AF13)>,/* DCMI_D3 */
<STM32_PINMUX('D', 11, AF14)>,/* DCMI_D4 */
<STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
<STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
<STM32_PINMUX('E', 14, AF13)>;/* DCMI_D7 */
bias-disable;
};
};
dcmipp_sleep_pins_a: dcmi-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
<STM32_PINMUX('G', 9, ANALOG)>,/* DCMI_VSYNC */
<STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_PIXCLK */
<STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */
<STM32_PINMUX('D', 0, ANALOG)>,/* DCMI_D1 */
<STM32_PINMUX('G', 10, ANALOG)>,/* DCMI_D2 */
<STM32_PINMUX('E', 4, ANALOG)>,/* DCMI_D3 */
<STM32_PINMUX('D', 11, ANALOG)>,/* DCMI_D4 */
<STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
<STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
<STM32_PINMUX('E', 14, ANALOG)>;/* DCMI_D7 */
};
};
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */