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arm64: dts: qcom: sm6375: Add UART1

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Add UART1 node, generally used for the Bluetooth module.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20230927-topic-6375_stuff-v1-1-12243e36b45c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Konrad Dybcio
2023-09-27 11:21:40 +02:00
committed by Bjorn Andersson
parent 0e2f2c506f
commit 1529f6a43c
1 changed files with 43 additions and 0 deletions
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43
arch/arm64/boot/dts/qcom/sm6375.dtsi
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@@ -896,6 +896,36 @@
drive-strength = <6>;
bias-disable;
};
qup_uart1_default: qup-uart1-default-state {
cts-pins {
pins = "gpio61";
function = "qup01";
drive-strength = <2>;
bias-pull-down;
};
rts-pins {
pins = "gpio62";
function = "qup01";
drive-strength = <2>;
bias-disable;
};
tx-pins {
pins = "gpio63";
function = "qup01";
drive-strength = <2>;
bias-disable;
};
rx-pins {
pins = "gpio64";
function = "qup01";
drive-strength = <2>;
bias-pull-up;
};
};
};
gcc: clock-controller@1400000 {
@@ -1111,6 +1141,19 @@
status = "disabled";
};
uart1: serial@4a84000 {
compatible = "qcom,geni-uart";
reg = <0x0 0x04a84000 0x0 0x4000>;
interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
clock-names = "se";
power-domains = <&rpmpd SM6375_VDDCX>;
operating-points-v2 = <&qup_opp_table>;
pinctrl-0 = <&qup_uart1_default>;
pinctrl-names = "default";
status = "disabled";
};
i2c2: i2c@4a88000 {
compatible = "qcom,geni-i2c";
reg = <0x0 0x04a88000 0x0 0x4000>;