ASoC: SOF: Intel: byt: prepare split between Baytrail and Merrifield
Atom devices are split in ACPI (Baytrail/Cherrytrail) and PCI (Merrifield) cases. In preparation for a split between the two parts and the use of a common module, rename functions with the atom_ prefix when appropriate and remove explicit BYT_ prefix for common definitions. This patch should not change any functionality. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <bard.liao@intel.com> Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Link: https://lore.kernel.org/r/20210505170235.306797-2-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
committed by
Mark Brown
parent
3f0d23e849
commit
1c5ab2dc75
@@ -50,11 +50,11 @@
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#define SSP5_OFFSET 0x0a6000
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#define SSP_SIZE 0x100
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#define BYT_STACK_DUMP_SIZE 32
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#define STACK_DUMP_SIZE 32
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#define BYT_PCI_BAR_SIZE 0x200000
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#define PCI_BAR_SIZE 0x200000
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#define BYT_PANIC_OFFSET(x) (((x) & GENMASK_ULL(47, 32)) >> 32)
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#define PANIC_OFFSET(x) (((x) & GENMASK_ULL(47, 32)) >> 32)
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/*
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* Debug
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@@ -63,41 +63,60 @@
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#define MBOX_DUMP_SIZE 0x30
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/* BARs */
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#define BYT_DSP_BAR 0
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#define BYT_PCI_BAR 1
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#define BYT_IMR_BAR 2
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#define DSP_BAR 0
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#define PCI_BAR 1
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#define IMR_BAR 2
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static const struct snd_sof_debugfs_map byt_debugfs[] = {
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{"dmac0", BYT_DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
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{"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"dmac1", BYT_DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
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{"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"ssp0", BYT_DSP_BAR, SSP0_OFFSET, SSP_SIZE,
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{"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"ssp1", BYT_DSP_BAR, SSP1_OFFSET, SSP_SIZE,
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{"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"ssp2", BYT_DSP_BAR, SSP2_OFFSET, SSP_SIZE,
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{"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"iram", BYT_DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
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{"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
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SOF_DEBUGFS_ACCESS_D0_ONLY},
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{"dram", BYT_DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
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{"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
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SOF_DEBUGFS_ACCESS_D0_ONLY},
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{"shim", BYT_DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT,
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{"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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};
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static void byt_host_done(struct snd_sof_dev *sdev);
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static void byt_dsp_done(struct snd_sof_dev *sdev);
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static void byt_get_reply(struct snd_sof_dev *sdev);
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static const struct snd_sof_debugfs_map tng_debugfs[] = {
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{"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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{"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
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SOF_DEBUGFS_ACCESS_D0_ONLY},
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{"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
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SOF_DEBUGFS_ACCESS_D0_ONLY},
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{"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT,
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SOF_DEBUGFS_ACCESS_ALWAYS},
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};
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static void atom_host_done(struct snd_sof_dev *sdev);
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static void atom_dsp_done(struct snd_sof_dev *sdev);
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static void atom_get_reply(struct snd_sof_dev *sdev);
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/*
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* Debug
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*/
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static void byt_get_registers(struct snd_sof_dev *sdev,
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struct sof_ipc_dsp_oops_xtensa *xoops,
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struct sof_ipc_panic_info *panic_info,
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u32 *stack, size_t stack_words)
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static void atom_get_registers(struct snd_sof_dev *sdev,
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struct sof_ipc_dsp_oops_xtensa *xoops,
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struct sof_ipc_panic_info *panic_info,
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u32 *stack, size_t stack_words)
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{
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u32 offset = sdev->dsp_oops_offset;
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@@ -120,24 +139,24 @@ static void byt_get_registers(struct snd_sof_dev *sdev,
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sof_mailbox_read(sdev, offset, stack, stack_words * sizeof(u32));
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}
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static void byt_dump(struct snd_sof_dev *sdev, u32 flags)
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static void atom_dump(struct snd_sof_dev *sdev, u32 flags)
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{
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struct sof_ipc_dsp_oops_xtensa xoops;
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struct sof_ipc_panic_info panic_info;
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u32 stack[BYT_STACK_DUMP_SIZE];
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u32 stack[STACK_DUMP_SIZE];
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u64 status, panic, imrd, imrx;
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/* now try generic SOF status messages */
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status = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCD);
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panic = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCX);
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byt_get_registers(sdev, &xoops, &panic_info, stack,
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BYT_STACK_DUMP_SIZE);
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status = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCD);
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panic = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCX);
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atom_get_registers(sdev, &xoops, &panic_info, stack,
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STACK_DUMP_SIZE);
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snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, stack,
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BYT_STACK_DUMP_SIZE);
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STACK_DUMP_SIZE);
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/* provide some context for firmware debug */
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imrx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IMRX);
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imrd = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IMRD);
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imrx = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IMRX);
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imrd = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IMRD);
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dev_err(sdev->dev,
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"error: ipc host -> DSP: pending %s complete %s raw 0x%llx\n",
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(panic & SHIM_IPCX_BUSY) ? "yes" : "no",
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@@ -161,19 +180,19 @@ static void byt_dump(struct snd_sof_dev *sdev, u32 flags)
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* IPC Doorbell IRQ handler and thread.
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*/
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static irqreturn_t byt_irq_handler(int irq, void *context)
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static irqreturn_t atom_irq_handler(int irq, void *context)
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{
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struct snd_sof_dev *sdev = context;
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u64 ipcx, ipcd;
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int ret = IRQ_NONE;
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ipcx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCX);
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ipcd = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCD);
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ipcx = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCX);
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ipcd = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCD);
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if (ipcx & SHIM_BYT_IPCX_DONE) {
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/* reply message from DSP, Mask Done interrupt first */
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snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,
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snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR,
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SHIM_IMRX,
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SHIM_IMRX_DONE,
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SHIM_IMRX_DONE);
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@@ -183,7 +202,7 @@ static irqreturn_t byt_irq_handler(int irq, void *context)
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if (ipcd & SHIM_BYT_IPCD_BUSY) {
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/* new message from DSP, Mask Busy interrupt first */
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snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR,
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snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR,
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SHIM_IMRX,
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SHIM_IMRX_BUSY,
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SHIM_IMRX_BUSY);
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@@ -193,13 +212,13 @@ static irqreturn_t byt_irq_handler(int irq, void *context)
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return ret;
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}
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static irqreturn_t byt_irq_thread(int irq, void *context)
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static irqreturn_t atom_irq_thread(int irq, void *context)
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{
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struct snd_sof_dev *sdev = context;
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u64 ipcx, ipcd;
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ipcx = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCX);
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ipcd = snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_IPCD);
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ipcx = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCX);
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ipcd = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCD);
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/* reply message from DSP */
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if (ipcx & SHIM_BYT_IPCX_DONE) {
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@@ -213,10 +232,10 @@ static irqreturn_t byt_irq_thread(int irq, void *context)
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* because the done bit can't be set in cmd_done function
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* which is triggered by msg
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*/
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byt_get_reply(sdev);
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atom_get_reply(sdev);
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snd_sof_ipc_reply(sdev, ipcx);
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byt_dsp_done(sdev);
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atom_dsp_done(sdev);
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spin_unlock_irq(&sdev->ipc_lock);
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}
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@@ -226,33 +245,33 @@ static irqreturn_t byt_irq_thread(int irq, void *context)
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/* Handle messages from DSP Core */
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if ((ipcd & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC) {
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snd_sof_dsp_panic(sdev, BYT_PANIC_OFFSET(ipcd) +
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snd_sof_dsp_panic(sdev, PANIC_OFFSET(ipcd) +
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MBOX_OFFSET);
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} else {
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snd_sof_ipc_msgs_rx(sdev);
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}
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byt_host_done(sdev);
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atom_host_done(sdev);
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}
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return IRQ_HANDLED;
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}
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static int byt_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
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static int atom_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
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{
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/* unmask and prepare to receive Done interrupt */
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snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IMRX,
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snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IMRX,
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SHIM_IMRX_DONE, 0);
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/* send the message */
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sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,
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msg->msg_size);
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snd_sof_dsp_write64(sdev, BYT_DSP_BAR, SHIM_IPCX, SHIM_BYT_IPCX_BUSY);
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snd_sof_dsp_write64(sdev, DSP_BAR, SHIM_IPCX, SHIM_BYT_IPCX_BUSY);
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return 0;
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}
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static void byt_get_reply(struct snd_sof_dev *sdev)
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static void atom_get_reply(struct snd_sof_dev *sdev)
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{
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struct snd_sof_ipc_msg *msg = sdev->msg;
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struct sof_ipc_reply reply;
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@@ -291,33 +310,33 @@ static void byt_get_reply(struct snd_sof_dev *sdev)
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msg->reply_error = ret;
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}
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static int byt_get_mailbox_offset(struct snd_sof_dev *sdev)
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static int atom_get_mailbox_offset(struct snd_sof_dev *sdev)
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{
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return MBOX_OFFSET;
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}
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static int byt_get_window_offset(struct snd_sof_dev *sdev, u32 id)
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static int atom_get_window_offset(struct snd_sof_dev *sdev, u32 id)
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{
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return MBOX_OFFSET;
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}
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static void byt_host_done(struct snd_sof_dev *sdev)
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static void atom_host_done(struct snd_sof_dev *sdev)
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{
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/* clear BUSY bit and set DONE bit - accept new messages */
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snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IPCD,
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snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IPCD,
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SHIM_BYT_IPCD_BUSY |
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SHIM_BYT_IPCD_DONE,
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SHIM_BYT_IPCD_DONE);
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/* unmask and prepare to receive next new message */
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snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IMRX,
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snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IMRX,
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SHIM_IMRX_BUSY, 0);
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}
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static void byt_dsp_done(struct snd_sof_dev *sdev)
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static void atom_dsp_done(struct snd_sof_dev *sdev)
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{
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/* clear DONE bit - tell DSP we have completed */
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snd_sof_dsp_update_bits64_unlocked(sdev, BYT_DSP_BAR, SHIM_IPCX,
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snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IPCX,
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SHIM_BYT_IPCX_DONE, 0);
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}
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@@ -325,22 +344,22 @@ static void byt_dsp_done(struct snd_sof_dev *sdev)
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* DSP control.
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*/
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static int byt_run(struct snd_sof_dev *sdev)
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static int atom_run(struct snd_sof_dev *sdev)
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{
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int tries = 10;
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/* release stall and wait to unstall */
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snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_CSR,
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snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
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SHIM_BYT_CSR_STALL, 0x0);
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while (tries--) {
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if (!(snd_sof_dsp_read64(sdev, BYT_DSP_BAR, SHIM_CSR) &
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if (!(snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_CSR) &
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SHIM_BYT_CSR_PWAITMODE))
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break;
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msleep(100);
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}
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if (tries < 0) {
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dev_err(sdev->dev, "error: unable to run DSP firmware\n");
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byt_dump(sdev, SOF_DBG_DUMP_REGS | SOF_DBG_DUMP_MBOX);
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atom_dump(sdev, SOF_DBG_DUMP_REGS | SOF_DBG_DUMP_MBOX);
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return -ENODEV;
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}
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@@ -348,10 +367,10 @@ static int byt_run(struct snd_sof_dev *sdev)
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return 1;
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}
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static int byt_reset(struct snd_sof_dev *sdev)
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static int atom_reset(struct snd_sof_dev *sdev)
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{
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/* put DSP into reset, set reset vector and stall */
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snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_CSR,
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snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
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SHIM_BYT_CSR_RST | SHIM_BYT_CSR_VECTOR_SEL |
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SHIM_BYT_CSR_STALL,
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SHIM_BYT_CSR_RST | SHIM_BYT_CSR_VECTOR_SEL |
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@@ -360,7 +379,7 @@ static int byt_reset(struct snd_sof_dev *sdev)
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usleep_range(10, 15);
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/* take DSP out of reset and keep stalled for FW loading */
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snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_CSR,
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snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
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SHIM_BYT_CSR_RST, 0);
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return 0;
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@@ -390,7 +409,7 @@ static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
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return tplg_filename;
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}
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static void byt_machine_select(struct snd_sof_dev *sdev)
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static void atom_machine_select(struct snd_sof_dev *sdev)
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{
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struct snd_sof_pdata *sof_pdata = sdev->pdata;
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const struct sof_dev_desc *desc = sof_pdata->desc;
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@@ -427,8 +446,8 @@ static void byt_machine_select(struct snd_sof_dev *sdev)
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sof_pdata->machine = mach;
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}
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/* Baytrail DAIs */
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static struct snd_soc_dai_driver byt_dai[] = {
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/* Atom DAIs */
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static struct snd_soc_dai_driver atom_dai[] = {
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{
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.name = "ssp0-port",
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.playback = {
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@@ -497,8 +516,8 @@ static struct snd_soc_dai_driver byt_dai[] = {
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},
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};
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static void byt_set_mach_params(const struct snd_soc_acpi_mach *mach,
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struct snd_sof_dev *sdev)
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static void atom_set_mach_params(const struct snd_soc_acpi_mach *mach,
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struct snd_sof_dev *sdev)
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{
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struct snd_sof_pdata *pdata = sdev->pdata;
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const struct sof_dev_desc *desc = pdata->desc;
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@@ -533,16 +552,16 @@ static int tangier_pci_probe(struct snd_sof_dev *sdev)
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/* LPE base */
|
||||
base = pci_resource_start(pci, desc->resindex_lpe_base) - IRAM_OFFSET;
|
||||
size = BYT_PCI_BAR_SIZE;
|
||||
size = PCI_BAR_SIZE;
|
||||
|
||||
dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size);
|
||||
sdev->bar[BYT_DSP_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[BYT_DSP_BAR]) {
|
||||
sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[DSP_BAR]) {
|
||||
dev_err(sdev->dev, "error: failed to ioremap LPE base 0x%x size 0x%x\n",
|
||||
base, size);
|
||||
return -ENODEV;
|
||||
}
|
||||
dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[BYT_DSP_BAR]);
|
||||
dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]);
|
||||
|
||||
/* IMR base - optional */
|
||||
if (desc->resindex_imr_base == -1)
|
||||
@@ -558,20 +577,20 @@ static int tangier_pci_probe(struct snd_sof_dev *sdev)
|
||||
}
|
||||
|
||||
dev_dbg(sdev->dev, "IMR base at 0x%x size 0x%x", base, size);
|
||||
sdev->bar[BYT_IMR_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[BYT_IMR_BAR]) {
|
||||
sdev->bar[IMR_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[IMR_BAR]) {
|
||||
dev_err(sdev->dev, "error: failed to ioremap IMR base 0x%x size 0x%x\n",
|
||||
base, size);
|
||||
return -ENODEV;
|
||||
}
|
||||
dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[BYT_IMR_BAR]);
|
||||
dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[IMR_BAR]);
|
||||
|
||||
irq:
|
||||
/* register our IRQ */
|
||||
sdev->ipc_irq = pci->irq;
|
||||
dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq);
|
||||
ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq,
|
||||
byt_irq_handler, byt_irq_thread,
|
||||
atom_irq_handler, atom_irq_thread,
|
||||
0, "AudioDSP", sdev);
|
||||
if (ret < 0) {
|
||||
dev_err(sdev->dev, "error: failed to register IRQ %d\n",
|
||||
@@ -580,7 +599,7 @@ irq:
|
||||
}
|
||||
|
||||
/* enable BUSY and disable DONE Interrupt by default */
|
||||
snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRX,
|
||||
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
|
||||
SHIM_IMRX_BUSY | SHIM_IMRX_DONE,
|
||||
SHIM_IMRX_DONE);
|
||||
|
||||
@@ -595,8 +614,8 @@ const struct snd_sof_dsp_ops sof_tng_ops = {
|
||||
.probe = tangier_pci_probe,
|
||||
|
||||
/* DSP core boot / reset */
|
||||
.run = byt_run,
|
||||
.reset = byt_reset,
|
||||
.run = atom_run,
|
||||
.reset = atom_reset,
|
||||
|
||||
/* Register IO */
|
||||
.write = sof_io_write,
|
||||
@@ -609,28 +628,28 @@ const struct snd_sof_dsp_ops sof_tng_ops = {
|
||||
.block_write = sof_block_write,
|
||||
|
||||
/* doorbell */
|
||||
.irq_handler = byt_irq_handler,
|
||||
.irq_thread = byt_irq_thread,
|
||||
.irq_handler = atom_irq_handler,
|
||||
.irq_thread = atom_irq_thread,
|
||||
|
||||
/* ipc */
|
||||
.send_msg = byt_send_msg,
|
||||
.send_msg = atom_send_msg,
|
||||
.fw_ready = sof_fw_ready,
|
||||
.get_mailbox_offset = byt_get_mailbox_offset,
|
||||
.get_window_offset = byt_get_window_offset,
|
||||
.get_mailbox_offset = atom_get_mailbox_offset,
|
||||
.get_window_offset = atom_get_window_offset,
|
||||
|
||||
.ipc_msg_data = intel_ipc_msg_data,
|
||||
.ipc_pcm_params = intel_ipc_pcm_params,
|
||||
|
||||
/* machine driver */
|
||||
.machine_select = byt_machine_select,
|
||||
.machine_select = atom_machine_select,
|
||||
.machine_register = sof_machine_register,
|
||||
.machine_unregister = sof_machine_unregister,
|
||||
.set_mach_params = byt_set_mach_params,
|
||||
.set_mach_params = atom_set_mach_params,
|
||||
|
||||
/* debug */
|
||||
.debug_map = byt_debugfs,
|
||||
.debug_map_count = ARRAY_SIZE(byt_debugfs),
|
||||
.dbg_dump = byt_dump,
|
||||
.debug_map = tng_debugfs,
|
||||
.debug_map_count = ARRAY_SIZE(tng_debugfs),
|
||||
.dbg_dump = atom_dump,
|
||||
|
||||
/* stream callbacks */
|
||||
.pcm_open = intel_pcm_open,
|
||||
@@ -643,7 +662,7 @@ const struct snd_sof_dsp_ops sof_tng_ops = {
|
||||
.load_firmware = snd_sof_load_firmware_memcpy,
|
||||
|
||||
/* DAI drivers */
|
||||
.drv = byt_dai,
|
||||
.drv = atom_dai,
|
||||
.num_drv = 3, /* we have only 3 SSPs on byt*/
|
||||
|
||||
/* ALSA HW info flags */
|
||||
@@ -670,11 +689,11 @@ EXPORT_SYMBOL_NS(tng_chip_info, SND_SOC_SOF_MERRIFIELD);
|
||||
static void byt_reset_dsp_disable_int(struct snd_sof_dev *sdev)
|
||||
{
|
||||
/* Disable Interrupt from both sides */
|
||||
snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRX, 0x3, 0x3);
|
||||
snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRD, 0x3, 0x3);
|
||||
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX, 0x3, 0x3);
|
||||
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRD, 0x3, 0x3);
|
||||
|
||||
/* Put DSP into reset, set reset vector */
|
||||
snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_CSR,
|
||||
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
|
||||
SHIM_BYT_CSR_RST | SHIM_BYT_CSR_VECTOR_SEL,
|
||||
SHIM_BYT_CSR_RST | SHIM_BYT_CSR_VECTOR_SEL);
|
||||
}
|
||||
@@ -689,7 +708,7 @@ static int byt_suspend(struct snd_sof_dev *sdev, u32 target_state)
|
||||
static int byt_resume(struct snd_sof_dev *sdev)
|
||||
{
|
||||
/* enable BUSY and disable DONE Interrupt by default */
|
||||
snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRX,
|
||||
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
|
||||
SHIM_IMRX_BUSY | SHIM_IMRX_DONE,
|
||||
SHIM_IMRX_DONE);
|
||||
|
||||
@@ -704,29 +723,29 @@ static int byt_remove(struct snd_sof_dev *sdev)
|
||||
}
|
||||
|
||||
static const struct snd_sof_debugfs_map cht_debugfs[] = {
|
||||
{"dmac0", BYT_DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
|
||||
{"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"dmac1", BYT_DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
|
||||
{"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"dmac2", BYT_DSP_BAR, DMAC2_OFFSET, DMAC_SIZE,
|
||||
{"dmac2", DSP_BAR, DMAC2_OFFSET, DMAC_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"ssp0", BYT_DSP_BAR, SSP0_OFFSET, SSP_SIZE,
|
||||
{"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"ssp1", BYT_DSP_BAR, SSP1_OFFSET, SSP_SIZE,
|
||||
{"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"ssp2", BYT_DSP_BAR, SSP2_OFFSET, SSP_SIZE,
|
||||
{"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"ssp3", BYT_DSP_BAR, SSP3_OFFSET, SSP_SIZE,
|
||||
{"ssp3", DSP_BAR, SSP3_OFFSET, SSP_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"ssp4", BYT_DSP_BAR, SSP4_OFFSET, SSP_SIZE,
|
||||
{"ssp4", DSP_BAR, SSP4_OFFSET, SSP_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"ssp5", BYT_DSP_BAR, SSP5_OFFSET, SSP_SIZE,
|
||||
{"ssp5", DSP_BAR, SSP5_OFFSET, SSP_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
{"iram", BYT_DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
|
||||
{"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_D0_ONLY},
|
||||
{"dram", BYT_DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
|
||||
{"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
|
||||
SOF_DEBUGFS_ACCESS_D0_ONLY},
|
||||
{"shim", BYT_DSP_BAR, SHIM_OFFSET, SHIM_SIZE_CHT,
|
||||
{"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_CHT,
|
||||
SOF_DEBUGFS_ACCESS_ALWAYS},
|
||||
};
|
||||
|
||||
@@ -760,17 +779,17 @@ static int byt_acpi_probe(struct snd_sof_dev *sdev)
|
||||
}
|
||||
|
||||
dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size);
|
||||
sdev->bar[BYT_DSP_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[BYT_DSP_BAR]) {
|
||||
sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[DSP_BAR]) {
|
||||
dev_err(sdev->dev, "error: failed to ioremap LPE base 0x%x size 0x%x\n",
|
||||
base, size);
|
||||
return -ENODEV;
|
||||
}
|
||||
dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[BYT_DSP_BAR]);
|
||||
dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]);
|
||||
|
||||
/* TODO: add offsets */
|
||||
sdev->mmio_bar = BYT_DSP_BAR;
|
||||
sdev->mailbox_bar = BYT_DSP_BAR;
|
||||
sdev->mmio_bar = DSP_BAR;
|
||||
sdev->mailbox_bar = DSP_BAR;
|
||||
|
||||
/* IMR base - optional */
|
||||
if (desc->resindex_imr_base == -1)
|
||||
@@ -794,13 +813,13 @@ static int byt_acpi_probe(struct snd_sof_dev *sdev)
|
||||
}
|
||||
|
||||
dev_dbg(sdev->dev, "IMR base at 0x%x size 0x%x", base, size);
|
||||
sdev->bar[BYT_IMR_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[BYT_IMR_BAR]) {
|
||||
sdev->bar[IMR_BAR] = devm_ioremap(sdev->dev, base, size);
|
||||
if (!sdev->bar[IMR_BAR]) {
|
||||
dev_err(sdev->dev, "error: failed to ioremap IMR base 0x%x size 0x%x\n",
|
||||
base, size);
|
||||
return -ENODEV;
|
||||
}
|
||||
dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[BYT_IMR_BAR]);
|
||||
dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[IMR_BAR]);
|
||||
|
||||
irq:
|
||||
/* register our IRQ */
|
||||
@@ -810,7 +829,7 @@ irq:
|
||||
|
||||
dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq);
|
||||
ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq,
|
||||
byt_irq_handler, byt_irq_thread,
|
||||
atom_irq_handler, atom_irq_thread,
|
||||
IRQF_SHARED, "AudioDSP", sdev);
|
||||
if (ret < 0) {
|
||||
dev_err(sdev->dev, "error: failed to register IRQ %d\n",
|
||||
@@ -819,7 +838,7 @@ irq:
|
||||
}
|
||||
|
||||
/* enable BUSY and disable DONE Interrupt by default */
|
||||
snd_sof_dsp_update_bits64(sdev, BYT_DSP_BAR, SHIM_IMRX,
|
||||
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
|
||||
SHIM_IMRX_BUSY | SHIM_IMRX_DONE,
|
||||
SHIM_IMRX_DONE);
|
||||
|
||||
@@ -836,8 +855,8 @@ static const struct snd_sof_dsp_ops sof_byt_ops = {
|
||||
.remove = byt_remove,
|
||||
|
||||
/* DSP core boot / reset */
|
||||
.run = byt_run,
|
||||
.reset = byt_reset,
|
||||
.run = atom_run,
|
||||
.reset = atom_reset,
|
||||
|
||||
/* Register IO */
|
||||
.write = sof_io_write,
|
||||
@@ -850,28 +869,28 @@ static const struct snd_sof_dsp_ops sof_byt_ops = {
|
||||
.block_write = sof_block_write,
|
||||
|
||||
/* doorbell */
|
||||
.irq_handler = byt_irq_handler,
|
||||
.irq_thread = byt_irq_thread,
|
||||
.irq_handler = atom_irq_handler,
|
||||
.irq_thread = atom_irq_thread,
|
||||
|
||||
/* ipc */
|
||||
.send_msg = byt_send_msg,
|
||||
.send_msg = atom_send_msg,
|
||||
.fw_ready = sof_fw_ready,
|
||||
.get_mailbox_offset = byt_get_mailbox_offset,
|
||||
.get_window_offset = byt_get_window_offset,
|
||||
.get_mailbox_offset = atom_get_mailbox_offset,
|
||||
.get_window_offset = atom_get_window_offset,
|
||||
|
||||
.ipc_msg_data = intel_ipc_msg_data,
|
||||
.ipc_pcm_params = intel_ipc_pcm_params,
|
||||
|
||||
/* machine driver */
|
||||
.machine_select = byt_machine_select,
|
||||
.machine_select = atom_machine_select,
|
||||
.machine_register = sof_machine_register,
|
||||
.machine_unregister = sof_machine_unregister,
|
||||
.set_mach_params = byt_set_mach_params,
|
||||
.set_mach_params = atom_set_mach_params,
|
||||
|
||||
/* debug */
|
||||
.debug_map = byt_debugfs,
|
||||
.debug_map_count = ARRAY_SIZE(byt_debugfs),
|
||||
.dbg_dump = byt_dump,
|
||||
.dbg_dump = atom_dump,
|
||||
|
||||
/* stream callbacks */
|
||||
.pcm_open = intel_pcm_open,
|
||||
@@ -888,7 +907,7 @@ static const struct snd_sof_dsp_ops sof_byt_ops = {
|
||||
.resume = byt_resume,
|
||||
|
||||
/* DAI drivers */
|
||||
.drv = byt_dai,
|
||||
.drv = atom_dai,
|
||||
.num_drv = 3, /* we have only 3 SSPs on byt*/
|
||||
|
||||
/* ALSA HW info flags */
|
||||
@@ -913,8 +932,8 @@ static const struct snd_sof_dsp_ops sof_cht_ops = {
|
||||
.remove = byt_remove,
|
||||
|
||||
/* DSP core boot / reset */
|
||||
.run = byt_run,
|
||||
.reset = byt_reset,
|
||||
.run = atom_run,
|
||||
.reset = atom_reset,
|
||||
|
||||
/* Register IO */
|
||||
.write = sof_io_write,
|
||||
@@ -927,28 +946,28 @@ static const struct snd_sof_dsp_ops sof_cht_ops = {
|
||||
.block_write = sof_block_write,
|
||||
|
||||
/* doorbell */
|
||||
.irq_handler = byt_irq_handler,
|
||||
.irq_thread = byt_irq_thread,
|
||||
.irq_handler = atom_irq_handler,
|
||||
.irq_thread = atom_irq_thread,
|
||||
|
||||
/* ipc */
|
||||
.send_msg = byt_send_msg,
|
||||
.send_msg = atom_send_msg,
|
||||
.fw_ready = sof_fw_ready,
|
||||
.get_mailbox_offset = byt_get_mailbox_offset,
|
||||
.get_window_offset = byt_get_window_offset,
|
||||
.get_mailbox_offset = atom_get_mailbox_offset,
|
||||
.get_window_offset = atom_get_window_offset,
|
||||
|
||||
.ipc_msg_data = intel_ipc_msg_data,
|
||||
.ipc_pcm_params = intel_ipc_pcm_params,
|
||||
|
||||
/* machine driver */
|
||||
.machine_select = byt_machine_select,
|
||||
.machine_select = atom_machine_select,
|
||||
.machine_register = sof_machine_register,
|
||||
.machine_unregister = sof_machine_unregister,
|
||||
.set_mach_params = byt_set_mach_params,
|
||||
.set_mach_params = atom_set_mach_params,
|
||||
|
||||
/* debug */
|
||||
.debug_map = cht_debugfs,
|
||||
.debug_map_count = ARRAY_SIZE(cht_debugfs),
|
||||
.dbg_dump = byt_dump,
|
||||
.dbg_dump = atom_dump,
|
||||
|
||||
/* stream callbacks */
|
||||
.pcm_open = intel_pcm_open,
|
||||
@@ -965,9 +984,9 @@ static const struct snd_sof_dsp_ops sof_cht_ops = {
|
||||
.resume = byt_resume,
|
||||
|
||||
/* DAI drivers */
|
||||
.drv = byt_dai,
|
||||
.drv = atom_dai,
|
||||
/* all 6 SSPs may be available for cherrytrail */
|
||||
.num_drv = ARRAY_SIZE(byt_dai),
|
||||
.num_drv = 6,
|
||||
|
||||
/* ALSA HW info flags */
|
||||
.hw_info = SNDRV_PCM_INFO_MMAP |
|
||||
|
||||
Reference in New Issue
Block a user