arm64: dts: qcom: sm8550: move USB graph to the SoC dtsi
Move the graph connection between USB host, USB SS PHY and DP port to the SoC dtsi file. They are linked in hardware in this way. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-4-87c341b55cdf@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Bjorn Andersson
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a84f3627f9
commit
2f212acedb
@@ -940,7 +940,6 @@
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};
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&mdss_dp0_out {
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remote-endpoint = <&usb_dp_qmpphy_dp_in>;
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data-lanes = <0 1>;
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};
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@@ -1267,10 +1266,6 @@
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remote-endpoint = <&pmic_glink_hs_in>;
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};
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&usb_1_dwc3_ss {
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remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
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};
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&usb_1_hsphy {
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vdd-supply = <&vreg_l1e_0p88>;
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vdda12-supply = <&vreg_l3e_1p2>;
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@@ -1289,18 +1284,10 @@
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status = "okay";
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};
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&usb_dp_qmpphy_dp_in {
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remote-endpoint = <&mdss_dp0_out>;
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};
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&usb_dp_qmpphy_out {
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remote-endpoint = <&pmic_glink_ss_in>;
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};
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&usb_dp_qmpphy_usb_ss_in {
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remote-endpoint = <&usb_1_dwc3_ss>;
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};
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&xo_board {
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clock-frequency = <76800000>;
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};
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@@ -736,7 +736,6 @@
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&mdss_dp0_out {
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data-lanes = <0 1>;
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remote-endpoint = <&usb_dp_qmpphy_dp_in>;
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};
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&pcie_1_phy_aux_clk {
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@@ -960,10 +959,6 @@
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remote-endpoint = <&pmic_glink_hs_in>;
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};
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&usb_1_dwc3_ss {
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remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
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};
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&usb_1_hsphy {
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vdd-supply = <&vreg_l1e_0p88>;
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vdda12-supply = <&vreg_l3e_1p2>;
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@@ -982,18 +977,10 @@
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status = "okay";
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};
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&usb_dp_qmpphy_dp_in {
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remote-endpoint = <&mdss_dp0_out>;
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};
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&usb_dp_qmpphy_out {
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remote-endpoint = <&pmic_glink_ss_in>;
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};
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&usb_dp_qmpphy_usb_ss_in {
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remote-endpoint = <&usb_1_dwc3_ss>;
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};
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&xo_board {
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clock-frequency = <76800000>;
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};
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@@ -807,7 +807,6 @@
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&mdss_dp0_out {
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data-lanes = <0 1>;
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remote-endpoint = <&usb_dp_qmpphy_dp_in>;
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};
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&pcie_1_phy_aux_clk {
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@@ -1144,10 +1143,6 @@
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remote-endpoint = <&pmic_glink_hs_in>;
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};
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&usb_1_dwc3_ss {
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remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
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};
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&usb_1_hsphy {
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vdd-supply = <&vreg_l1e_0p88>;
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vdda12-supply = <&vreg_l3e_1p2>;
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@@ -1166,18 +1161,10 @@
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status = "okay";
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};
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&usb_dp_qmpphy_dp_in {
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remote-endpoint = <&mdss_dp0_out>;
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};
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&usb_dp_qmpphy_out {
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remote-endpoint = <&redriver_ss_in>;
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};
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&usb_dp_qmpphy_usb_ss_in {
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remote-endpoint = <&usb_1_dwc3_ss>;
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};
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&xo_board {
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clock-frequency = <76800000>;
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};
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@@ -746,10 +746,6 @@
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remote-endpoint = <&pmic_glink_hs_in>;
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};
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&usb_1_dwc3_ss {
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remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
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};
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&usb_1_hsphy {
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vdd-supply = <&pm8550vs_2_l1>;
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vdda12-supply = <&pm8550vs_2_l3>;
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@@ -770,10 +766,6 @@
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remote-endpoint = <&pmic_glink_ss_in>;
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};
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&usb_dp_qmpphy_usb_ss_in {
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remote-endpoint = <&usb_1_dwc3_ss>;
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};
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&xo_board {
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clock-frequency = <76800000>;
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};
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@@ -2910,6 +2910,7 @@
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port@1 {
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reg = <1>;
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mdss_dp0_out: endpoint {
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remote-endpoint = <&usb_dp_qmpphy_dp_in>;
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};
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};
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};
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@@ -3186,6 +3187,7 @@
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reg = <1>;
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usb_dp_qmpphy_usb_ss_in: endpoint {
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remote-endpoint = <&usb_1_dwc3_ss>;
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};
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};
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@@ -3193,6 +3195,7 @@
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reg = <2>;
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usb_dp_qmpphy_dp_in: endpoint {
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remote-endpoint = <&mdss_dp0_out>;
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};
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};
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};
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@@ -3280,6 +3283,7 @@
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reg = <1>;
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usb_1_dwc3_ss: endpoint {
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remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
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};
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};
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};
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