dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern

Narrow the pattern of possible GPIO names for pin controllers:
 - SC7280 LPASS: GPIOs 0-14
 - SM8250 LPASS: GPIOs 0-13
 - SM8450 LPASS: GPIOs 0-22
 - SC8280XP LPASS: GPIOs 0-18

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230203164854.390080-1-krzysztof.kozlowski@linaro.org
Link: https://lore.kernel.org/r/20230203164854.390080-2-krzysztof.kozlowski@linaro.org
Link: https://lore.kernel.org/r/20230203164854.390080-3-krzysztof.kozlowski@linaro.org
Link: https://lore.kernel.org/r/20230203164854.390080-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml

@@ -59,7 +59,7 @@ $defs:
           subnode.
         items:
           oneOf:
-            - pattern: "^gpio([0-9]|[1-9][0-9])$"
+            - pattern: "^gpio([0-9]|1[0-4])$"
         minItems: 1
         maxItems: 15
 

Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml

@@ -134,7 +134,7 @@ examples:
         clock-names = "core", "audio";
         gpio-controller;
         #gpio-cells = <2>;
-        gpio-ranges = <&lpi_tlmm 0 0 18>;
+        gpio-ranges = <&lpi_tlmm 0 0 19>;
 
         dmic01-state {
             dmic01-clk-pins {

Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml

@@ -64,7 +64,7 @@ $defs:
           subnode.
         items:
           oneOf:
-            - pattern: "^gpio([0-9]|[1-9][0-9])$"
+            - pattern: "^gpio([0-9]|1[0-3])$"
         minItems: 1
         maxItems: 14
 

Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml

@@ -65,7 +65,7 @@ $defs:
           List of gpio pins affected by the properties specified in this
           subnode.
         items:
-          pattern: "^gpio([0-9]|[1-2][0-9])$"
+          pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
 
       function:
         enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,