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KVM: arm64: nv: Truely enable nXS TLBI operations

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Although we now have support for nXS-flavoured TLBI instructions,
we still don't expose the feature to the guest thanks to a mixture
of misleading comment and use of a bunch of magic values.

Fix the comment and correctly express the masking of LS64, which
is enough to expose nXS to the world. Not that anyone cares...

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240703154743.824824-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
This commit is contained in:
Marc Zyngier
2024-07-03 16:47:43 +01:00
committed by Oliver Upton
parent 0feec7769a
commit 3cfde36df7
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/kvm/nested.c
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@@ -810,8 +810,8 @@ static u64 limit_nv_id_reg(u32 id, u64 val)
break;
case SYS_ID_AA64ISAR1_EL1:
/* Support everything but Spec Invalidation */
val &= ~(GENMASK_ULL(63, 56) |
/* Support everything but Spec Invalidation and LS64 */
val &= ~(NV_FTR(ISAR1, LS64) |
NV_FTR(ISAR1, SPECRES));
break;