drm/amdgpu: Add a read to GFX v9.4.3 ring test
Issue a read to confirm the register write before ringing doorbell. With multiple XCCs there is chance for race condition. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -256,6 +256,7 @@ static int gfx_v9_4_3_ring_test_ring(struct amdgpu_ring *ring)
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xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);
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scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), regSCRATCH_REG0);
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WREG32(scratch_reg0_offset, 0xCAFEDEAD);
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tmp = RREG32(scratch_reg0_offset);
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r = amdgpu_ring_alloc(ring, 3);
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if (r)
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