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arm64: dts: imx95-19x19-evk: add PCIe[0,1] support

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Add PCIe[0,1] and all dependent nodes.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frank Li
2024-06-20 12:16:22 -04:00
committed by Shawn Guo
parent 9ceb5cb24d
commit 418ecfca8b
1 changed files with 56 additions and 0 deletions
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56
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
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@@ -40,6 +40,34 @@
};
};
reg_m2_pwr: regulator-m2-pwr {
compatible = "regulator-fixed";
regulator-name = "M.2-power";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&i2c7_pcal6524 20 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_pcie0: regulator-pcie {
compatible = "regulator-fixed";
regulator-name = "PCIE_WLAN_EN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_m2_pwr>;
gpio = <&i2c7_pcal6524 6 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_slot_pwr: regulator-slot-pwr {
compatible = "regulator-fixed";
regulator-name = "PCIe slot-power";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&i2c7_pcal6524 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
@@ -84,6 +112,22 @@
status = "okay";
};
&pcie0 {
pinctrl-0 = <&pinctrl_pcie0>;
pinctrl-names = "default";
reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_pcie0>;
status = "okay";
};
&pcie1 {
pinctrl-0 = <&pinctrl_pcie1>;
pinctrl-names = "default";
reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_slot_pwr>;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1>;
@@ -128,6 +172,18 @@
>;
};
pinctrl_pcie0: pcie0grp {
fsl,pins = <
IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B 0x4000031e
>;
};
pinctrl_pcie1: pcie1grp {
fsl,pins = <
IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B 0x4000031e
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX 0x31e