ARM: dts: imx6qp: correct IPU nodes
Reference them by handle and remove the changed clocks that are copied from the downstream DT and are not part of the mainline binding. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@@ -55,32 +55,6 @@
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reg = <0x00960000 0x20000>;
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clocks = <&clks IMX6QDL_CLK_OCRAM>;
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};
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ipu1: ipu@02400000 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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clocks = <&clks IMX6QDL_CLK_IPU1>,
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<&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>,
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<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
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<&clks IMX6QDL_CLK_PRG0_APB>;
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clock-names = "bus",
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"di0", "di1",
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"di0_sel", "di1_sel",
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"ldb_di0", "ldb_di1", "prg";
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};
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ipu2: ipu@02800000 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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clocks = <&clks IMX6QDL_CLK_IPU2>,
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<&clks IMX6QDL_CLK_IPU2_DI0>, <&clks IMX6QDL_CLK_IPU2_DI1>,
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<&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
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<&clks IMX6QDL_CLK_PRG1_APB>;
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clock-names = "bus",
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"di0", "di1",
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"di0_sel", "di1_sel",
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"ldb_di0", "ldb_di1", "prg";
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};
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};
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};
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@@ -90,6 +64,14 @@
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<0 119 IRQ_TYPE_LEVEL_HIGH>;
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};
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&ipu1 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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};
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&ipu2 {
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compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
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};
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&ldb {
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clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
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<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
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