arm64: zynqmp: Add missing mio-bank properties to dc1 and dc5

Add missing mio-bank properties to zc1751 dc1 and dc5 boards.
The same change was done by commit 63481699d6 ("arm64: dts: zynqmp: Add
missing mio-bank properties to sdhcis").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2b2ab31639c706651dfd319f5b6bc59e68f111b6.1623684253.git.michal.simek@xilinx.com
This commit is contained in:
Michal Simek
2021-06-14 17:25:20 +02:00
parent d58f922753
commit 69f8aec4f9
2 changed files with 3 additions and 0 deletions

View File

@@ -364,6 +364,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci0_default>;
bus-width = <8>;
xlnx,mio-bank = <0>;
};
/* SD1 with level shifter */
@@ -371,6 +372,7 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci1_default>;
xlnx,mio-bank = <1>;
};
&uart0 {

View File

@@ -407,6 +407,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci0_default>;
no-1-8-v;
xlnx,mio-bank = <0>;
};
&ttc0 {