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drm/msm/a6xx: Improve GMU force shutdown sequence

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The GMU force shutdown sequence involves some additional register cleanup
which was not implemented previously. Do so.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/543340/
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Konrad Dybcio
2023-06-20 13:10:40 +02:00
committed by Rob Clark
parent 5e46ad83db
commit 6ab410e0ff
1 changed files with 7 additions and 0 deletions
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7
drivers/gpu/drm/msm/adreno/a6xx_gmu.c
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@@ -899,6 +899,13 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu)
/* Make sure there are no outstanding RPMh votes */
a6xx_gmu_rpmh_off(gmu);
/* Clear the WRITEDROPPED fields and put fence into allow mode */
gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_STATUS_CLR, 0x7);
gmu_write(gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);
/* Make sure the above writes go through */
wmb();
/* Halt the gmu cm3 core */
gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);