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drm/amd/display: Build DSC without DCN config

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[Why & How]
DSC needs DCN but we are trying reduce the usage of the
DCN flag. It's easier to build the DSC code sprinkled
around DC core and the DMs and just guard the place where
DSC uses floating point code.

Since DSC is never enabled on non-DCN ASICs this won't
have any effect.

Reviewed-by: Hamza Mahfooz <Hamza.Mahfooz@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland
2023-02-13 15:29:06 -05:00
committed by Alex Deucher
parent efa4c4df86
commit 84c03df58d
2 changed files with 3 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/drm/amd/display/dc/Makefile
View File

@@ -22,14 +22,13 @@
#
# Makefile for Display Core (dc) component.
DC_LIBS = basics bios dml clk_mgr dce gpio irq link virtual
DC_LIBS = basics bios dml clk_mgr dce gpio irq link virtual dsc
ifdef CONFIG_DRM_AMD_DC_DCN
KCOV_INSTRUMENT := n
DC_LIBS += dcn20
DC_LIBS += dsc
DC_LIBS += dcn10
DC_LIBS += dcn21
DC_LIBS += dcn201

2
drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c
View File

@@ -39,6 +39,7 @@
*/
void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps)
{
#if defined(CONFIG_DRM_AMD_DC_DCN)
enum colour_mode mode;
enum bits_per_comp bpc;
bool is_navite_422_or_420;
@@ -59,4 +60,5 @@ void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps)
slice_width, slice_height,
pps->dsc_version_minor);
DC_FP_END();
#endif
}