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arm64: dts: qcom: sm8250: Fix level triggered PMU interrupt polarity

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As per interrupt documentation for SM8250 SoC, the polarity
for level triggered PMU interrupt is low, fix this.

Fixes: 60378f1a17 ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/96680a1c6488955c9eef7973c28026462b2a4ec0.1613468366.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Sai Prakash Ranjan
2021-02-16 15:17:47 +05:30
committed by Bjorn Andersson
parent 97832fa805
commit 93138ef5ac
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/qcom/sm8250.dtsi
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@@ -279,7 +279,7 @@
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
psci {