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arm64: dts: qcom: sc8280xp: describe USB signals properly

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Follow example of other platforms. Rename HS graph nodes to contain
'dwc3_hs' and link SS lanes from DWC3 controllers to QMP PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-7-ad153c747a97@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2024-05-12 01:04:13 +03:00
committed by Bjorn Andersson
parent 757688ad09
commit 93830ef7bb
3 changed files with 70 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
View File

@@ -56,7 +56,7 @@
reg = <0>;
pmic_glink_con0_hs: endpoint {
remote-endpoint = <&usb_0_role_switch>;
remote-endpoint = <&usb_0_dwc3_hs>;
};
};
@@ -91,7 +91,7 @@
reg = <0>;
pmic_glink_con1_hs: endpoint {
remote-endpoint = <&usb_1_role_switch>;
remote-endpoint = <&usb_1_dwc3_hs>;
};
};
@@ -675,6 +675,10 @@
dr_mode = "host";
};
&usb_0_dwc3_hs {
remote-endpoint = <&pmic_glink_con0_hs>;
};
&usb_0_hsphy {
vdda-pll-supply = <&vreg_l9d>;
vdda18-supply = <&vreg_l1c>;
@@ -700,10 +704,6 @@
remote-endpoint = <&pmic_glink_con0_ss>;
};
&usb_0_role_switch {
remote-endpoint = <&pmic_glink_con0_hs>;
};
&usb_1 {
status = "okay";
};
@@ -712,6 +712,10 @@
dr_mode = "host";
};
&usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_con1_hs>;
};
&usb_1_hsphy {
vdda-pll-supply = <&vreg_l4b>;
vdda18-supply = <&vreg_l1c>;
@@ -737,10 +741,6 @@
remote-endpoint = <&pmic_glink_con1_ss>;
};
&usb_1_role_switch {
remote-endpoint = <&pmic_glink_con1_hs>;
};
&xo_board_clk {
clock-frequency = <38400000>;
};

20
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
View File

@@ -117,7 +117,7 @@
reg = <0>;
pmic_glink_con0_hs: endpoint {
remote-endpoint = <&usb_0_role_switch>;
remote-endpoint = <&usb_0_dwc3_hs>;
};
};
@@ -152,7 +152,7 @@
reg = <0>;
pmic_glink_con1_hs: endpoint {
remote-endpoint = <&usb_1_role_switch>;
remote-endpoint = <&usb_1_dwc3_hs>;
};
};
@@ -1131,6 +1131,10 @@
dr_mode = "host";
};
&usb_0_dwc3_hs {
remote-endpoint = <&pmic_glink_con0_hs>;
};
&usb_0_hsphy {
vdda-pll-supply = <&vreg_l9d>;
vdda18-supply = <&vreg_l1c>;
@@ -1156,10 +1160,6 @@
remote-endpoint = <&pmic_glink_con0_ss>;
};
&usb_0_role_switch {
remote-endpoint = <&pmic_glink_con0_hs>;
};
&usb_1 {
status = "okay";
};
@@ -1168,6 +1168,10 @@
dr_mode = "host";
};
&usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_con1_hs>;
};
&usb_1_hsphy {
vdda-pll-supply = <&vreg_l4b>;
vdda18-supply = <&vreg_l1c>;
@@ -1193,10 +1197,6 @@
remote-endpoint = <&pmic_glink_con1_ss>;
};
&usb_1_role_switch {
remote-endpoint = <&pmic_glink_con1_hs>;
};
&usb_2 {
status = "okay";
};

54
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View File

@@ -3222,6 +3222,14 @@
usb_0_qmpphy_out: endpoint {};
};
port@1 {
reg = <1>;
usb_0_qmpphy_usb_ss_in: endpoint {
remote-endpoint = <&usb_0_dwc3_ss>;
};
};
port@2 {
reg = <2>;
@@ -3275,6 +3283,14 @@
usb_1_qmpphy_out: endpoint {};
};
port@1 {
reg = <1>;
usb_1_qmpphy_usb_ss_in: endpoint {
remote-endpoint = <&usb_1_dwc3_ss>;
};
};
port@2 {
reg = <2>;
@@ -3560,8 +3576,23 @@
phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
port {
usb_0_role_switch: endpoint {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_0_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
usb_0_dwc3_ss: endpoint {
remote-endpoint = <&usb_0_qmpphy_usb_ss_in>;
};
};
};
};
@@ -3622,8 +3653,23 @@
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
port {
usb_1_role_switch: endpoint {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_1_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
};
};
};
};