arm64: dts: qcom: sdm630: add USB QMP PHY support

Define USB3 QMP PHY presend on the SDM630 / SDM660 platforms. Enable it by
default in the USB3 host, but (for compatibility), force USB 2.0 mode
for all defined boards. The boards should opt-in to enable USB 3.0
support.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240116-sdm660-usb3-support-v1-3-2fbd683aea77@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2024-01-16 03:10:57 +02:00
committed by Bjorn Andersson
parent 5994dd6075
commit bb5009a24e
4 changed files with 46 additions and 8 deletions

View File

@@ -454,10 +454,16 @@
};
&usb3 {
qcom,select-utmi-as-pipe-clk;
status = "okay";
};
&usb3_dwc3 {
maximum-speed = "high-speed";
phys = <&qusb2phy0>;
phy-names = "usb2-phy";
dr_mode = "peripheral";
extcon = <&extcon_usb>;
};

View File

@@ -658,10 +658,16 @@
};
&usb3 {
qcom,select-utmi-as-pipe-clk;
status = "okay";
};
&usb3_dwc3 {
maximum-speed = "high-speed";
phys = <&qusb2phy0>;
phy-names = "usb2-phy";
dr_mode = "peripheral";
extcon = <&extcon_usb>;
};

View File

@@ -1293,7 +1293,6 @@
"ss_phy_irq";
power-domains = <&gcc USB_30_GDSC>;
qcom,select-utmi-as-pipe-clk;
resets = <&gcc GCC_USB_30_BCR>;
@@ -1304,17 +1303,38 @@
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
/*
* SDM630 technically supports USB3 but I
* haven't seen any devices making use of it.
*/
maximum-speed = "high-speed";
phys = <&qusb2phy0>;
phy-names = "usb2-phy";
phys = <&qusb2phy0>, <&usb3_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
snps,hird-threshold = /bits/ 8 <0>;
};
};
usb3_qmpphy: phy@c010000 {
compatible = "qcom,sdm660-qmp-usb3-phy";
reg = <0x0c010000 0x1000>;
clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
<&gcc GCC_USB3_CLKREF_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
<&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "aux",
"ref",
"cfg_ahb",
"pipe";
clock-output-names = "usb3_phy_pipe_clk_src";
#clock-cells = <0>;
#phy-cells = <0>;
resets = <&gcc GCC_USB3_PHY_BCR>,
<&gcc GCC_USB3PHY_PHY_BCR>;
reset-names = "phy",
"phy_phy";
qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>;
status = "disabled";
};
qusb2phy0: phy@c012000 {
compatible = "qcom,sdm660-qusb2-phy";
reg = <0x0c012000 0x180>;

View File

@@ -413,10 +413,16 @@
};
&usb3 {
qcom,select-utmi-as-pipe-clk;
status = "okay";
};
&usb3_dwc3 {
maximum-speed = "high-speed";
phys = <&qusb2phy0>;
phy-names = "usb2-phy";
dr_mode = "peripheral";
extcon = <&extcon_usb>;
};