ARM: dts: aspeed: bletchley: Enable wdtrst1
Enable WDTRST1 external signal to send a reset pulse to peripherals while BMC reset. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20221226054535.2836110-3-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
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@@ -1064,3 +1064,14 @@
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bias-disable;
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};
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};
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&wdt1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdtrst1_default>;
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aspeed,reset-type = "soc";
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aspeed,external-signal;
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aspeed,ext-push-pull;
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aspeed,ext-active-high;
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aspeed,ext-pulse-duration = <256>;
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};
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