wifi: rtw89: 8922a: rfk: support firmware command RX DCK v1 format
RX DCK stands for receiver DC calibration. The v1 format adds a field to indicate the calibration is for operation channel or an average value for all scanning channels. Update the format accordingly, and increase firmware format sequence to 2. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240913071340.41822-3-pkshih@realtek.com
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@@ -4445,6 +4445,7 @@ enum rtw89_fw_feature {
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RTW89_FW_FEATURE_SCAN_OFFLOAD_BE_V0,
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RTW89_FW_FEATURE_WOW_REASON_V1,
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RTW89_FW_FEATURE_RFK_PRE_NOTIFY_V0,
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RTW89_FW_FEATURE_RFK_RXDCK_V0,
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};
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struct rtw89_fw_suit {
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@@ -687,6 +687,7 @@ static const struct __fw_feat_cfg fw_feat_tbl[] = {
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__CFG_FW_FEAT(RTL8922A, ge, 0, 35, 12, 0, BEACON_FILTER),
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__CFG_FW_FEAT(RTL8922A, ge, 0, 35, 22, 0, WOW_REASON_V1),
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__CFG_FW_FEAT(RTL8922A, lt, 0, 35, 31, 0, RFK_PRE_NOTIFY_V0),
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__CFG_FW_FEAT(RTL8922A, lt, 0, 35, 42, 0, RFK_RXDCK_V0),
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};
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static void rtw89_fw_iterate_feature_cfg(struct rtw89_fw_info *fw,
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@@ -5518,30 +5519,44 @@ fail:
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}
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int rtw89_fw_h2c_rf_rxdck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
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const struct rtw89_chan *chan)
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const struct rtw89_chan *chan, bool is_chl_k)
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{
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struct rtw89_h2c_rf_rxdck_v0 *v0;
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struct rtw89_h2c_rf_rxdck *h2c;
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u32 len = sizeof(*h2c);
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struct sk_buff *skb;
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int ver = -1;
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int ret;
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if (RTW89_CHK_FW_FEATURE(RFK_RXDCK_V0, &rtwdev->fw)) {
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len = sizeof(*v0);
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ver = 0;
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}
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c RF RXDCK\n");
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return -ENOMEM;
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}
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skb_put(skb, len);
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v0 = (struct rtw89_h2c_rf_rxdck_v0 *)skb->data;
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v0->len = len;
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v0->phy = phy_idx;
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v0->is_afe = false;
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v0->kpath = RF_AB;
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v0->cur_band = chan->band_type;
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v0->cur_bw = chan->band_width;
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v0->cur_ch = chan->channel;
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v0->rxdck_dbg_en = rtw89_debug_is_enabled(rtwdev, RTW89_DBG_RFK);
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if (ver == 0)
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goto hdr;
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h2c = (struct rtw89_h2c_rf_rxdck *)skb->data;
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h2c->is_chl_k = is_chl_k;
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h2c->len = len;
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h2c->phy = phy_idx;
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h2c->is_afe = false;
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h2c->kpath = RF_AB;
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h2c->cur_band = chan->band_type;
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h2c->cur_bw = chan->band_width;
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h2c->cur_ch = chan->channel;
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h2c->rxdck_dbg_en = rtw89_debug_is_enabled(rtwdev, RTW89_DBG_RFK);
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hdr:
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rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
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H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
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H2C_FUNC_RFK_RXDCK_OFFLOAD, 0, 0, len);
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@@ -4286,7 +4286,7 @@ struct rtw89_h2c_rf_dack {
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__le32 type;
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} __packed;
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struct rtw89_h2c_rf_rxdck {
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struct rtw89_h2c_rf_rxdck_v0 {
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u8 len;
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u8 phy;
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u8 is_afe;
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@@ -4297,6 +4297,11 @@ struct rtw89_h2c_rf_rxdck {
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u8 rxdck_dbg_en;
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} __packed;
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struct rtw89_h2c_rf_rxdck {
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struct rtw89_h2c_rf_rxdck_v0 v0;
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u8 is_chl_k;
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} __packed;
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enum rtw89_rf_log_type {
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RTW89_RF_RUN_LOG = 0,
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RTW89_RF_RPT_LOG = 1,
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@@ -4501,7 +4506,7 @@ int rtw89_fw_h2c_rf_txgapk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
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int rtw89_fw_h2c_rf_dack(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
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const struct rtw89_chan *chan);
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int rtw89_fw_h2c_rf_rxdck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
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const struct rtw89_chan *chan);
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const struct rtw89_chan *chan, bool is_chl_k);
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int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev,
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u8 h2c_class, u8 h2c_func, u8 *buf, u16 len,
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bool rack, bool dack);
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@@ -3171,13 +3171,13 @@ EXPORT_SYMBOL(rtw89_phy_rfk_dack_and_wait);
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int rtw89_phy_rfk_rxdck_and_wait(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx phy_idx,
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const struct rtw89_chan *chan,
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unsigned int ms)
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bool is_chl_k, unsigned int ms)
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{
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int ret;
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rtw89_phy_rfk_report_prep(rtwdev);
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ret = rtw89_fw_h2c_rf_rxdck(rtwdev, phy_idx, chan);
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ret = rtw89_fw_h2c_rf_rxdck(rtwdev, phy_idx, chan, is_chl_k);
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if (ret)
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return ret;
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@@ -929,7 +929,7 @@ int rtw89_phy_rfk_dack_and_wait(struct rtw89_dev *rtwdev,
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int rtw89_phy_rfk_rxdck_and_wait(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx phy_idx,
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const struct rtw89_chan *chan,
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unsigned int ms);
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bool is_chl_k, unsigned int ms);
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void rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx phy,
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const struct rtw89_chan *chan,
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@@ -13,7 +13,7 @@
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#include "rtw8922a_rfk.h"
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#include "util.h"
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#define RTW8922A_FW_FORMAT_MAX 1
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#define RTW8922A_FW_FORMAT_MAX 2
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#define RTW8922A_FW_BASENAME "rtw89/rtw8922a_fw"
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#define RTW8922A_MODULE_FIRMWARE \
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RTW8922A_FW_BASENAME "-" __stringify(RTW8922A_FW_FORMAT_MAX) ".bin"
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@@ -1998,7 +1998,7 @@ static void rtw8922a_rfk_init_late(struct rtw89_dev *rtwdev)
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rtw89_phy_rfk_pre_ntfy_and_wait(rtwdev, RTW89_PHY_0, 5);
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rtw89_phy_rfk_dack_and_wait(rtwdev, RTW89_PHY_0, chan, 58);
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rtw89_phy_rfk_rxdck_and_wait(rtwdev, RTW89_PHY_0, chan, 32);
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rtw89_phy_rfk_rxdck_and_wait(rtwdev, RTW89_PHY_0, chan, false, 32);
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}
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static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath)
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@@ -2037,7 +2037,7 @@ static void rtw8922a_rfk_channel(struct rtw89_dev *rtwdev, struct rtw89_vif *rtw
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rtw89_phy_rfk_iqk_and_wait(rtwdev, phy_idx, chan, 84);
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rtw89_phy_rfk_tssi_and_wait(rtwdev, phy_idx, chan, RTW89_TSSI_NORMAL, 20);
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rtw89_phy_rfk_dpk_and_wait(rtwdev, phy_idx, chan, 34);
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rtw89_phy_rfk_rxdck_and_wait(rtwdev, RTW89_PHY_0, chan, 32);
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rtw89_phy_rfk_rxdck_and_wait(rtwdev, RTW89_PHY_0, chan, true, 32);
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rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);
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rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_CHLK, BTC_WRFK_STOP);
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