drm/amd/display: Update Z8 watermarks for DCN314
[Why & How] Update from HW, need to lower watermarks for enter/enter+exit latency. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher
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@@ -149,8 +149,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_14_soc = {
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.num_states = 5,
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.sr_exit_time_us = 16.5,
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.sr_enter_plus_exit_time_us = 18.5,
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.sr_exit_z8_time_us = 442.0,
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.sr_enter_plus_exit_z8_time_us = 560.0,
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.sr_exit_z8_time_us = 280.0,
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.sr_enter_plus_exit_z8_time_us = 350.0,
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.writeback_latency_us = 12.0,
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.dram_channel_width_bytes = 4,
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.round_trip_ping_latency_dcfclk_cycles = 106,
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