drm/amd/pm: update XGMI RAS UE criteria for sum v13.0.6
Add more possible ext error code. v2: still use ext error code instead of UC bit. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
@@ -2693,7 +2693,8 @@ static int mca_pcs_xgmi_mca_get_err_count(const struct mca_ras_info *mca_ras, st
|
||||
ext_error_code = MCA_REG__STATUS__ERRORCODEEXT(entry->regs[MCA_REG_IDX_STATUS]);
|
||||
err_cnt = MCA_REG__MISC0__ERRCNT(entry->regs[MCA_REG_IDX_MISC0]);
|
||||
|
||||
if (type == AMDGPU_MCA_ERROR_TYPE_UE && ext_error_code == 0)
|
||||
if (type == AMDGPU_MCA_ERROR_TYPE_UE &&
|
||||
(ext_error_code == 0 || ext_error_code == 9))
|
||||
*count = err_cnt;
|
||||
else if (type == AMDGPU_MCA_ERROR_TYPE_CE && ext_error_code == 6)
|
||||
*count = err_cnt;
|
||||
|
||||
Reference in New Issue
Block a user