Merge tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX dt-bindings change for 5.18:

- New board compatible for Protonic PRT8MM, Toradex Verdin-imx8mm,
  emCON-MX8M Mini, i.MX8MM GW7903.
- A series of patches from Lucas Stach adding support for i.MX8M VPU
  and HSIO blk-ctrl power domains.

* tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: imx: add imx8mm gw7903 support
  dt-bindings: soc: add binding for i.MX8MP HSIO blk-ctrl
  dt-bindings: power: imx8mp: add defines for HSIO blk-ctrl domains
  dt-bindings: power: add defines for i.MX8MP power domain
  dt-bindings: arm: fsl: add toradex,verdin-imx8mm et al.
  dt-bindings: arm: Add emtrion hardware emCON-MX8M Mini
  dt-bindings: arm: imx: add Protonic PRT8MM board compatible
  dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl
  dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains

Link: https://lore.kernel.org/r/20220222075226.160187-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2022-02-25 16:04:11 +01:00
6 changed files with 213 additions and 0 deletions

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@@ -762,6 +762,7 @@ properties:
- enum:
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
- boundary,imx8mm-nitrogen8mm # i.MX8MM Nitrogen Board
- emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
- fsl,imx8mm-evk # i.MX8MM EVK Board
- gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit
@@ -769,8 +770,13 @@ properties:
- gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit
- gw,imx8mm-gw7901 # i.MX8MM Gateworks Board
- gw,imx8mm-gw7902 # i.MX8MM Gateworks Board
- gw,imx8mm-gw7903 # i.MX8MM Gateworks Board
- kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM
- toradex,verdin-imx8mm # Verdin iMX8M Mini Modules
- toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Modules without Wi-Fi / BT
- toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Modules
- variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module
- prt,prt8mm # i.MX8MM Protonic PRT8MM Board
- const: fsl,imx8mm
- description: Engicam i.Core MX8M Mini SoM based boards
@@ -787,6 +793,24 @@ properties:
- const: kontron,imx8mm-n801x-som
- const: fsl,imx8mm
- description: Toradex Boards with Verdin iMX8M Mini Modules
items:
- enum:
- toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia
- toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board
- const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT
- const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
- const: fsl,imx8mm
- description: Toradex Boards with Verdin iMX8M Mini Wi-Fi / BT Modules
items:
- enum:
- toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia
- toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B.
- const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module
- const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
- const: fsl,imx8mm
- description: Variscite VAR-SOM-MX8MM based boards
items:
- const: variscite,var-som-mx8mm-symphony

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@@ -28,6 +28,7 @@ properties:
- fsl,imx8mn-gpc
- fsl,imx8mq-gpc
- fsl,imx8mm-gpc
- fsl,imx8mp-gpc
reg:
maxItems: 1
@@ -57,6 +58,7 @@ properties:
include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc
include/dt-bindings/power/imx8mp-power.h for fsl,imx8mp-gpc
maxItems: 1
clocks:

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@@ -0,0 +1,78 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX8MP HSIO blk-ctrl
maintainers:
- Lucas Stach <l.stach@pengutronix.de>
description:
The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
the NoC and ensuring proper power sequencing of the high-speed IO
(USB an PCIe) peripherals located in the HSIO domain of the SoC.
properties:
compatible:
items:
- const: fsl,imx8mp-hsio-blk-ctrl
- const: syscon
reg:
maxItems: 1
'#power-domain-cells':
const: 1
power-domains:
minItems: 6
maxItems: 6
power-domain-names:
items:
- const: bus
- const: usb
- const: usb-phy1
- const: usb-phy2
- const: pcie
- const: pcie-phy
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: usb
- const: pcie
required:
- compatible
- reg
- power-domains
- power-domain-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mp-clock.h>
#include <dt-bindings/power/imx8mp-power.h>
hsio_blk_ctrl: blk-ctrl@32f10000 {
compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
reg = <0x32f10000 0x24>;
clocks = <&clk IMX8MP_CLK_USB_ROOT>,
<&clk IMX8MP_CLK_PCIE_ROOT>;
clock-names = "usb", "pcie";
power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,
<&pgc_usb1_phy>, <&pgc_usb2_phy>,
<&pgc_hsiomix>, <&pgc_pcie_phy>;
power-domain-names = "bus", "usb", "usb-phy1",
"usb-phy2", "pcie", "pcie-phy";
#power-domain-cells = <1>;
};

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@@ -0,0 +1,71 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX8MQ VPU blk-ctrl
maintainers:
- Lucas Stach <l.stach@pengutronix.de>
description:
The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
the NoC and ensuring proper power sequencing of the VPU peripherals
located in the VPU domain of the SoC.
properties:
compatible:
items:
- const: fsl,imx8mq-vpu-blk-ctrl
reg:
maxItems: 1
'#power-domain-cells':
const: 1
power-domains:
minItems: 3
maxItems: 3
power-domain-names:
items:
- const: bus
- const: g1
- const: g2
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: g1
- const: g2
required:
- compatible
- reg
- power-domains
- power-domain-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mq-clock.h>
#include <dt-bindings/power/imx8mq-power.h>
vpu_blk_ctrl: blk-ctrl@38320000 {
compatible = "fsl,imx8mq-vpu-blk-ctrl";
reg = <0x38320000 0x100>;
power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
power-domain-names = "bus", "g1", "g2";
clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
<&clk IMX8MQ_CLK_VPU_G2_ROOT>;
clock-names = "g1", "g2";
#power-domain-cells = <1>;
};

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@@ -0,0 +1,35 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* Copyright (C) 2020 Pengutronix, Sascha Hauer <kernel@pengutronix.de>
*/
#ifndef __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__
#define __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__
#define IMX8MP_POWER_DOMAIN_MIPI_PHY1 0
#define IMX8MP_POWER_DOMAIN_PCIE_PHY 1
#define IMX8MP_POWER_DOMAIN_USB1_PHY 2
#define IMX8MP_POWER_DOMAIN_USB2_PHY 3
#define IMX8MP_POWER_DOMAIN_MLMIX 4
#define IMX8MP_POWER_DOMAIN_AUDIOMIX 5
#define IMX8MP_POWER_DOMAIN_GPU2D 6
#define IMX8MP_POWER_DOMAIN_GPUMIX 7
#define IMX8MP_POWER_DOMAIN_VPUMIX 8
#define IMX8MP_POWER_DOMAIN_GPU3D 9
#define IMX8MP_POWER_DOMAIN_MEDIAMIX 10
#define IMX8MP_POWER_DOMAIN_VPU_G1 11
#define IMX8MP_POWER_DOMAIN_VPU_G2 12
#define IMX8MP_POWER_DOMAIN_VPU_VC8000E 13
#define IMX8MP_POWER_DOMAIN_HDMIMIX 14
#define IMX8MP_POWER_DOMAIN_HDMI_PHY 15
#define IMX8MP_POWER_DOMAIN_MIPI_PHY2 16
#define IMX8MP_POWER_DOMAIN_HSIOMIX 17
#define IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP 18
#define IMX8MP_HSIOBLK_PD_USB 0
#define IMX8MP_HSIOBLK_PD_USB_PHY1 1
#define IMX8MP_HSIOBLK_PD_USB_PHY2 2
#define IMX8MP_HSIOBLK_PD_PCIE 3
#define IMX8MP_HSIOBLK_PD_PCIE_PHY 4
#endif

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@@ -18,4 +18,7 @@
#define IMX8M_POWER_DOMAIN_MIPI_CSI2 9
#define IMX8M_POWER_DOMAIN_PCIE2 10
#define IMX8MQ_VPUBLK_PD_G1 0
#define IMX8MQ_VPUBLK_PD_G2 1
#endif