Commit Graph

506942 Commits

Author SHA1 Message Date
Krzysztof Kozlowski
78ce612860 regulator: max77686: Add suspend disable for some LDOs
Some LDOs of Maxim 77686 PMIC support disabling during system suspend
(LDO{2,6,7,8,10,11,12,14,15,16}). This was already implemented as part
of set_suspend_mode function. In that case the mode was one of:
 - disable,
 - normal mode,
 - low power mode.
However there are no bindings for setting the mode during suspend.

Add suspend disable for LDO regulators supporting this. Re-use existing
max77686_buck_set_suspend_disable() function. This helps reducing
energy consumption during system sleep.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-31 12:42:52 +00:00
Krzysztof Kozlowski
a1dd913f4e regulator: max77802: Remove suspend_enable
The Maxim 77802 PMIC regulators do not have special enable configuration
for suspend. The driver instead enabled them manually which is not a
best way to deal with suspend.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-31 12:34:16 +00:00
Subhransu S. Prusty
1a6db0bd26 ASoC: Intel: mrfld: Fix runtime pm calls in sst_open_pcm_stream
It's already done in open/close.

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-31 12:29:50 +00:00
Max Filippov
d004ebbef7 ASoC: tlv320aic23: make codecs selectable in Kconfig
Now that manual selection of drivers for audio subsystem components is
preferred AIC23 codec must be selectable in Kconfig to make it possible.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-31 12:25:39 +00:00
Peter Griffin
4b171b3d3b reset: sti: Document sti-picophyreset controllers bindings.
Add DT bindings documentation for sti-picophyreset controller.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 13:00:38 +01:00
Peter Griffin
3ba9204308 reset: stih407: Add softreset, powerdown and picophy controllers
This patch adds softreset, powerdown and picophy reset controllers for
the STiH407 SoC.

With this patch three new devices are registered: -
1. st,stih407-powerdown
2. st,stih407-softreset
3. st,stih407-picophyreset

All three devices use system configuration registers mapped via regmap to
perform the reset or powerdown. The powerdown controller also has
an acknowledgement.

A separate picophy reset controller manages the different reset channels within
the picophy, which have a different polarity to the other system softresets.
Managing these different picophy softreset channels is necessary to correctly
handle resuming from suspend when USB2 devices are plugged into the USB3 port.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 13:00:15 +01:00
Pablo Neira Ayuso
127917c29a netfilter: nft_reject_bridge: restrict reject to prerouting and input
Restrict the reject expression to the prerouting and input bridge
hooks. If we allow this to be used from forward or any other later
bridge hook, if the frame is flooded to several ports, we'll end up
sending several reject packets, one per cloned packet.

Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31 12:50:09 +01:00
Pablo Neira Ayuso
523b929d54 netfilter: nft_reject_bridge: don't use IP stack to reject traffic
If the packet is received via the bridge stack, this cannot reject
packets from the IP stack.

This adds functions to build the reject packet and send it from the
bridge stack. Comments and assumptions on this patch:

1) Validate the IPv4 and IPv6 headers before further processing,
   given that the packet comes from the bridge stack, we cannot assume
   they are clean. Truncated packets are dropped, we follow similar
   approach in the existing iptables match/target extensions that need
   to inspect layer 4 headers that is not available. This also includes
   packets that are directed to multicast and broadcast ethernet
   addresses.

2) br_deliver() is exported to inject the reject packet via
   bridge localout -> postrouting. So the approach is similar to what
   we already do in the iptables reject target. The reject packet is
   sent to the bridge port from which we have received the original
   packet.

3) The reject packet is forged based on the original packet. The TTL
   is set based on sysctl_ip_default_ttl for IPv4 and per-net
   ipv6.devconf_all hoplimit for IPv6.

Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31 12:50:08 +01:00
Pablo Neira Ayuso
8bfcdf6671 netfilter: nf_reject_ipv6: split nf_send_reset6() in smaller functions
That can be reused by the reject bridge expression to build the reject
packet. The new functions are:

* nf_reject_ip6_tcphdr_get(): to sanitize and to obtain the TCP header.
* nf_reject_ip6hdr_put(): to build the IPv6 header.
* nf_reject_ip6_tcphdr_put(): to build the TCP header.

Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31 12:49:57 +01:00
Pablo Neira Ayuso
052b9498ee netfilter: nf_reject_ipv4: split nf_send_reset() in smaller functions
That can be reused by the reject bridge expression to build the reject
packet. The new functions are:

* nf_reject_ip_tcphdr_get(): to sanitize and to obtain the TCP header.
* nf_reject_iphdr_put(): to build the IPv4 header.
* nf_reject_ip_tcphdr_put(): to build the TCP header.

Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31 12:49:05 +01:00
Pablo Neira Ayuso
4d87716cd0 netfilter: nf_tables_bridge: update hook_mask to allow {pre,post}routing
Fixes: 36d2af5 ("netfilter: nf_tables: allow to filter from prerouting and postrouting")
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31 12:44:56 +01:00
Emmanuel Grumbach
3e4b1b4a91 iwlwfifi: fix WANT_DEV_COREDUMP selection in Kconfig
Fix my mistake while sending Johannes's

commit aadede6e9f
Author: Johannes Berg <johannes.berg@intel.com>
Date:   Thu Oct 9 17:01:36 2014 +0200

    iwlwifi: mvm: port to devcoredump framework

Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-10-31 13:10:32 +02:00
Gabriel FERNANDEZ
43ca480c4e ARM: STi: DT: STiH407: Fix: clk-tmds-hdmi clock is missing
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 12:07:44 +01:00
Gabriel FERNANDEZ
77deed2bbd ARM: STi: DT: STiH407: Add all defines for STiH407 DT clocks
This patch adds all clock defines for clockgen C0,D0,D2 and D3

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 12:07:43 +01:00
Bard Liao
6879db7648 ASoC: rt286: reduce power consumption
This patch will optimize the power consumption of rt286.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-31 11:03:11 +00:00
David Jeffery
b2de525f09 Return short read or 0 at end of a raw device, not EIO
Author: David Jeffery <djeffery@redhat.com>
Changes to the basic direct I/O code have broken the raw driver when reading
to the end of a raw device.  Instead of returning a short read for a read that
extends partially beyond the device's end or 0 when at the end of the device,
these reads now return EIO.

The raw driver needs the same end of device handling as was added for normal
block devices.  Using blkdev_read_iter, which has the needed size checks,
prevents the EIO conditions at the end of the device.

Signed-off-by: David Jeffery <djeffery@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2014-10-31 06:33:26 -04:00
Al Viro
b0afd8e5db isofs: don't bother with ->d_op for normal case
we only need it for joliet and case-insensitive mounts

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2014-10-31 06:33:17 -04:00
Varka Bhadram
0c49e2f668 pinctrl-bcm281xx: remove duplicate check on resource
Sanity check on resource happening with devm_ioremap_resource().

Signed-off-by: Varka Bhadram <varkab@cdac.in>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-31 10:58:39 +01:00
Abhilash Kesavan
932e98224d clk: samsung: exynos7: add gate clock for ADC block
Add clock support for the ADC interface in Exynos7.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:54 +01:00
Naveen Krishna Ch
2ab2dfe5d4 clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocks
Add clock support for the watchdog timer, pwm timer and thermal
management unit IPs in Exynos7.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:53 +01:00
Naveen Krishna Ch
f5e127cd5e clk: samsung: exynos7: add clocks for RTC block
Add clock support for the RTC block in Exynos7.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:52 +01:00
Naveen Krishna Ch
6d0c8c723f clk: samsung: exynos7: add clocks for MMC block
Exynos7 supports 3 MMC channels, add the MMC gate clocks to
support them.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:51 +01:00
Naveen Krishna Ch
57a2b485fa clk: samsung: exynos7: add clocks for I2C block
Exynos7 supports 12 I2C channels, add the I2C gate clocks to
support them.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:51 +01:00
Naveen Krishna Ch
532abc3a4a clk: samsung: add initial clock support for Exynos7 SoC
Add initial clock support for Exynos7 SoC which is required
to bring up platforms based on Exynos7.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:47 +01:00
Naveen Krishna Ch
0e5af27008 clk: samsung: Add fixed_factor_clocks field to struct exynos_cmu_info
Add the fields "fixed_factor_clks" and "nr_fixed_factor_clks" to
"struct exynos_cmu_info" to allow registering of fixed factor
clocks as well with exynos_cmu_register_one().

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:46 +01:00
Naveen Krishna Ch
16a9013b83 clk: samsung: Factor out the common code to clk.c
While adding clock support for Exynos5260, the infrastructure to
register multiple clock controllers was introduced. Factor out the
support for registering multiple clock controller from Exynos5260
clock code to common samsung clock code so that it can be used by
other Exynos SoC which have multiple clock controllers.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:45 +01:00
Naveen Krishna Ch
0c23e2af67 clk: samsung: add support for 145xx and 1460x PLLs
PLL145xx is similar to PLL35xx and PLL1460x is almost similar
to PLL46xx with minor differences in bit positions. Hence,
reuse the functions defined for pll_35xx and pll_46xx to
support 145xx and 1460x PLLs respectively.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:35 +01:00
Gabriel FERNANDEZ
89e5c08574 ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
Patch adds DT entries for clockgen A9

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:10 +01:00
Gabriel FERNANDEZ
6e67a5105d ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
Patch adds DT entries for clockgen D0/D2/D3

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:10 +01:00
Gabriel FERNANDEZ
1befe7e49f ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
Patch adds DT entries for clockgen C0

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:09 +01:00
Gabriel FERNANDEZ
58a8d9be52 ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
Patch adds DT entries for clockgen A0

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:08 +01:00
Lee Jones
45188b726e ARM: DT: STi: STiH416: Add DT node for ST's SATA device
ARM: DT: STi: STiH416: Add DT node for ST's SATA device

Cc: devicetree@vger.kernel.org
Acked-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:07 +01:00
Lee Jones
d436a60944 ARM: DT: STi: STiH416: Add DT node for MiPHY365x
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:06 +01:00
Lee Jones
0f6c28b7a4 ARM: STi: DT: STiH416: Supply Thermal Controller Device Tree nodes
We supply two of these.  The first is controlled by the System Configuration
registers and the second one provided is a more traditional 'memory mapped'
variant.  Each are handled by they own sub-driver.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:05 +01:00
Peter Griffin
f631bc1672 ARM: STi: DT: Enable second sdhci controller for stih416 b2020 boards.
The second controller is only present on the stih416 SoC. Also
mark this as non-removeable as its eMMC.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:04 +01:00
Peter Griffin
6919edc84c ARM: STi: DT: Enable mmc0 for both stih415 and stih416 SoCs
Because the first sdhci controller is present on both stih415 and
stih416 SoC which can both populate the b2020 board, it can be
enabled in the generic DT file.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:03 +01:00
Peter Griffin
7b40c726b1 ARM: STi: DT: Add sdhci controller for stih415
This patch adds device tree config for the sdhci controller
on the stih415 SoC.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:02 +01:00
Peter Griffin
14304e0056 ARM: STi: DT: Add sdhci pin configuration for stih415
This patch adds the required pin config for the sdhci controller
present in the stih415 SoC.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:02 +01:00
Peter Griffin
42d6f28d64 ARM: STi: DT: Add sdhci controller for stih416
This patch adds device tree config for both sdhci controllers
on the stih416 SoC.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:01 +01:00
Peter Griffin
8106d21ca8 ARM: STi: DT: Add sdhci pins for stih416
This adds the required pin config for both SDHCI controllers on
the stih416 SoC.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:00 +01:00
Peter Griffin
b864a0b98e ARM: sti: Add STiH407 reset controller support.
This patch adds the reset controller DT nodes for the powerdown,
 softreset and picophy controllers.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:58:59 +01:00
Peter Griffin
c273211419 ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESET
The STiH407 is a STMicroelectronics Digital Consumer electronics
family, targetted at set-top-box and other audio/video applications.

This patch selects the reset controller driver for this family which
is essential to take various IP's on the SoC out of powerdown / reset.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:58:58 +01:00
Lee Jones
dc62bfdfa3 ARM: STi: DT: STiH41x: Convert all uppercase non-defines to lowercase
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:58:57 +01:00
Sinclair Yeh
9a72384d86 drm/vmwgfx: Filter out modes those cannot be supported by the current VRAM size.
When screen objects are enabled, the bpp is assumed to be 32, otherwise
it is set to 16.

v2:
* Use u32 instead of u64 for assumed_bpp.
* Fixed mechanism to check for screen objects
* Limit the back buffer size to VRAM.

Signed-off-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Cc: <stable@vger.kernel.org>
2014-10-31 09:58:06 +01:00
Thomas Hellstrom
0468ab5b79 drm/vmwgfx: Fix hash key computation
The hash key computation in vmw_cmdbuf_res_remove incorrectly didn't take
the resource type into account, contrary to all the other related functions.
This becomes important when the cmdbuf resource manager handles more than
one resource type.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-10-31 09:54:22 +01:00
Maxime Coquelin
c759e5f76b reset: stih407: Add reset controllers DT bindings
This patch adds softreset, powerdown and picophy reset controllers
DT bindings for the STiH407 SoC.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:47:54 +01:00
Rob Clark
21e88620aa drm/vmwgfx: fix lock breakage
After:

commit d059f652e7
Author:     Daniel Vetter <daniel.vetter@ffwll.ch>
AuthorDate: Fri Jul 25 18:07:40 2014 +0200

    drm: Handle legacy per-crtc locking with full acquire ctx

drm_mode_cursor_common() was switched to use drm_modeset_(un)lock_crtc()
which uses full aquire ctx.  So dropping/reaquiring the lock via
drm_modeset_(un)lock() directly isn't the right thing to do, as lockdep
kindly points out.

The 'FIXME's about sorting out whether vmwgfx *really* needs to lock-all
for cursor updates still apply.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Tested-by: Thomas Hellstrom <thellstrom@vmware.com>
2014-10-31 09:44:35 +01:00
Takashi Iwai
4c41421657 Merge branch 'topic/kerneldoc' into for-next 2014-10-31 09:31:06 +01:00
Johannes Berg
de29eda892 mac80211-hwsim: add missing policy entries
A few recent additions to the netlink attributes neglected
to add policy entries, fix that now.

Reported-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2014-10-31 09:26:06 +01:00
Chen-Yu Tsai
fec99debbc ARM: dts: sun9i: Enable uart4 for A80 Optimus board
The A80 Optimus board exposes uart4 on the GPIO expansion header.
Enable it so we can use it.

Also enable the internal pull-ups, as there doesn't seem to be
external pull-up resistors for pins on the expansion header.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31 09:25:52 +01:00