Merge series from Martin Povišer <povik+lin@cutebit.org>:
Analog Devices SSM3515 is a simple speaker amp that Apple is
using in their 2021 iMacs, possibly elsewhere.
Apply a workaround for what appears to be a hardware quirk.
The problem seems to happen when enabling "whole chip power" (bit D7
register R6) for the very first time after the chip receives power. If
either "output" (D4) or "DAC" (D3) aren't powered on at that time,
playback becomes very distorted later on.
This happens on the Google Chameleon v3, as well as on a ZYBO Z7-10:
https://ez.analog.com/audio/f/q-a/543726/solved-ssm2603-right-output-offset-issue/480229
I suspect this happens only when using an external MCLK signal (which
is the case for both of these boards).
Here are some experiments run on a Google Chameleon v3. These were run
in userspace using a wrapper around the i2cset utility:
ssmset() {
i2cset -y 0 0x1a $(($1*2)) $2
}
For each of the following sequences, we apply power to the ssm2603
chip, set the configuration registers R0-R5 and R7-R8, run the selected
sequence, and check for distortions on playback.
ssmset 0x09 0x01 # core
ssmset 0x06 0x07 # chip, out, dac
OK
ssmset 0x09 0x01 # core
ssmset 0x06 0x87 # out, dac
ssmset 0x06 0x07 # chip
OK
(disable MCLK)
ssmset 0x09 0x01 # core
ssmset 0x06 0x1f # chip
ssmset 0x06 0x07 # out, dac
(enable MCLK)
OK
ssmset 0x09 0x01 # core
ssmset 0x06 0x1f # chip
ssmset 0x06 0x07 # out, dac
NOT OK
ssmset 0x06 0x1f # chip
ssmset 0x09 0x01 # core
ssmset 0x06 0x07 # out, dac
NOT OK
ssmset 0x09 0x01 # core
ssmset 0x06 0x0f # chip, out
ssmset 0x06 0x07 # dac
NOT OK
ssmset 0x09 0x01 # core
ssmset 0x06 0x17 # chip, dac
ssmset 0x06 0x07 # out
NOT OK
For each of the following sequences, we apply power to the ssm2603
chip, run the selected sequence, issue a reset with R15, configure
R0-R5 and R7-R8, run one of the NOT OK sequences from above, and check
for distortions.
ssmset 0x09 0x01 # core
ssmset 0x06 0x07 # chip, out, dac
OK
(disable MCLK)
ssmset 0x09 0x01 # core
ssmset 0x06 0x07 # chip, out, dac
(enable MCLK after reset)
NOT OK
ssmset 0x09 0x01 # core
ssmset 0x06 0x17 # chip, dac
NOT OK
ssmset 0x09 0x01 # core
ssmset 0x06 0x0f # chip, out
NOT OK
ssmset 0x06 0x07 # chip, out, dac
NOT OK
Signed-off-by: Paweł Anikiel <pan@semihalf.com
Link: https://lore.kernel.org/r/20230508113037.137627-8-pan@semihalf.com
Signed-off-by: Mark Brown <broonie@kernel.org
Merge series from Srinivas Kandagatla <srinivas.kandagatla@linaro.org>:
This patchset adds support to displayport on AudioReach.
Patches are tested on X13s with two display ports.
When the CPU supplies bit/frame clocks, the system clock (clk_i2s)
is divided to produce the bit clock. This is a simple 1/N divider
with a fairly limited range, so for a given system clock frequency
only a few sample rates can be produced. Usually a wider range of
sample rates is supported by varying the system clock frequency.
The old calculation method was not very robust and could easily
produce the wrong clock rate, especially with non-standard rates.
For example, if the system clock is 1.99x the target bit clock
rate, the divider would be calculated as 1 instead of the more
accurate 2.
Instead, use a more accurate method that considers two adjacent
divider settings and selects the one that produces the least error
versus the requested rate. If the error is 5% or higher then the
rate setting is rejected to prevent garbled audio.
Skip divider calculation when the codec is supplying both the bit
and frame clock; in that case, the divider outputs are unused and
we don't want to constrain the sample rate.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com
Link: https://lore.kernel.org/r/20230509125134.208129-1-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org
Merge series from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>:
Many ASoC drivers are using dummy DAI.
I have 2 concern about it. 1st one is there is no guarantee that local
strings ("snd-soc-dummy-dai", "snd-soc-dummy") are kept until the card
was binded if it was added at subfunction.
2nd one is we can use common snd_soc_dai_link_component for it.
This patch-set adds common asoc_dummy_dlc, and use it.
Merge series from AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>:
This series performs some cleanups for mainly MT8195 and switches
both MT8195 and MT8186's SOF driver to the snd_sof_ipc_process_reply()
helper.
On i.MX8MP, the sai MCLK is bound with TX/RX enable bit,
which means the TX/RE enable bit need to be enabled then
MCLK can be output on PAD.
Some codec (for example: WM8962) needs the MCLK output
earlier, otherwise there will be issue for codec
configuration.
Add new soc data "mclk_with_tere" for this platform and
enable the MCLK output in startup stage.
As "mclk_with_tere" only applied to i.MX8MP, currently
The soc data is shared with i.MX8MN, so need to add
an i.MX8MN own soc data with "mclk_with_tere" disabled.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Link: https://lore.kernel.org/r/1683273322-2525-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org
The COMP1_TX_WORDSIZE_0/COMP2_RX_WORDSIZE_0 fields in the comp
registers indicate the maximum wordsize supported. DWC I2S controller
can operate with any smaller wordsize. So extend the formats to let
I2S to operate in any allowed modes.
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru
Link: https://lore.kernel.org/r/20230505053521.18233-1-fido_max@inbox.ru
Signed-off-by: Mark Brown <broonie@kernel.org
regmap has introduced a maple tree based register cache which makes use of
this more advanced data structure which has been added to the kernel
recently. Maple trees are much flatter than rbtrees, meaning that they do
not grow to such depths when the register map is sparse which makes access
a bit more efficient. The maple tree cache type is still a bit of a work
in progress but should be effective for some devices already.
RT5682 seems like a good candidate for maple tree. It only supports single
register read/write operations so will gain minimal benefit from storing
the register data in device native format like rbtree does (none for
SoundWire) and has some sparsity in the register map which is a good fit
for maple tree.
Convert to use maple tree. There should be little if any visible difference
at runtime.
Signed-off-by: Mark Brown <broonie@kernel.org
Link: https://lore.kernel.org/r/20230419-asoc-rt5682-maple-v1-1-ed40369c9099@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org
regmap has introduced a maple tree based register cache which makes use of
this more advanced data structure which has been added to the kernel
recently. Maple trees are much flatter than rbtrees, meaning that they do
not grow to such depths when the register map is sparse which makes access
a bit more efficient. The maple tree cache type is still a bit of a work
in progress but should be effective for some devices already.
RT715 seems like a good candidate for maple tree. It is a SoundWire MBQ
device and therefore supports only single register read/write operations
which do not use raw I/O and will therefore save the cost of converting
to and from device native format when accessing the cache while not having
a negative impact from the current lack of bulk operations in maple tree
cache sync. It has a moderately large and quite sparse register map which
is a good fit for storing in a maple tree.
Convert to use maple tree. There should be little if any visible difference
at runtime.
Signed-off-by: Mark Brown <broonie@kernel.org
Link: https://lore.kernel.org/r/20230412-asoc-rt715-maple-v1-1-200a84835fde@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org
Function mt8195_afe_init_registers() performs just a single call to
regmap_multi_reg_write(), it returns int and it's not error checked;
move that call to the probe function and also add some error check.
While at it, also move the contents of mt8195_afe_parse_of() to the
probe function as well: since this is getting a handle to topckgen
and since that's optional, the ifdef for CONFIG_SND_SOC_MT6359 can
also be removed.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com
Acked-by: Trevor Wu <trevor.wu@mediatek.com
Link: https://lore.kernel.org/r/20230503113413.149235-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org
