mirror of
https://gitlab.com/ryandwyer/perfect-dark
synced 2026-09-03 18:03:34 -04:00
Decompile cd000254d8
This commit is contained in:
@@ -27,7 +27,7 @@ void cd00025314(struct coord *pos, struct coord *arg1);
|
||||
bool cd00025364(struct coord *arg0, struct coord *arg1);
|
||||
u32 cd000253c4(void);
|
||||
s32 cd00025410(f32 arg0, f32 arg1, f32 arg2, f32 arg3);
|
||||
u32 cd000254d8(void);
|
||||
s32 cd000254d8(struct coord *arg0, struct coord *arg1, f32 arg2, f32 arg3, f32 arg4, f32 arg5, s32 *arg6);
|
||||
f32 cd00025654(f32 x1, f32 z1, f32 x2, f32 z2, f32 x3, f32 z3);
|
||||
f32 cd00025724(f32 x1, f32 z1, f32 x2, f32 z2);
|
||||
bool cd00025774(f32 x1, f32 z1, f32 x2, f32 z2, f32 x3, f32 z3);
|
||||
|
||||
+40
-101
@@ -347,107 +347,46 @@ s32 cd00025410(f32 arg0, f32 arg1, f32 arg2, f32 arg3)
|
||||
return 0;
|
||||
}
|
||||
|
||||
GLOBAL_ASM(
|
||||
glabel cd000254d8
|
||||
/* 254d8: 27bdffa8 */ addiu $sp,$sp,-88
|
||||
/* 254dc: afa60060 */ sw $a2,0x60($sp)
|
||||
/* 254e0: afa70064 */ sw $a3,0x64($sp)
|
||||
/* 254e4: afbf001c */ sw $ra,0x1c($sp)
|
||||
/* 254e8: afb00018 */ sw $s0,0x18($sp)
|
||||
/* 254ec: afa5005c */ sw $a1,0x5c($sp)
|
||||
/* 254f0: afa0002c */ sw $zero,0x2c($sp)
|
||||
/* 254f4: c4840000 */ lwc1 $f4,0x0($a0)
|
||||
/* 254f8: c7a60060 */ lwc1 $f6,0x60($sp)
|
||||
/* 254fc: c4880008 */ lwc1 $f8,0x8($a0)
|
||||
/* 25500: c7aa0064 */ lwc1 $f10,0x64($sp)
|
||||
/* 25504: c7b00068 */ lwc1 $f16,0x68($sp)
|
||||
/* 25508: c7b2006c */ lwc1 $f18,0x6c($sp)
|
||||
/* 2550c: 46062001 */ sub.s $f0,$f4,$f6
|
||||
/* 25510: 00808025 */ or $s0,$a0,$zero
|
||||
/* 25514: 460a4081 */ sub.s $f2,$f8,$f10
|
||||
/* 25518: 44060000 */ mfc1 $a2,$f0
|
||||
/* 2551c: e7a00054 */ swc1 $f0,0x54($sp)
|
||||
/* 25520: 46068301 */ sub.s $f12,$f16,$f6
|
||||
/* 25524: 44071000 */ mfc1 $a3,$f2
|
||||
/* 25528: e7a20050 */ swc1 $f2,0x50($sp)
|
||||
/* 2552c: 460a9381 */ sub.s $f14,$f18,$f10
|
||||
/* 25530: e7ac0028 */ swc1 $f12,0x28($sp)
|
||||
/* 25534: 0c009504 */ jal cd00025410
|
||||
/* 25538: e7ae0024 */ swc1 $f14,0x24($sp)
|
||||
/* 2553c: 8fa3005c */ lw $v1,0x5c($sp)
|
||||
/* 25540: afa2003c */ sw $v0,0x3c($sp)
|
||||
/* 25544: c7a80060 */ lwc1 $f8,0x60($sp)
|
||||
/* 25548: c7b20064 */ lwc1 $f18,0x64($sp)
|
||||
/* 2554c: c4660008 */ lwc1 $f6,0x8($v1)
|
||||
/* 25550: c4640000 */ lwc1 $f4,0x0($v1)
|
||||
/* 25554: c7ac0028 */ lwc1 $f12,0x28($sp)
|
||||
/* 25558: 46123281 */ sub.s $f10,$f6,$f18
|
||||
/* 2555c: c7ae0024 */ lwc1 $f14,0x24($sp)
|
||||
/* 25560: 46082401 */ sub.s $f16,$f4,$f8
|
||||
/* 25564: 44075000 */ mfc1 $a3,$f10
|
||||
/* 25568: 44068000 */ mfc1 $a2,$f16
|
||||
/* 2556c: 0c009504 */ jal cd00025410
|
||||
/* 25570: 00000000 */ nop
|
||||
/* 25574: 8fae003c */ lw $t6,0x3c($sp)
|
||||
/* 25578: 8fa3005c */ lw $v1,0x5c($sp)
|
||||
/* 2557c: 01c20019 */ multu $t6,$v0
|
||||
/* 25580: 00007812 */ mflo $t7
|
||||
/* 25584: 5de00025 */ bgtzl $t7,.L0002561c
|
||||
/* 25588: 8fa20070 */ lw $v0,0x70($sp)
|
||||
/* 2558c: c4640000 */ lwc1 $f4,0x0($v1)
|
||||
/* 25590: c6080000 */ lwc1 $f8,0x0($s0)
|
||||
/* 25594: c4700008 */ lwc1 $f16,0x8($v1)
|
||||
/* 25598: c6060008 */ lwc1 $f6,0x8($s0)
|
||||
/* 2559c: 46082301 */ sub.s $f12,$f4,$f8
|
||||
/* 255a0: c7a40050 */ lwc1 $f4,0x50($sp)
|
||||
/* 255a4: c7b20054 */ lwc1 $f18,0x54($sp)
|
||||
/* 255a8: 46068381 */ sub.s $f14,$f16,$f6
|
||||
/* 255ac: e7ac004c */ swc1 $f12,0x4c($sp)
|
||||
/* 255b0: 46002207 */ neg.s $f8,$f4
|
||||
/* 255b4: 46009287 */ neg.s $f10,$f18
|
||||
/* 255b8: 44074000 */ mfc1 $a3,$f8
|
||||
/* 255bc: 44065000 */ mfc1 $a2,$f10
|
||||
/* 255c0: 0c009504 */ jal cd00025410
|
||||
/* 255c4: e7ae0048 */ swc1 $f14,0x48($sp)
|
||||
/* 255c8: afa20034 */ sw $v0,0x34($sp)
|
||||
/* 255cc: c6040008 */ lwc1 $f4,0x8($s0)
|
||||
/* 255d0: c6060000 */ lwc1 $f6,0x0($s0)
|
||||
/* 255d4: c7b00068 */ lwc1 $f16,0x68($sp)
|
||||
/* 255d8: c7aa006c */ lwc1 $f10,0x6c($sp)
|
||||
/* 255dc: c7ac004c */ lwc1 $f12,0x4c($sp)
|
||||
/* 255e0: 46068481 */ sub.s $f18,$f16,$f6
|
||||
/* 255e4: c7ae0048 */ lwc1 $f14,0x48($sp)
|
||||
/* 255e8: 46045201 */ sub.s $f8,$f10,$f4
|
||||
/* 255ec: 44069000 */ mfc1 $a2,$f18
|
||||
/* 255f0: 44074000 */ mfc1 $a3,$f8
|
||||
/* 255f4: 0c009504 */ jal cd00025410
|
||||
/* 255f8: 00000000 */ nop
|
||||
/* 255fc: 8fb80034 */ lw $t8,0x34($sp)
|
||||
/* 25600: 24030001 */ addiu $v1,$zero,0x1
|
||||
/* 25604: 03020019 */ multu $t8,$v0
|
||||
/* 25608: 0000c812 */ mflo $t9
|
||||
/* 2560c: 5f200003 */ bgtzl $t9,.L0002561c
|
||||
/* 25610: 8fa20070 */ lw $v0,0x70($sp)
|
||||
/* 25614: afa3002c */ sw $v1,0x2c($sp)
|
||||
/* 25618: 8fa20070 */ lw $v0,0x70($sp)
|
||||
.L0002561c:
|
||||
/* 2561c: 8fa3002c */ lw $v1,0x2c($sp)
|
||||
/* 25620: 8c480000 */ lw $t0,0x0($v0)
|
||||
/* 25624: 51000007 */ beqzl $t0,.L00025644
|
||||
/* 25628: 8fbf001c */ lw $ra,0x1c($sp)
|
||||
/* 2562c: 14600003 */ bnez $v1,.L0002563c
|
||||
/* 25630: 8fa9003c */ lw $t1,0x3c($sp)
|
||||
/* 25634: 5d200003 */ bgtzl $t1,.L00025644
|
||||
/* 25638: 8fbf001c */ lw $ra,0x1c($sp)
|
||||
.L0002563c:
|
||||
/* 2563c: ac400000 */ sw $zero,0x0($v0)
|
||||
/* 25640: 8fbf001c */ lw $ra,0x1c($sp)
|
||||
.L00025644:
|
||||
/* 25644: 8fb00018 */ lw $s0,0x18($sp)
|
||||
/* 25648: 27bd0058 */ addiu $sp,$sp,0x58
|
||||
/* 2564c: 03e00008 */ jr $ra
|
||||
/* 25650: 00601025 */ or $v0,$v1,$zero
|
||||
);
|
||||
s32 cd000254d8(struct coord *arg0, struct coord *arg1, f32 arg2, f32 arg3, f32 arg4, f32 arg5, s32 *arg6)
|
||||
{
|
||||
f32 sp54;
|
||||
f32 sp50;
|
||||
f32 sp4c;
|
||||
f32 sp48;
|
||||
s32 sp44;
|
||||
s32 sp40;
|
||||
s32 sp3c;
|
||||
s32 sp38;
|
||||
s32 sp34;
|
||||
s32 sp30;
|
||||
bool result = false;
|
||||
|
||||
sp54 = arg0->x - arg2;
|
||||
sp50 = arg0->z - arg3;
|
||||
|
||||
sp3c = cd00025410(arg4 - arg2, arg5 - arg3, sp54, sp50);
|
||||
sp44 = cd00025410(arg4 - arg2, arg5 - arg3, arg1->x - arg2, arg1->z - arg3);
|
||||
sp38 = sp3c * sp44;
|
||||
|
||||
if (sp38 <= 0) {
|
||||
sp4c = arg1->x - arg0->x;
|
||||
sp48 = arg1->z - arg0->z;
|
||||
|
||||
sp34 = cd00025410(sp4c, sp48, -sp54, -sp50);
|
||||
sp40 = cd00025410(sp4c, sp48, arg4 - arg0->x, arg5 - arg0->z);
|
||||
sp30 = sp34 * sp40;
|
||||
|
||||
if (sp30 <= 0) {
|
||||
result = true;
|
||||
}
|
||||
}
|
||||
|
||||
if (*arg6 && (result || sp3c <= 0)) {
|
||||
*arg6 = 0;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
f32 cd00025654(f32 x1, f32 z1, f32 x2, f32 z2, f32 x3, f32 z3)
|
||||
{
|
||||
|
||||
Reference in New Issue
Block a user