mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-25 18:05:12 -04:00
Preserve padded OT allocations with indexed late-packet relocation
This commit is contained in:
Matthew Stanley
@@ -0,0 +1,287 @@
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#pragma once
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#include <algorithm>
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#include <cstdint>
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#include <cstring>
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#include <vector>
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// Preserve the real frame's work outside a bounded drawing section. Matrix
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// replay may change clipping and core packet layout. Tail relocation accepts
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// only proved append-only packet chains attached through zero-length OT heads.
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// Packet allocations may contain padding; only linked packet words are copied.
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class PSXOTRelocation {
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public:
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struct Node { uint32_t address, header; };
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struct Word { uint32_t address, value; };
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struct Range { uint32_t first, last; };
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std::vector<Node> prefix, core, complete;
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std::vector<Range> outputs;
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std::vector<Range> payloads;
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std::vector<Word> changes;
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std::vector<Word> prefix_payload;
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std::vector<Node> headers;
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std::vector<uint8_t> after_core;
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uint32_t cursor=0, final_cursor=0, ordering_table=0;
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uint32_t refusal=0;
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bool refuse(uint32_t line) {refusal=line;return false;}
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bool captured=false, ready=false;
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std::vector<Word> splice_writes;
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uint32_t relocated_first=0, relocated_last=0, relocated_destination=0;
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uint32_t arena_begin=0;
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static uint32_t word(const uint8_t* ram, uint32_t address) {
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uint32_t value;
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std::memcpy(&value,ram+(address&0x1fffffu),4);
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return value;
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}
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static bool walk(const uint8_t* ram, uint32_t bytes, uint32_t ot,
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std::vector<Node>& nodes) {
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nodes.clear();
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if(bytes!=0x200000u)return false;
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uint32_t address=ot&0xffffffu;
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for(unsigned n=0;n<32768;++n) {
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if(address==0xffffffu) {
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std::vector<Range> spans;
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for(const auto& node:nodes)
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spans.push_back({node.address,node.address+4u+(node.header>>24)*4u});
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std::sort(spans.begin(),spans.end(),[](const Range& a,const Range& b){return a.first<b.first;});
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for(size_t i=1;i<spans.size();++i)
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if(spans[i].first<spans[i-1].last)return false;
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return true;
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}
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if((address&3u) || address>=bytes || bytes-address<4u) return false;
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const uint32_t header=word(ram,address);
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const uint32_t payload=(header>>24)*4u;
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if(payload>bytes-address-4u) return false;
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nodes.push_back({address,header});
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address=header&0xffffffu;
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}
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return false;
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}
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void clear() {captured=ready=false;after_core.clear();changes.clear();prefix_payload.clear();outputs.clear();payloads.clear();}
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bool begin(const uint8_t* ram,uint32_t bytes,uint32_t ot,uint32_t initial_cursor=0) {
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clear();ordering_table=ot;arena_begin=initial_cursor&0x1fffffu;
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if((arena_begin&3u) || arena_begin>=bytes)return false;
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if(!walk(ram,bytes,ot,prefix))return false;
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for(const auto& node:prefix)
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for(uint32_t offset=4;offset<=((node.header>>24)*4u);offset+=4)
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prefix_payload.push_back({node.address+offset,word(ram,node.address+offset)});
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return true;
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}
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bool end(const uint8_t* ram,uint32_t bytes,uint32_t current_cursor) {
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if(!walk(ram,bytes,ordering_table,core)) return false;
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// This candidate owns newly appended packets only. Reject a core that
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// reuses a prefix payload instead of silently restoring stale precision.
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for(const auto& saved:prefix_payload)
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if(word(ram,saved.address)!=saved.value)return false;
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headers=core;
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std::sort(headers.begin(),headers.end(),[](const Node& a,const Node& b){return a.address<b.address;});
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for(const auto& prior:prefix) {
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const auto current=std::lower_bound(headers.begin(),headers.end(),prior.address,
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[](const Node& node,uint32_t address){return node.address<address;});
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if(current==headers.end() || current->address!=prior.address ||
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((current->header^prior.header)&0xff000000u))return false;
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}
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std::vector<uint32_t> prefix_addresses;
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for(const auto& node:prefix) prefix_addresses.push_back(node.address);
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std::sort(prefix_addresses.begin(),prefix_addresses.end());
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for(const auto& node:core) {
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const uint32_t length=(node.header>>24)*4u;
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if(length)payloads.push_back({node.address+4u,node.address+4u+length});
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if(length && !std::binary_search(prefix_addresses.begin(),prefix_addresses.end(),node.address))
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outputs.push_back({node.address+4u,node.address+4u+length});
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}
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std::sort(outputs.begin(),outputs.end(),[](const Range& a,const Range& b){return a.first<b.first;});
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std::vector<Range> merged;
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for(const auto& range:outputs) {
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if(!merged.empty() && range.first<=merged.back().last)
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merged.back().last=std::max(merged.back().last,range.last);
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else merged.push_back(range);
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}
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outputs.swap(merged);
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std::sort(payloads.begin(),payloads.end(),[](const Range& a,const Range& b){return a.first<b.first;});
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for(size_t i=1;i<payloads.size();++i)
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if(payloads[i].first<payloads[i-1].last)return false;
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for(const auto& node:core) {
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const auto next=std::upper_bound(payloads.begin(),payloads.end(),node.address,
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[](uint32_t address,const Range& range){return address<range.first;});
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if(next!=payloads.begin() && node.address<(next-1)->last)return false;
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}
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cursor=current_cursor;
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headers=core;
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std::sort(headers.begin(),headers.end(),[](const Node& a,const Node& b){return a.address<b.address;});
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after_core.assign(ram,ram+bytes);
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captured=true;
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return true;
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}
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bool protected_word(uint32_t address) const {
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const auto next=std::upper_bound(outputs.begin(),outputs.end(),address,
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[](uint32_t word,const Range& range){return word<range.first;});
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return next!=outputs.begin() && address<(next-1)->last;
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}
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bool prepare(const uint8_t* ram,uint32_t bytes,uint32_t producer_end=0) {
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final_cursor=producer_end&0x1fffffu;
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ready=false;changes.clear();
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if(!captured || after_core.size()!=bytes || (bytes&3u) ||
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!walk(ram,bytes,ordering_table,complete)) return false;
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for(uint32_t address=0;address<bytes;address+=4) {
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const uint32_t value=word(ram,address);
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if(value==word(after_core.data(),address)) continue;
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// Tail writes may link packets through OT/header words, but must
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// never replace the coordinates/colours emitted by the core.
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const auto payload=std::upper_bound(payloads.begin(),payloads.end(),address,
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[](uint32_t word,const Range& range){return word<range.first;});
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if(payload!=payloads.begin() && address<(payload-1)->last)return false;
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const auto header=std::lower_bound(headers.begin(),headers.end(),address,
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[](const Node& node,uint32_t word){return node.address<word;});
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if(header!=headers.end() && header->address==address &&
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((value^header->header)&0xff000000u))return false;
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changes.push_back({address,value});
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}
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ready=true;
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return true;
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}
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bool matches(const uint8_t* ram,uint32_t bytes,uint32_t ot,uint32_t current_cursor) const {
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if(!ready || ot!=ordering_table || cursor!=current_cursor || after_core.size()!=bytes) return false;
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for(const auto& node:core)
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if(word(ram,node.address)!=node.header) return false;
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return true;
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}
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// Only append-only tail packets and ordinary zero-length OT head inserts
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// may move. This prepares all writes before touching the replay's RAM.
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bool prepare_splice(const uint8_t* ram,uint32_t bytes,uint32_t ot,
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uint32_t current_cursor,uint32_t cursor_word) {
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refusal=0;splice_writes.clear();relocated_first=relocated_last=relocated_destination=0;
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if(!ready || ot!=ordering_table || after_core.size()!=bytes ||
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(cursor_word&0x1fffffu)>bytes-4u || word(ram,cursor_word)!=current_cursor)return refuse(__LINE__);
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const uint32_t old_first=cursor&0x1fffffu, new_first=current_cursor&0x1fffffu;
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if((old_first|new_first)&3u || old_first<arena_begin || new_first<arena_begin ||
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old_first>=bytes || new_first>=bytes)return refuse(__LINE__);
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std::vector<Node> live;
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if(!walk(ram,bytes,ot,live))return refuse(__LINE__);
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auto sorted=[](std::vector<Node> nodes){
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std::sort(nodes.begin(),nodes.end(),[](const Node&a,const Node&b){return a.address<b.address;});
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return nodes;
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};
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const auto old=sorted(core), now=sorted(live);
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auto find=[](const std::vector<Node>& nodes,uint32_t address)->const Node* {
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auto at=std::lower_bound(nodes.begin(),nodes.end(),address,
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[](const Node&n,uint32_t a){return n.address<a;});
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return at!=nodes.end() && at->address==address?&*at:nullptr;
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};
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// Static prefix data must survive; its links may point at newly emitted
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// core packets. Every zero-length OT node retains its identity.
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for(const auto& node:prefix) {
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const Node* actual=find(now,node.address);
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if(!actual || ((actual->header^node.header)&0xff000000u))return refuse(__LINE__);
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}
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for(const auto& saved:prefix_payload)
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if(word(ram,saved.address)!=saved.value)return refuse(__LINE__);
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for(const auto& node:old)if(!(node.header>>24)) {
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const Node* actual=find(now,node.address);
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if(!actual || actual->header>>24)return refuse(__LINE__);
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}
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std::vector<Node> added;
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for(const auto& node:complete)if(!find(old,node.address))added.push_back(node);
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added=sorted(added);
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if(added.empty())return refuse(__LINE__);
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uint32_t end=old_first;
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for(const auto& node:added) {
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// The original allocator can reserve more bytes than DMA reads
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// (e.g. an 8-byte DrawMode in a 16-byte allocation). Validate
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// linked packets, not uninitialized padding between allocations.
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if(node.address<end || !(node.header>>24))return refuse(__LINE__);
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end=node.address+4u+(node.header>>24)*4u;
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if(end>bytes || (final_cursor && end>final_cursor))return refuse(__LINE__);
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}
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if(final_cursor) {
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if(final_cursor<end || final_cursor<old_first || final_cursor>=bytes)return refuse(__LINE__);
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end=final_cursor;
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}
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const uint32_t length=end-old_first;
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if(length>bytes-new_first)return refuse(__LINE__);
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const uint32_t new_end=new_first+length;
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for(const auto& node:live) {
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const uint32_t node_end=node.address+4u+(node.header>>24)*4u;
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if(node.address<new_end && new_first<node_end)return refuse(__LINE__);
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}
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auto relocate=[&](uint32_t address){return new_first+(address-old_first);};
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auto is_tail=[&](uint32_t address){return address>=old_first && address<end;};
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// Map each tail-chain terminal to the corresponding CURRENT OT head.
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std::vector<Word> terminals;
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for(const auto& change:changes) {
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const Node* prior=find(old,change.address);
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if(!prior)continue;
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if(prior->header>>24 || change.value>>24 || !is_tail(change.value&0xffffffu))return refuse(__LINE__);
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const Node* current=find(now,change.address);
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if(!current || current->header>>24)return refuse(__LINE__);
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uint32_t link=change.value&0xffffffu;
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unsigned visited=0;
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while(is_tail(link)) {
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const Node* node=find(added,link);
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if(!node || ++visited>added.size())return refuse(__LINE__);
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const uint32_t next=node->header&0xffffffu;
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if(!is_tail(next)) {
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if(next!=(prior->header&0xffffffu))return refuse(__LINE__);
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terminals.push_back({node->address,current->header&0xffffffu});
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}
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link=next;
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}
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splice_writes.push_back({change.address,relocate(change.value&0xffffffu)});
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}
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if(terminals.empty())return refuse(__LINE__);
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// Every appended packet belongs to one proved head-insert chain.
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std::vector<uint32_t> owned;
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for(const auto& change:changes)if(find(old,change.address)) {
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uint32_t link=change.value&0xffffffu;
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while(is_tail(link)) {
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owned.push_back(link);
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if(owned.size()>added.size())return refuse(__LINE__);
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const Node* node=find(added,link);
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if(!node)return refuse(__LINE__);
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link=node->header&0xffffffu;
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}
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}
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std::sort(owned.begin(),owned.end());
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if(owned.size()!=added.size() || std::adjacent_find(owned.begin(),owned.end())!=owned.end())return refuse(__LINE__);
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for(const auto& node:added) {
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uint32_t link=node.header&0xffffffu;
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if(is_tail(link))link=relocate(link);
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else {
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auto terminal=std::find_if(terminals.begin(),terminals.end(),[&](const Word&w){return w.address==node.address;});
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if(terminal==terminals.end())return refuse(__LINE__);
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link=terminal->value;
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}
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splice_writes.push_back({relocate(node.address),(node.header&0xff000000u)|link});
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for(uint32_t offset=4;offset<=((node.header>>24)*4u);offset+=4) {
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uint32_t value=word(after_core.data(),node.address+offset);
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const auto change=std::lower_bound(changes.begin(),changes.end(),node.address+offset,
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[](const Word& w,uint32_t address){return w.address<address;});
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if(change!=changes.end() && change->address==node.address+offset)value=change->value;
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splice_writes.push_back({relocate(node.address+offset),value});
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}
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}
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for(const auto& change:changes) {
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if(is_tail(change.address) || find(old,change.address))continue;
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if(change.address==(cursor_word&0x1fffffu)) {
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if((change.value&0x1fffffu)!=end)return refuse(__LINE__);
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splice_writes.push_back({change.address,(current_cursor&0xffe00000u)|new_end});
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} else {
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if(word(ram,change.address)!=word(after_core.data(),change.address))return refuse(__LINE__);
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splice_writes.push_back(change);
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}
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}
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relocated_first=old_first;relocated_last=end;relocated_destination=new_first;
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return true;
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}
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uint32_t shadow_destination(uint32_t address) const {
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return address>=relocated_first && address<relocated_last
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?relocated_destination+(address-relocated_first):address;
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}
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void apply_splice(uint8_t* ram) const {
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for(const auto& change:splice_writes)std::memcpy(ram+change.address,&change.value,4);
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}
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void apply(uint8_t* ram) const {
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for(const auto& change:changes)
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std::memcpy(ram+change.address,&change.value,4);
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}
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};
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@@ -0,0 +1,125 @@
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#include "render_pass_ot_relocation.hpp"
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#include <cstdio>
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static int failures=0;
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#define CHECK(c) do {if(!(c)){std::fprintf(stderr,"FAIL line %d: %s\n",__LINE__,#c);++failures;}}while(0)
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static void put(std::vector<uint8_t>& ram,uint32_t address,uint32_t value) {
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std::memcpy(ram.data()+address,&value,4);
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}
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int main() {
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std::vector<uint8_t> ram(0x200000);
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constexpr uint32_t OT=0x1000,Prefix=0x1100,Core=0x1200,Tail=0x1400;
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put(ram,OT,Prefix);put(ram,Prefix,0x02ffffffu);
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put(ram,Prefix+4,0x64000000);put(ram,Prefix+8,0x000a000b);
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PSXOTRelocation journal;
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CHECK(journal.begin(ram.data(),ram.size(),OT));
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put(ram,OT,Core);put(ram,Core,0x02000000u|Prefix);
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put(ram,Core+4,0x20000000);put(ram,Core+8,0x000c000d);
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CHECK(journal.end(ram.data(),ram.size(),0x1300));
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const auto core=ram;
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put(ram,OT,Tail);put(ram,Tail,0x02000000u|Core);
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put(ram,Tail+4,0x64000000);put(ram,Tail+8,0x00100020);
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CHECK(journal.prepare(ram.data(),ram.size()));
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ram=core;put(ram,Core+8,0x000d000e); // interpolated core coordinates
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CHECK(journal.matches(ram.data(),ram.size(),OT,0x1300));
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CHECK(!journal.matches(ram.data(),ram.size(),OT,0x1304));
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CHECK(!journal.matches(ram.data(),ram.size(),OT+4,0x1300));
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put(ram,Core,0x02000000u|Tail);
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CHECK(!journal.matches(ram.data(),ram.size(),OT,0x1300));
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ram=core;put(ram,Core+8,0x000d000e);journal.apply(ram.data());
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CHECK(PSXOTRelocation::word(ram.data(),OT)==Tail);
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CHECK(PSXOTRelocation::word(ram.data(),Core+8)==0x000d000e);
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CHECK(PSXOTRelocation::word(ram.data(),Tail+8)==0x00100020);
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// Tail must never overwrite interpolated output, or grow a core packet.
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ram=core;put(ram,Core+8,0x10000000);
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CHECK(!journal.prepare(ram.data(),ram.size()));
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ram=core;put(ram,Core,0x03000000u|Prefix);
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CHECK(!journal.prepare(ram.data(),ram.size()));
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ram=core;put(ram,OT,0x300000); // out-of-RAM link
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CHECK(!journal.prepare(ram.data(),ram.size()));
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ram=core;put(ram,OT,OT); // cycle, bounded traversal
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CHECK(!journal.prepare(ram.data(),ram.size()));
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ram=core;
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CHECK(journal.begin(ram.data(),ram.size(),OT));
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put(ram,Prefix+8,0x11112222); // in-place core reuse is unsupported
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CHECK(!journal.end(ram.data(),ram.size(),0x1300));
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ram=core;put(ram,Core,0x02000000u|(Core+4));
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put(ram,Core+4,0x00ffffffu); // linked header aliases a packet payload
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std::vector<PSXOTRelocation::Node> aliased;
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CHECK(!PSXOTRelocation::walk(ram.data(),ram.size(),OT,aliased));
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// Variable core packet layout: relocate a contiguous two-packet HUD tail
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// and splice its terminal onto the current OT head, preserving live core.
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ram.assign(0x200000,0);
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put(ram,OT,Prefix);put(ram,Prefix,0x02ffffffu);
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put(ram,Prefix+4,0x64000000);put(ram,Prefix+8,0x000a000b);
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PSXOTRelocation relocated;
|
||||
CHECK(relocated.begin(ram.data(),ram.size(),OT,0x80001200));
|
||||
put(ram,OT,Core);put(ram,Core,0x02000000u|Prefix);
|
||||
put(ram,Core+4,0x20000000);put(ram,Core+8,0x000c000d);
|
||||
put(ram,0x1800,0x80001300);
|
||||
CHECK(relocated.end(ram.data(),ram.size(),0x80001300));
|
||||
const auto recorded_core=ram;
|
||||
put(ram,0x1300,0x02000000u|Core);
|
||||
put(ram,0x1304,0x64000000);put(ram,0x1308,0x00100020);
|
||||
put(ram,0x130c,0x02001300u);
|
||||
put(ram,0x1310,0x60000000);put(ram,0x1314,0x00300040);
|
||||
put(ram,OT,0x130c);put(ram,0x1800,0x80001318);
|
||||
CHECK(relocated.prepare(ram.data(),ram.size()));
|
||||
ram=recorded_core;
|
||||
put(ram,OT,0x1220);put(ram,0x1220,0x02000000u|Prefix);
|
||||
put(ram,0x1224,0x20000000);put(ram,0x1228,0x000e000f);
|
||||
put(ram,0x1800,0x80001320);
|
||||
CHECK(relocated.prepare_splice(ram.data(),ram.size(),OT,0x80001320,0x1800));
|
||||
CHECK(relocated.shadow_destination(0x1308)==0x1328);
|
||||
relocated.apply_splice(ram.data());
|
||||
CHECK(PSXOTRelocation::word(ram.data(),OT)==0x132c);
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x1320)==(0x02000000u|0x1220));
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x132c)==0x02001320u);
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x1228)==0x000e000f);
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x1800)==0x80001338);
|
||||
CHECK(!relocated.prepare_splice(ram.data(),ram.size(),OT+4,0x80001320,0x1800));
|
||||
ram=recorded_core;put(ram,Prefix+8,0x00010002);
|
||||
CHECK(!relocated.prepare_splice(ram.data(),ram.size(),OT,0x80001320,0x1800));
|
||||
ram=recorded_core;
|
||||
CHECK(!relocated.prepare_splice(ram.data(),ram.size(),OT,0x80001200,0x1800));
|
||||
CHECK(!relocated.prepare_splice(ram.data(),ram.size(),OT,0x801ffffc,0x1800));
|
||||
ram=recorded_core;put(ram,0x1800,0x800012e0);
|
||||
CHECK(relocated.prepare_splice(ram.data(),ram.size(),OT,0x800012e0,0x1800));
|
||||
relocated.apply_splice(ram.data());
|
||||
CHECK(PSXOTRelocation::word(ram.data(),OT)==0x12ec);
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x12e0)==(0x02000000u|Core));
|
||||
// DrawMode's allocator reserves 16 bytes but DMA reads 8. Stale padding
|
||||
// must neither be interpreted as a tag nor copied onto live core output.
|
||||
ram=recorded_core;
|
||||
put(ram,0x1300,0x01000000u|Core);
|
||||
put(ram,0x1304,0xe1000220);
|
||||
put(ram,0x1308,0xffffffffu);put(ram,0x130c,0xaaaaaaaa);
|
||||
put(ram,0x1310,0x02001300u);
|
||||
put(ram,0x1314,0x64000000);put(ram,0x1318,0x00100020);
|
||||
put(ram,OT,0x1310);put(ram,0x1800,0x80001320);
|
||||
CHECK(relocated.prepare(ram.data(),ram.size(),0x80001320));
|
||||
ram=recorded_core;put(ram,0x1800,0x80001340);
|
||||
put(ram,0x1348,0x12345678);put(ram,0x134c,0x87654321);
|
||||
CHECK(relocated.prepare_splice(ram.data(),ram.size(),OT,0x80001340,0x1800));
|
||||
relocated.apply_splice(ram.data());
|
||||
CHECK(PSXOTRelocation::word(ram.data(),OT)==0x1350);
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x1340)==(0x01000000u|Core));
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x1348)==0x12345678);
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x134c)==0x87654321);
|
||||
CHECK(PSXOTRelocation::word(ram.data(),0x1800)==0x80001360);
|
||||
ram=recorded_core;put(ram,0x1800,0x80001340);
|
||||
// A packet outside the actual producer interval is still refused.
|
||||
CHECK(relocated.prepare_splice(ram.data(),ram.size(),OT,0x801ffff0,0x1800)==false);
|
||||
// A middle-list insertion into a primitive header is unsupported even if
|
||||
// the complete DMA graph remains structurally valid.
|
||||
ram=recorded_core;
|
||||
put(ram,0x1300,0x02000000u|Prefix);
|
||||
put(ram,0x1304,0x64000000);put(ram,0x1308,0x00100020);
|
||||
put(ram,Core,0x02001300u);put(ram,0x1800,0x8000130c);
|
||||
CHECK(relocated.prepare(ram.data(),ram.size()));
|
||||
ram=recorded_core;put(ram,0x1800,0x80001320);
|
||||
CHECK(!relocated.prepare_splice(ram.data(),ram.size(),OT,0x80001320,0x1800));
|
||||
std::printf("OT relocation guards: %s\n",failures?"FAIL":"PASS");
|
||||
return failures?1:0;
|
||||
}
|
||||
Reference in New Issue
Block a user