mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-27 10:38:46 -04:00
Matt Stanley
c0ffd6d4c5
Extract the audited adapters and card transport onto master without the held selector/menu stack. Keep adapters and codecs tied to mod activation, use overlay ABI 33, retain rejected-load protection on codec registration, and refuse extended-card codecs in netplay before frame zero. Preserve default atomic save publication and guest-visible write failures.
48 lines
2.9 KiB
Markdown
48 lines
2.9 KiB
Markdown
# Guarded memory address adapters
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A trusted plugin can redirect the effective address of an audited guest memory
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instruction with `psx_mod_register_memory_address_plugin(id, pc, expected,
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callback)`. Add the PC to `[recompiler] mod_instruction_sites` and regenerate
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static code. The callback receives a read-only CPU, PC, original instruction,
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and computed effective address; return a replacement address or the input to
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decline. No title-specific addresses or data layouts belong in this API.
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The active mod plan owns availability. Both the original instruction passed by
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the backend and the live RAM word must equal the registered word. This prevents
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an unrelated overlay at the same PC from being redirected. Registrations support
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LB/LBU/LH/LHU/LW/LWL/LWR, SB/SH/SW/SWL/SWR, and LWC2/SWC2. PC segment aliases
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share registrations. Duplicate plugin/PC/word address adapters are rejected.
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Different overlay words at one PC are allowed.
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Adapters execute in plan order. Each receives the address returned by the
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previous adapter. They cannot re-enter guest execution or change guest state.
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The low two address bits must stay unchanged; a violating result is ignored
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and counted as `mod.memory_address.bad_alignment`. This preserves alignment
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faults and byte lanes for unaligned word merges.
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Static code computes the address once before the original load/store, keeping
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the same value for PGXP. Source registers, store values, destinations, GTE
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access, load interlocks, cycle helpers, and pending branch behavior remain in
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the normal instruction implementation. Even a load whose destination aliases
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its base can therefore be redirected without corrupting the base calculation.
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An unconfigured native instruction has no new callback cost.
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Dirty-RAM interpretation passes the original fetched word through the decoder
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and redirects the address in each memory-op case. Overlay DLLs forward through
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`OverlayCallbacks.mod_memory_address`, flushing pending cycle charges just as
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other mod callbacks do. ABI 33 rejects stale DLLs, including the earlier
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experimental selector/adapter layout. The normal codegen cache fingerprint
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also changes with the emitter. Package deactivation and netplay
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plan clearing remove adapters with the existing instruction-hook table.
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Adapters are for access sites whose data ownership has been proved. A numerical
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address resembling an extended array index is not sufficient: title callbacks
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must validate their overlay/table/index context. Loop bounds, stack-sized table
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copies, UI capacities, saves, and asset identities need separate title work.
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Validation extends the mod runtime tests (activation, aliases, instruction/live
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RAM guards, CPU preservation, invalid alignment, plan clearing), generator tests
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(all memory opcodes, PGXP, branch delay slots, immediate variants, load-to-zero),
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and the interpreted-instruction fixture (all memory opcodes and unaligned lanes,
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negative offsets, base/destination alias, GTE, and PGXP address parity).
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