mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 10:19:47 -04:00
7c40d33db3
Phase 1a (boot slice): 30 instructions at 0xBFC00000, compiles clean. Phase 1b (instruction coverage): 54 opcodes implemented in strict_translator, 44,629 walker-reachable instructions covered, 0 missing. Phase 1c (function discovery): 76 functions from 2 seeds, 2,988 instructions, 199 call edges, 27 indirect jumps. All validated through StrictTranslator. Phase 1d (indirect control flow): 27 sites classified — 21 A0/B0/C0 dispatch stubs, 4 computed calls, 2 computed tail calls. Ghidra cross-referenced with 0 disagreements. Phase 1e (relocation): ROM-to-RAM copy at FUN_bfc00420 proven with both Ghidra (static) and DuckStation (runtime). 69 address aliases, 68/69 function entries match byte-for-byte in RAM. Normalization rule documented. Includes PRINCIPLES.md and DEBUG.md adapted from recomp-template. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
177 lines
6.7 KiB
C++
177 lines
6.7 KiB
C++
#pragma once
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#include <cstdint>
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#include <string>
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#include <vector>
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#include <sstream>
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#include <set>
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#include "ps1_exe_parser.h"
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#include "function_analysis.h"
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#include "control_flow.h"
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#include "../src/annotations.hpp"
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namespace PSXRecomp {
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// CPU state structure (registers + memory access)
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struct CPUState {
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// General purpose registers (32 total)
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uint32_t gpr[32]; // $0-$31
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uint32_t pc; // Program counter
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uint32_t hi, lo; // Multiply/divide results
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// Memory access functions (to be implemented in runtime)
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uint32_t (*read_word)(uint32_t addr);
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void (*write_word)(uint32_t addr, uint32_t value);
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uint16_t (*read_half)(uint32_t addr);
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void (*write_half)(uint32_t addr, uint16_t value);
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uint8_t (*read_byte)(uint32_t addr);
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void (*write_byte)(uint32_t addr, uint8_t value);
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};
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// Code generation configuration
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struct CodeGenConfig {
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bool emit_comments; // Include MIPS instruction comments
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bool emit_line_numbers; // Include original address as comments
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bool optimize_zero_reg; // Optimize away $zero assignments
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bool use_switch_for_blocks; // Use switch instead of goto labels
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std::string indent; // Indentation string (default: " ")
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CodeGenConfig()
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: emit_comments(true)
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, emit_line_numbers(true)
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, optimize_zero_reg(true)
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, use_switch_for_blocks(false)
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, indent(" ") {}
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};
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// Result of code generation for a function
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struct GeneratedFunction {
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std::string function_name; // e.g., "func_80016940"
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std::string signature; // e.g., "void func_80016940(CPUState* cpu)"
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std::string body; // C code body
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std::string full_code; // signature + body
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int line_count; // Number of lines generated
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};
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class CodeGenerator {
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public:
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explicit CodeGenerator(const PS1Executable& exe, const CodeGenConfig& config = CodeGenConfig());
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// Generate C code for a single function.
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// fallthrough_name: if non-empty and the last block has no explicit control
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// flow (ControlFlowType::None), emit a tail call to that function before '}'.
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// This handles MIPS functions that fall through into the next function without
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// an explicit jr/j instruction.
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GeneratedFunction generate_function(
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const Function& func,
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const ControlFlowGraph& cfg,
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const std::string& fallthrough_name = "");
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// Generate C code for all functions
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std::vector<GeneratedFunction> generate_all_functions(
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const std::vector<Function>& functions,
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const std::map<uint32_t, ControlFlowGraph>& cfgs);
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// Generate complete C file with all functions
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std::string generate_file(
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const std::vector<Function>& functions,
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const std::map<uint32_t, ControlFlowGraph>& cfgs);
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// Set known functions for this compilation unit (for linking)
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void set_known_functions(const std::set<uint32_t>& functions) {
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known_functions_ = functions;
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}
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// Set annotation table (optional — no-op if not called)
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void set_annotations(const AnnotationTable* at) { annotations_ = at; }
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private:
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const PS1Executable& exe_;
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CodeGenConfig config_;
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std::set<uint32_t> known_functions_; // Addresses of functions in this compilation unit
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std::set<uint32_t> extra_labels_; // Mid-block addresses that need inline labels (jump table targets)
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const AnnotationTable* annotations_ = nullptr;
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// Instruction translation
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std::string translate_instruction(uint32_t addr, uint32_t instr);
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// Register name mapping
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static std::string reg_name(int reg_num);
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// Basic block translation
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std::string translate_basic_block(
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const BasicBlock& block,
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const ControlFlowGraph& cfg);
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// Control flow translation
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std::string generate_branch_condition(uint32_t instr);
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std::string translate_branch(const ControlFlowInstr& cf, uint32_t fall_through);
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std::string translate_jump(const ControlFlowInstr& cf);
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// Arithmetic instructions
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std::string translate_add(uint32_t instr);
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std::string translate_addu(uint32_t instr);
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std::string translate_sub(uint32_t instr);
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std::string translate_subu(uint32_t instr);
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std::string translate_mult(uint32_t instr);
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std::string translate_multu(uint32_t instr);
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std::string translate_div(uint32_t instr);
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std::string translate_divu(uint32_t instr);
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std::string translate_mfhi(uint32_t instr);
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std::string translate_mflo(uint32_t instr);
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std::string translate_mthi(uint32_t instr);
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std::string translate_mtlo(uint32_t instr);
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// Logical instructions
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std::string translate_and(uint32_t instr);
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std::string translate_or(uint32_t instr);
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std::string translate_xor(uint32_t instr);
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std::string translate_nor(uint32_t instr);
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// Shift instructions
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std::string translate_sll(uint32_t instr);
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std::string translate_srl(uint32_t instr);
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std::string translate_sra(uint32_t instr);
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std::string translate_sllv(uint32_t instr);
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std::string translate_srlv(uint32_t instr);
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std::string translate_srav(uint32_t instr);
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// Load/store instructions
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std::string translate_lw(uint32_t instr);
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std::string translate_sw(uint32_t instr);
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std::string translate_lb(uint32_t instr);
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std::string translate_lbu(uint32_t instr);
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std::string translate_lh(uint32_t instr);
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std::string translate_lhu(uint32_t instr);
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std::string translate_lwl(uint32_t instr);
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std::string translate_lwr(uint32_t instr);
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std::string translate_swl(uint32_t instr);
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std::string translate_swr(uint32_t instr);
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std::string translate_sb(uint32_t instr);
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std::string translate_sh(uint32_t instr);
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// Immediate instructions
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std::string translate_addiu(uint32_t instr);
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std::string translate_andi(uint32_t instr);
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std::string translate_ori(uint32_t instr);
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std::string translate_xori(uint32_t instr);
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std::string translate_lui(uint32_t instr);
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// Set instructions
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std::string translate_slt(uint32_t instr);
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std::string translate_sltu(uint32_t instr);
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std::string translate_slti(uint32_t instr);
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std::string translate_sltiu(uint32_t instr);
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// Helper: Extract register fields
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static uint32_t get_rs(uint32_t instr) { return (instr >> 21) & 0x1F; }
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static uint32_t get_rt(uint32_t instr) { return (instr >> 16) & 0x1F; }
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static uint32_t get_rd(uint32_t instr) { return (instr >> 11) & 0x1F; }
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static uint32_t get_shamt(uint32_t instr) { return (instr >> 6) & 0x1F; }
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static uint32_t get_funct(uint32_t instr) { return instr & 0x3F; }
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static int16_t get_imm16(uint32_t instr) { return (int16_t)(instr & 0xFFFF); }
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static uint16_t get_imm16_u(uint32_t instr) { return (uint16_t)(instr & 0xFFFF); }
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};
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} // namespace PSXRecomp
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