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Merge pull request #388 from Yotona/TRK-work

Browse Source 
TRK work
This commit is contained in:
hatal175
2023-07-25 06:17:19 +03:00
committed by GitHub
parent 9cf73bea8b b070730d18
commit 7cda554a65
30 changed files with 76 additions and 1838 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Progress.md
+4 -4
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@@ -7,22 +7,22 @@ Section | Percentage | Decompiled (bytes) | Total (bytes)
.init | 97.972973% | 9280 | 9472
.extab | 100.000000% | 96 | 96
.extabindex | 100.000000% | 96 | 96
.text | 29.650687% | 1066400 | 3596544
.text | 29.838534% | 1073156 | 3596544
.ctors | 100.000000% | 448 | 448
.dtors | 100.000000% | 32 | 32
.rodata | 100.000000% | 193856 | 193856
.data | 100.000000% | 197632 | 197632
.sdata | 100.000000% | 1408 | 1408
.sdata2 | 100.000000% | 20832 | 20832
Total | 37.066839% | 1490336 | 4020672
Total | 37.234870% | 1497092 | 4020672
## Total
Section | Percentage | Decompiled (bytes) | Total (bytes)
---|---|---|---
main.dol | 37.066839% | 1490336 | 4020672
main.dol | 37.234870% | 1497092 | 4020672
RELs | 33.954487% | 3904876 | 11500324
Total | 34.760733% | 5395212 | 15520996
Total | 34.804261% | 5401968 | 15520996
## RELs
asm/JSystem/JFramework/JFWDisplay/waitForTick__FUlUs.s
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@@ -1,82 +0,0 @@
lbl_80272CB0:
/* 80272CB0 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80272CB4 7C 08 02 A6 */ mflr r0
/* 80272CB8 90 01 00 24 */ stw r0, 0x24(r1)
/* 80272CBC 93 E1 00 1C */ stw r31, 0x1c(r1)
/* 80272CC0 93 C1 00 18 */ stw r30, 0x18(r1)
/* 80272CC4 7C 7F 1B 79 */ or. r31, r3, r3
/* 80272CC8 7C 9E 23 78 */ mr r30, r4
/* 80272CCC 41 82 00 84 */ beq lbl_80272D50
/* 80272CD0 88 0D 8C 58 */ lbz r0, data_804511D8(r13)
/* 80272CD4 7C 00 07 75 */ extsb. r0, r0
/* 80272CD8 40 82 00 18 */ bne lbl_80272CF0
/* 80272CDC 48 0C FA 21 */ bl OSGetTime
/* 80272CE0 90 8D 8C 54 */ stw r4, data_804511D4(r13)
/* 80272CE4 90 6D 8C 50 */ stw r3, nextTick(r13)
/* 80272CE8 38 00 00 01 */ li r0, 1
/* 80272CEC 98 0D 8C 58 */ stb r0, data_804511D8(r13)
lbl_80272CF0:
/* 80272CF0 48 0C FA 0D */ bl OSGetTime
/* 80272CF4 7C 68 1B 78 */ mr r8, r3
/* 80272CF8 48 00 00 1C */ b lbl_80272D14
lbl_80272CFC:
/* 80272CFC 80 6D 8C 40 */ lwz r3, sManager__10JFWDisplay(r13)
/* 80272D00 7C C4 30 10 */ subfc r6, r4, r6
/* 80272D04 7C A8 39 10 */ subfe r5, r8, r7
/* 80272D08 48 00 01 09 */ bl threadSleep__10JFWDisplayFx
/* 80272D0C 48 0C F9 F1 */ bl OSGetTime
/* 80272D10 7C 68 1B 78 */ mr r8, r3
lbl_80272D14:
/* 80272D14 80 ED 8C 50 */ lwz r7, nextTick(r13)
/* 80272D18 80 CD 8C 54 */ lwz r6, data_804511D4(r13)
/* 80272D1C 6D 05 80 00 */ xoris r5, r8, 0x8000
/* 80272D20 6C E3 80 00 */ xoris r3, r7, 0x8000
/* 80272D24 7C 06 20 10 */ subfc r0, r6, r4
/* 80272D28 7C 63 29 10 */ subfe r3, r3, r5
/* 80272D2C 7C 65 29 10 */ subfe r3, r5, r5
/* 80272D30 7C 63 00 D1 */ neg. r3, r3
/* 80272D34 40 82 FF C8 */ bne lbl_80272CFC
/* 80272D38 38 00 00 00 */ li r0, 0
/* 80272D3C 7C 64 F8 14 */ addc r3, r4, r31
/* 80272D40 7C 08 01 14 */ adde r0, r8, r0
/* 80272D44 90 6D 8C 54 */ stw r3, data_804511D4(r13)
/* 80272D48 90 0D 8C 50 */ stw r0, nextTick(r13)
/* 80272D4C 48 00 00 6C */ b lbl_80272DB8
lbl_80272D50:
/* 80272D50 88 0D 8C 60 */ lbz r0, data_804511E0(r13)
/* 80272D54 7C 00 07 75 */ extsb. r0, r0
/* 80272D58 40 82 00 14 */ bne lbl_80272D6C
/* 80272D5C 48 0D AB 61 */ bl VIGetRetraceCount
/* 80272D60 90 6D 8C 5C */ stw r3, nextCount(r13)
/* 80272D64 38 00 00 01 */ li r0, 1
/* 80272D68 98 0D 8C 60 */ stb r0, data_804511E0(r13)
lbl_80272D6C:
/* 80272D6C 57 C0 04 3F */ clrlwi. r0, r30, 0x10
/* 80272D70 3B C0 00 01 */ li r30, 1
/* 80272D74 41 82 00 08 */ beq lbl_80272D7C
/* 80272D78 7C 1E 03 78 */ mr r30, r0
lbl_80272D7C:
/* 80272D7C 3B E0 00 00 */ li r31, 0
lbl_80272D80:
/* 80272D80 80 6D 8F B8 */ lwz r3, sManager__8JUTVideo(r13)
/* 80272D84 38 63 00 38 */ addi r3, r3, 0x38
/* 80272D88 38 81 00 08 */ addi r4, r1, 8
/* 80272D8C 38 A0 00 01 */ li r5, 1
/* 80272D90 48 0C BD 2D */ bl OSReceiveMessage
/* 80272D94 2C 03 00 00 */ cmpwi r3, 0
/* 80272D98 40 82 00 08 */ bne lbl_80272DA0
/* 80272D9C 93 E1 00 08 */ stw r31, 8(r1)
lbl_80272DA0:
/* 80272DA0 80 0D 8C 5C */ lwz r0, nextCount(r13)
/* 80272DA4 80 61 00 08 */ lwz r3, 8(r1)
/* 80272DA8 7C 00 18 51 */ subf. r0, r0, r3
/* 80272DAC 41 80 FF D4 */ blt lbl_80272D80
/* 80272DB0 7C 03 F2 14 */ add r0, r3, r30
/* 80272DB4 90 0D 8C 5C */ stw r0, nextCount(r13)
lbl_80272DB8:
/* 80272DB8 83 E1 00 1C */ lwz r31, 0x1c(r1)
/* 80272DBC 83 C1 00 18 */ lwz r30, 0x18(r1)
/* 80272DC0 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80272DC4 7C 08 03 A6 */ mtlr r0
/* 80272DC8 38 21 00 20 */ addi r1, r1, 0x20
/* 80272DCC 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRAram/aramToMainRam__7JKRAramFUlPUcUl15JKRExpandSwitchUlP7JKRHeapiPUl.s
-178
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@@ -1,178 +0,0 @@
lbl_802D25B4:
/* 802D25B4 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 802D25B8 7C 08 02 A6 */ mflr r0
/* 802D25BC 90 01 00 74 */ stw r0, 0x74(r1)
/* 802D25C0 39 61 00 70 */ addi r11, r1, 0x70
/* 802D25C4 48 08 FB FD */ bl _savegpr_22
/* 802D25C8 7C 79 1B 78 */ mr r25, r3
/* 802D25CC 7C 9A 23 78 */ mr r26, r4
/* 802D25D0 7C BB 2B 78 */ mr r27, r5
/* 802D25D4 7C D6 33 78 */ mr r22, r6
/* 802D25D8 7C FC 3B 78 */ mr r28, r7
/* 802D25DC 7D 1D 43 78 */ mr r29, r8
/* 802D25E0 7D 3E 4B 78 */ mr r30, r9
/* 802D25E4 7D 5F 53 79 */ or. r31, r10, r10
/* 802D25E8 3B 00 00 00 */ li r24, 0
/* 802D25EC 41 82 00 0C */ beq lbl_802D25F8
/* 802D25F0 38 00 00 00 */ li r0, 0
/* 802D25F4 90 1F 00 00 */ stw r0, 0(r31)
lbl_802D25F8:
/* 802D25F8 7F 43 D3 78 */ mr r3, r26
/* 802D25FC 7F 24 CB 78 */ mr r4, r25
/* 802D2600 38 A0 00 00 */ li r5, 0
/* 802D2604 38 C0 00 00 */ li r6, 0
/* 802D2608 4B FF FC 41 */ bl checkOkAddress__7JKRAramFPUcUlP12JKRAramBlockUl
/* 802D260C 2C 16 00 01 */ cmpwi r22, 1
/* 802D2610 40 82 00 5C */ bne lbl_802D266C
/* 802D2614 38 01 00 27 */ addi r0, r1, 0x27
/* 802D2618 54 17 00 34 */ rlwinm r23, r0, 0, 0, 0x1a
/* 802D261C 38 60 00 01 */ li r3, 1
/* 802D2620 7F 24 CB 78 */ mr r4, r25
/* 802D2624 7E E5 BB 78 */ mr r5, r23
/* 802D2628 38 C0 00 20 */ li r6, 0x20
/* 802D262C 38 E0 00 00 */ li r7, 0
/* 802D2630 48 00 12 09 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D2634 7E E3 BB 78 */ mr r3, r23
/* 802D2638 48 00 96 C1 */ bl checkCompressed__9JKRDecompFPUc
/* 802D263C 2C 03 00 03 */ cmpwi r3, 3
/* 802D2640 40 82 00 08 */ bne lbl_802D2648
/* 802D2644 38 60 00 00 */ li r3, 0
lbl_802D2648:
/* 802D2648 7C 78 1B 78 */ mr r24, r3
/* 802D264C 88 B7 00 07 */ lbz r5, 7(r23)
/* 802D2650 88 97 00 06 */ lbz r4, 6(r23)
/* 802D2654 88 77 00 04 */ lbz r3, 4(r23)
/* 802D2658 88 17 00 05 */ lbz r0, 5(r23)
/* 802D265C 54 00 80 1E */ slwi r0, r0, 0x10
/* 802D2660 50 60 C0 0E */ rlwimi r0, r3, 0x18, 0, 7
/* 802D2664 50 80 44 2E */ rlwimi r0, r4, 8, 0x10, 0x17
/* 802D2668 7C B7 03 78 */ or r23, r5, r0
lbl_802D266C:
/* 802D266C 2C 18 00 02 */ cmpwi r24, 2
/* 802D2670 40 82 00 74 */ bne lbl_802D26E4
/* 802D2674 28 1C 00 00 */ cmplwi r28, 0
/* 802D2678 41 82 00 10 */ beq lbl_802D2688
/* 802D267C 7C 1C B8 40 */ cmplw r28, r23
/* 802D2680 40 80 00 08 */ bge lbl_802D2688
/* 802D2684 7F 97 E3 78 */ mr r23, r28
lbl_802D2688:
/* 802D2688 28 1A 00 00 */ cmplwi r26, 0
/* 802D268C 40 82 00 18 */ bne lbl_802D26A4
/* 802D2690 7E E3 BB 78 */ mr r3, r23
/* 802D2694 38 80 00 20 */ li r4, 0x20
/* 802D2698 7F A5 EB 78 */ mr r5, r29
/* 802D269C 4B FF BD D9 */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D26A0 7C 7A 1B 78 */ mr r26, r3
lbl_802D26A4:
/* 802D26A4 28 1A 00 00 */ cmplwi r26, 0
/* 802D26A8 40 82 00 0C */ bne lbl_802D26B4
/* 802D26AC 38 60 00 00 */ li r3, 0
/* 802D26B0 48 00 01 68 */ b lbl_802D2818
lbl_802D26B4:
/* 802D26B4 7F 43 D3 78 */ mr r3, r26
/* 802D26B8 7F C4 F3 78 */ mr r4, r30
/* 802D26BC 4B FF FC 21 */ bl changeGroupIdIfNeed__7JKRAramFPUci
/* 802D26C0 7F 23 CB 78 */ mr r3, r25
/* 802D26C4 7F 44 D3 78 */ mr r4, r26
/* 802D26C8 7F 65 DB 78 */ mr r5, r27
/* 802D26CC 7E E6 BB 78 */ mr r6, r23
/* 802D26D0 38 E0 00 00 */ li r7, 0
/* 802D26D4 7F E8 FB 78 */ mr r8, r31
/* 802D26D8 48 00 01 59 */ bl JKRDecompressFromAramToMainRam__FUlPvUlUlUlPUl
/* 802D26DC 7F 43 D3 78 */ mr r3, r26
/* 802D26E0 48 00 01 38 */ b lbl_802D2818
lbl_802D26E4:
/* 802D26E4 2C 18 00 01 */ cmpwi r24, 1
/* 802D26E8 40 82 00 D0 */ bne lbl_802D27B8
/* 802D26EC 7F 63 DB 78 */ mr r3, r27
/* 802D26F0 38 80 FF E0 */ li r4, -32
/* 802D26F4 7F A5 EB 78 */ mr r5, r29
/* 802D26F8 4B FF BD 7D */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D26FC 7C 78 1B 79 */ or. r24, r3, r3
/* 802D2700 40 82 00 0C */ bne lbl_802D270C
/* 802D2704 38 60 00 00 */ li r3, 0
/* 802D2708 48 00 01 10 */ b lbl_802D2818
lbl_802D270C:
/* 802D270C 38 60 00 01 */ li r3, 1
/* 802D2710 7F 24 CB 78 */ mr r4, r25
/* 802D2714 7F 05 C3 78 */ mr r5, r24
/* 802D2718 7F 66 DB 78 */ mr r6, r27
/* 802D271C 38 E0 00 00 */ li r7, 0
/* 802D2720 48 00 11 19 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D2724 28 1C 00 00 */ cmplwi r28, 0
/* 802D2728 41 82 00 10 */ beq lbl_802D2738
/* 802D272C 7C 1C B8 40 */ cmplw r28, r23
/* 802D2730 40 80 00 08 */ bge lbl_802D2738
/* 802D2734 7F 97 E3 78 */ mr r23, r28
lbl_802D2738:
/* 802D2738 28 1A 00 00 */ cmplwi r26, 0
/* 802D273C 40 82 00 1C */ bne lbl_802D2758
/* 802D2740 7E E3 BB 78 */ mr r3, r23
/* 802D2744 38 80 00 20 */ li r4, 0x20
/* 802D2748 7F A5 EB 78 */ mr r5, r29
/* 802D274C 4B FF BD 29 */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D2750 7C 79 1B 78 */ mr r25, r3
/* 802D2754 48 00 00 08 */ b lbl_802D275C
lbl_802D2758:
/* 802D2758 7F 59 D3 78 */ mr r25, r26
lbl_802D275C:
/* 802D275C 28 19 00 00 */ cmplwi r25, 0
/* 802D2760 40 82 00 18 */ bne lbl_802D2778
/* 802D2764 7F 03 C3 78 */ mr r3, r24
/* 802D2768 38 80 00 00 */ li r4, 0
/* 802D276C 4B FF BD 95 */ bl free__7JKRHeapFPvP7JKRHeap
/* 802D2770 38 60 00 00 */ li r3, 0
/* 802D2774 48 00 00 A4 */ b lbl_802D2818
lbl_802D2778:
/* 802D2778 7F 23 CB 78 */ mr r3, r25
/* 802D277C 7F C4 F3 78 */ mr r4, r30
/* 802D2780 4B FF FB 5D */ bl changeGroupIdIfNeed__7JKRAramFPUci
/* 802D2784 7F 03 C3 78 */ mr r3, r24
/* 802D2788 7F 24 CB 78 */ mr r4, r25
/* 802D278C 7E E5 BB 78 */ mr r5, r23
/* 802D2790 38 C0 00 00 */ li r6, 0
/* 802D2794 48 00 91 F5 */ bl orderSync__9JKRDecompFPUcPUcUlUl
/* 802D2798 7F 03 C3 78 */ mr r3, r24
/* 802D279C 7F A4 EB 78 */ mr r4, r29
/* 802D27A0 4B FF BD 61 */ bl free__7JKRHeapFPvP7JKRHeap
/* 802D27A4 28 1F 00 00 */ cmplwi r31, 0
/* 802D27A8 41 82 00 08 */ beq lbl_802D27B0
/* 802D27AC 92 FF 00 00 */ stw r23, 0(r31)
lbl_802D27B0:
/* 802D27B0 7F 23 CB 78 */ mr r3, r25
/* 802D27B4 48 00 00 64 */ b lbl_802D2818
lbl_802D27B8:
/* 802D27B8 28 1A 00 00 */ cmplwi r26, 0
/* 802D27BC 40 82 00 18 */ bne lbl_802D27D4
/* 802D27C0 7F 63 DB 78 */ mr r3, r27
/* 802D27C4 38 80 00 20 */ li r4, 0x20
/* 802D27C8 7F A5 EB 78 */ mr r5, r29
/* 802D27CC 4B FF BC A9 */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D27D0 7C 7A 1B 78 */ mr r26, r3
lbl_802D27D4:
/* 802D27D4 28 1A 00 00 */ cmplwi r26, 0
/* 802D27D8 40 82 00 0C */ bne lbl_802D27E4
/* 802D27DC 38 60 00 00 */ li r3, 0
/* 802D27E0 48 00 00 38 */ b lbl_802D2818
lbl_802D27E4:
/* 802D27E4 7F 43 D3 78 */ mr r3, r26
/* 802D27E8 7F C4 F3 78 */ mr r4, r30
/* 802D27EC 4B FF FA F1 */ bl changeGroupIdIfNeed__7JKRAramFPUci
/* 802D27F0 38 60 00 01 */ li r3, 1
/* 802D27F4 7F 24 CB 78 */ mr r4, r25
/* 802D27F8 7F 45 D3 78 */ mr r5, r26
/* 802D27FC 7F 66 DB 78 */ mr r6, r27
/* 802D2800 38 E0 00 00 */ li r7, 0
/* 802D2804 48 00 10 35 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D2808 28 1F 00 00 */ cmplwi r31, 0
/* 802D280C 41 82 00 08 */ beq lbl_802D2814
/* 802D2810 93 7F 00 00 */ stw r27, 0(r31)
lbl_802D2814:
/* 802D2814 7F 43 D3 78 */ mr r3, r26
lbl_802D2818:
/* 802D2818 39 61 00 70 */ addi r11, r1, 0x70
/* 802D281C 48 08 F9 F1 */ bl _restgpr_22
/* 802D2820 80 01 00 74 */ lwz r0, 0x74(r1)
/* 802D2824 7C 08 03 A6 */ mtlr r0
/* 802D2828 38 21 00 70 */ addi r1, r1, 0x70
/* 802D282C 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRAram/decompSZS_subroutine__FPUcPUc.s
-192
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@@ -1,192 +0,0 @@
lbl_802D29A0:
/* 802D29A0 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 802D29A4 7C 08 02 A6 */ mflr r0
/* 802D29A8 90 01 00 24 */ stw r0, 0x24(r1)
/* 802D29AC 39 61 00 20 */ addi r11, r1, 0x20
/* 802D29B0 48 08 F8 2D */ bl _savegpr_29
/* 802D29B4 7C 9D 23 78 */ mr r29, r4
/* 802D29B8 38 80 00 00 */ li r4, 0
/* 802D29BC 38 00 00 00 */ li r0, 0
/* 802D29C0 3B C0 00 00 */ li r30, 0
/* 802D29C4 88 A3 00 00 */ lbz r5, 0(r3)
/* 802D29C8 2C 05 00 59 */ cmpwi r5, 0x59
/* 802D29CC 40 82 00 28 */ bne lbl_802D29F4
/* 802D29D0 88 A3 00 01 */ lbz r5, 1(r3)
/* 802D29D4 2C 05 00 61 */ cmpwi r5, 0x61
/* 802D29D8 40 82 00 1C */ bne lbl_802D29F4
/* 802D29DC 88 A3 00 02 */ lbz r5, 2(r3)
/* 802D29E0 2C 05 00 7A */ cmpwi r5, 0x7a
/* 802D29E4 40 82 00 10 */ bne lbl_802D29F4
/* 802D29E8 88 A3 00 03 */ lbz r5, 3(r3)
/* 802D29EC 2C 05 00 30 */ cmpwi r5, 0x30
/* 802D29F0 41 82 00 0C */ beq lbl_802D29FC
lbl_802D29F4:
/* 802D29F4 38 60 FF FF */ li r3, -1
/* 802D29F8 48 00 02 30 */ b lbl_802D2C28
lbl_802D29FC:
/* 802D29FC 80 CD 8E 70 */ lwz r6, fileOffset(r13)
/* 802D2A00 80 A3 00 04 */ lwz r5, 4(r3)
/* 802D2A04 7C A6 28 50 */ subf r5, r6, r5
/* 802D2A08 7F FD 2A 14 */ add r31, r29, r5
/* 802D2A0C 80 AD 8E 78 */ lwz r5, maxDest(r13)
/* 802D2A10 7C BD 2A 14 */ add r5, r29, r5
/* 802D2A14 7C 1F 28 40 */ cmplw r31, r5
/* 802D2A18 40 81 00 08 */ ble lbl_802D2A20
/* 802D2A1C 7C BF 2B 78 */ mr r31, r5
lbl_802D2A20:
/* 802D2A20 38 63 00 10 */ addi r3, r3, 0x10
lbl_802D2A24:
/* 802D2A24 2C 04 00 00 */ cmpwi r4, 0
/* 802D2A28 40 82 00 2C */ bne lbl_802D2A54
/* 802D2A2C 80 0D 8E 68 */ lwz r0, srcLimit(r13)
/* 802D2A30 7C 03 00 40 */ cmplw r3, r0
/* 802D2A34 40 81 00 14 */ ble lbl_802D2A48
/* 802D2A38 80 0D 8E 64 */ lwz r0, transLeft(r13)
/* 802D2A3C 28 00 00 00 */ cmplwi r0, 0
/* 802D2A40 41 82 00 08 */ beq lbl_802D2A48
/* 802D2A44 48 00 02 A1 */ bl nextSrcData__FPUc
lbl_802D2A48:
/* 802D2A48 88 03 00 00 */ lbz r0, 0(r3)
/* 802D2A4C 38 80 00 08 */ li r4, 8
/* 802D2A50 38 63 00 01 */ addi r3, r3, 1
lbl_802D2A54:
/* 802D2A54 54 05 06 31 */ rlwinm. r5, r0, 0, 0x18, 0x18
/* 802D2A58 41 82 00 94 */ beq lbl_802D2AEC
/* 802D2A5C 80 CD 8E 70 */ lwz r6, fileOffset(r13)
/* 802D2A60 28 06 00 00 */ cmplwi r6, 0
/* 802D2A64 41 82 00 5C */ beq lbl_802D2AC0
/* 802D2A68 80 AD 8E 74 */ lwz r5, readCount(r13)
/* 802D2A6C 7C 05 30 40 */ cmplw r5, r6
/* 802D2A70 41 80 00 1C */ blt lbl_802D2A8C
/* 802D2A74 88 A3 00 00 */ lbz r5, 0(r3)
/* 802D2A78 98 BD 00 00 */ stb r5, 0(r29)
/* 802D2A7C 3B BD 00 01 */ addi r29, r29, 1
/* 802D2A80 7C 1D F8 40 */ cmplw r29, r31
/* 802D2A84 3B DE 00 01 */ addi r30, r30, 1
/* 802D2A88 41 82 01 94 */ beq lbl_802D2C1C
lbl_802D2A8C:
/* 802D2A8C 88 E3 00 00 */ lbz r7, 0(r3)
/* 802D2A90 80 CD 8E 5C */ lwz r6, refCurrent(r13)
/* 802D2A94 38 A6 00 01 */ addi r5, r6, 1
/* 802D2A98 90 AD 8E 5C */ stw r5, refCurrent(r13)
/* 802D2A9C 98 E6 00 00 */ stb r7, 0(r6)
/* 802D2AA0 80 CD 8E 5C */ lwz r6, refCurrent(r13)
/* 802D2AA4 80 AD 8E 58 */ lwz r5, refEnd(r13)
/* 802D2AA8 7C 06 28 40 */ cmplw r6, r5
/* 802D2AAC 40 82 00 0C */ bne lbl_802D2AB8
/* 802D2AB0 80 AD 8E 54 */ lwz r5, refBuf(r13)
/* 802D2AB4 90 AD 8E 5C */ stw r5, refCurrent(r13)
lbl_802D2AB8:
/* 802D2AB8 38 63 00 01 */ addi r3, r3, 1
/* 802D2ABC 48 00 00 20 */ b lbl_802D2ADC
lbl_802D2AC0:
/* 802D2AC0 88 A3 00 00 */ lbz r5, 0(r3)
/* 802D2AC4 98 BD 00 00 */ stb r5, 0(r29)
/* 802D2AC8 3B BD 00 01 */ addi r29, r29, 1
/* 802D2ACC 7C 1D F8 40 */ cmplw r29, r31
/* 802D2AD0 38 63 00 01 */ addi r3, r3, 1
/* 802D2AD4 3B DE 00 01 */ addi r30, r30, 1
/* 802D2AD8 41 82 01 44 */ beq lbl_802D2C1C
lbl_802D2ADC:
/* 802D2ADC 80 AD 8E 74 */ lwz r5, readCount(r13)
/* 802D2AE0 38 A5 00 01 */ addi r5, r5, 1
/* 802D2AE4 90 AD 8E 74 */ stw r5, readCount(r13)
/* 802D2AE8 48 00 01 24 */ b lbl_802D2C0C
lbl_802D2AEC:
/* 802D2AEC 88 C3 00 00 */ lbz r6, 0(r3)
/* 802D2AF0 88 E3 00 01 */ lbz r7, 1(r3)
/* 802D2AF4 50 C7 45 2E */ rlwimi r7, r6, 8, 0x14, 0x17
/* 802D2AF8 7C C5 26 70 */ srawi r5, r6, 4
/* 802D2AFC 81 0D 8E 70 */ lwz r8, fileOffset(r13)
/* 802D2B00 28 08 00 00 */ cmplwi r8, 0
/* 802D2B04 38 63 00 02 */ addi r3, r3, 2
/* 802D2B08 41 82 00 2C */ beq lbl_802D2B34
/* 802D2B0C 80 CD 8E 5C */ lwz r6, refCurrent(r13)
/* 802D2B10 7C C7 30 50 */ subf r6, r7, r6
/* 802D2B14 39 26 FF FF */ addi r9, r6, -1
/* 802D2B18 80 ED 8E 54 */ lwz r7, refBuf(r13)
/* 802D2B1C 7C 09 38 40 */ cmplw r9, r7
/* 802D2B20 40 80 00 1C */ bge lbl_802D2B3C
/* 802D2B24 80 CD 8E 58 */ lwz r6, refEnd(r13)
/* 802D2B28 7C C7 30 50 */ subf r6, r7, r6
/* 802D2B2C 7D 29 32 14 */ add r9, r9, r6
/* 802D2B30 48 00 00 0C */ b lbl_802D2B3C
lbl_802D2B34:
/* 802D2B34 7C C7 E8 50 */ subf r6, r7, r29
/* 802D2B38 39 26 FF FF */ addi r9, r6, -1
lbl_802D2B3C:
/* 802D2B3C 2C 05 00 00 */ cmpwi r5, 0
/* 802D2B40 40 82 00 14 */ bne lbl_802D2B54
/* 802D2B44 88 A3 00 00 */ lbz r5, 0(r3)
/* 802D2B48 38 A5 00 12 */ addi r5, r5, 0x12
/* 802D2B4C 38 63 00 01 */ addi r3, r3, 1
/* 802D2B50 48 00 00 08 */ b lbl_802D2B58
lbl_802D2B54:
/* 802D2B54 38 A5 00 02 */ addi r5, r5, 2
lbl_802D2B58:
/* 802D2B58 28 08 00 00 */ cmplwi r8, 0
/* 802D2B5C 41 82 00 80 */ beq lbl_802D2BDC
lbl_802D2B60:
/* 802D2B60 80 ED 8E 74 */ lwz r7, readCount(r13)
/* 802D2B64 80 CD 8E 70 */ lwz r6, fileOffset(r13)
/* 802D2B68 7C 07 30 40 */ cmplw r7, r6
/* 802D2B6C 41 80 00 1C */ blt lbl_802D2B88
/* 802D2B70 88 C9 00 00 */ lbz r6, 0(r9)
/* 802D2B74 98 DD 00 00 */ stb r6, 0(r29)
/* 802D2B78 3B BD 00 01 */ addi r29, r29, 1
/* 802D2B7C 7C 1D F8 40 */ cmplw r29, r31
/* 802D2B80 3B DE 00 01 */ addi r30, r30, 1
/* 802D2B84 41 82 00 88 */ beq lbl_802D2C0C
lbl_802D2B88:
/* 802D2B88 89 09 00 00 */ lbz r8, 0(r9)
/* 802D2B8C 80 ED 8E 5C */ lwz r7, refCurrent(r13)
/* 802D2B90 38 C7 00 01 */ addi r6, r7, 1
/* 802D2B94 90 CD 8E 5C */ stw r6, refCurrent(r13)
/* 802D2B98 99 07 00 00 */ stb r8, 0(r7)
/* 802D2B9C 80 CD 8E 5C */ lwz r6, refCurrent(r13)
/* 802D2BA0 80 ED 8E 58 */ lwz r7, refEnd(r13)
/* 802D2BA4 7C 06 38 40 */ cmplw r6, r7
/* 802D2BA8 40 82 00 0C */ bne lbl_802D2BB4
/* 802D2BAC 80 CD 8E 54 */ lwz r6, refBuf(r13)
/* 802D2BB0 90 CD 8E 5C */ stw r6, refCurrent(r13)
lbl_802D2BB4:
/* 802D2BB4 39 29 00 01 */ addi r9, r9, 1
/* 802D2BB8 7C 09 38 40 */ cmplw r9, r7
/* 802D2BBC 40 82 00 08 */ bne lbl_802D2BC4
/* 802D2BC0 81 2D 8E 54 */ lwz r9, refBuf(r13)
lbl_802D2BC4:
/* 802D2BC4 80 CD 8E 74 */ lwz r6, readCount(r13)
/* 802D2BC8 38 C6 00 01 */ addi r6, r6, 1
/* 802D2BCC 90 CD 8E 74 */ stw r6, readCount(r13)
/* 802D2BD0 34 A5 FF FF */ addic. r5, r5, -1
/* 802D2BD4 40 82 FF 8C */ bne lbl_802D2B60
/* 802D2BD8 48 00 00 34 */ b lbl_802D2C0C
lbl_802D2BDC:
/* 802D2BDC 88 C9 00 00 */ lbz r6, 0(r9)
/* 802D2BE0 98 DD 00 00 */ stb r6, 0(r29)
/* 802D2BE4 3B BD 00 01 */ addi r29, r29, 1
/* 802D2BE8 7C 1D F8 40 */ cmplw r29, r31
/* 802D2BEC 3B DE 00 01 */ addi r30, r30, 1
/* 802D2BF0 41 82 00 1C */ beq lbl_802D2C0C
/* 802D2BF4 80 CD 8E 74 */ lwz r6, readCount(r13)
/* 802D2BF8 38 C6 00 01 */ addi r6, r6, 1
/* 802D2BFC 90 CD 8E 74 */ stw r6, readCount(r13)
/* 802D2C00 34 A5 FF FF */ addic. r5, r5, -1
/* 802D2C04 39 29 00 01 */ addi r9, r9, 1
/* 802D2C08 40 82 FF D4 */ bne lbl_802D2BDC
lbl_802D2C0C:
/* 802D2C0C 54 00 08 3C */ slwi r0, r0, 1
/* 802D2C10 7C 1D F8 40 */ cmplw r29, r31
/* 802D2C14 38 84 FF FF */ addi r4, r4, -1
/* 802D2C18 41 80 FE 0C */ blt lbl_802D2A24
lbl_802D2C1C:
/* 802D2C1C 80 6D 8E 80 */ lwz r3, tsPtr(r13)
/* 802D2C20 93 C3 00 00 */ stw r30, 0(r3)
/* 802D2C24 38 60 00 00 */ li r3, 0
lbl_802D2C28:
/* 802D2C28 39 61 00 20 */ addi r11, r1, 0x20
/* 802D2C2C 48 08 F5 FD */ bl _restgpr_29
/* 802D2C30 80 01 00 24 */ lwz r0, 0x24(r1)
/* 802D2C34 7C 08 03 A6 */ mtlr r0
/* 802D2C38 38 21 00 20 */ addi r1, r1, 0x20
/* 802D2C3C 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRAram/mainRamToAram__7JKRAramFPUcUlUl15JKRExpandSwitchUlP7JKRHeapiPUl.s
-183
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@@ -1,183 +0,0 @@
lbl_802D233C:
/* 802D233C 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 802D2340 7C 08 02 A6 */ mflr r0
/* 802D2344 90 01 00 34 */ stw r0, 0x34(r1)
/* 802D2348 39 61 00 30 */ addi r11, r1, 0x30
/* 802D234C 48 08 FE 79 */ bl _savegpr_23
/* 802D2350 7C 7E 1B 78 */ mr r30, r3
/* 802D2354 7C 98 23 78 */ mr r24, r4
/* 802D2358 7C BF 2B 78 */ mr r31, r5
/* 802D235C 7C D7 33 78 */ mr r23, r6
/* 802D2360 7C F9 3B 78 */ mr r25, r7
/* 802D2364 7D 1A 43 78 */ mr r26, r8
/* 802D2368 7D 3B 4B 78 */ mr r27, r9
/* 802D236C 7D 5C 53 78 */ mr r28, r10
/* 802D2370 3B A0 00 00 */ li r29, 0
/* 802D2374 38 A0 00 00 */ li r5, 0
/* 802D2378 38 C0 00 00 */ li r6, 0
/* 802D237C 4B FF FE CD */ bl checkOkAddress__7JKRAramFPUcUlP12JKRAramBlockUl
/* 802D2380 2C 17 00 01 */ cmpwi r23, 1
/* 802D2384 40 82 00 20 */ bne lbl_802D23A4
/* 802D2388 7F C3 F3 78 */ mr r3, r30
/* 802D238C 48 00 99 6D */ bl checkCompressed__9JKRDecompFPUc
/* 802D2390 2C 03 00 03 */ cmpwi r3, 3
/* 802D2394 40 82 00 08 */ bne lbl_802D239C
/* 802D2398 38 60 00 00 */ li r3, 0
lbl_802D239C:
/* 802D239C 30 03 FF FF */ addic r0, r3, -1
/* 802D23A0 7E E0 19 10 */ subfe r23, r0, r3
lbl_802D23A4:
/* 802D23A4 2C 17 00 01 */ cmpwi r23, 1
/* 802D23A8 40 82 01 54 */ bne lbl_802D24FC
/* 802D23AC 88 BE 00 07 */ lbz r5, 7(r30)
/* 802D23B0 88 9E 00 06 */ lbz r4, 6(r30)
/* 802D23B4 88 7E 00 04 */ lbz r3, 4(r30)
/* 802D23B8 88 1E 00 05 */ lbz r0, 5(r30)
/* 802D23BC 54 00 80 1E */ slwi r0, r0, 0x10
/* 802D23C0 50 60 C0 0E */ rlwimi r0, r3, 0x18, 0, 7
/* 802D23C4 50 80 44 2E */ rlwimi r0, r4, 8, 0x10, 0x17
/* 802D23C8 7C B7 03 78 */ or r23, r5, r0
/* 802D23CC 28 19 00 00 */ cmplwi r25, 0
/* 802D23D0 41 82 00 0C */ beq lbl_802D23DC
/* 802D23D4 7C 19 B8 40 */ cmplw r25, r23
/* 802D23D8 40 81 00 0C */ ble lbl_802D23E4
lbl_802D23DC:
/* 802D23DC 38 17 00 1F */ addi r0, r23, 0x1f
/* 802D23E0 54 19 00 34 */ rlwinm r25, r0, 0, 0, 0x1a
lbl_802D23E4:
/* 802D23E4 28 18 00 00 */ cmplwi r24, 0
/* 802D23E8 40 82 00 50 */ bne lbl_802D2438
/* 802D23EC 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram(r13)
/* 802D23F0 80 63 00 94 */ lwz r3, 0x94(r3)
/* 802D23F4 7F 24 CB 78 */ mr r4, r25
/* 802D23F8 38 A0 00 00 */ li r5, 0
/* 802D23FC 48 00 0B C1 */ bl alloc__11JKRAramHeapFUlQ211JKRAramHeap10EAllocMode
/* 802D2400 7C 7D 1B 78 */ mr r29, r3
/* 802D2404 28 03 00 00 */ cmplwi r3, 0
/* 802D2408 40 82 00 0C */ bne lbl_802D2414
/* 802D240C 38 60 00 00 */ li r3, 0
/* 802D2410 48 00 01 8C */ b lbl_802D259C
lbl_802D2414:
/* 802D2414 2C 1B 00 00 */ cmpwi r27, 0
/* 802D2418 40 80 00 14 */ bge lbl_802D242C
/* 802D241C 80 8D 8E 48 */ lwz r4, sAramObject__7JKRAram(r13)
/* 802D2420 80 84 00 94 */ lwz r4, 0x94(r4)
/* 802D2424 88 04 00 40 */ lbz r0, 0x40(r4)
/* 802D2428 48 00 00 08 */ b lbl_802D2430
lbl_802D242C:
/* 802D242C 57 60 06 3E */ clrlwi r0, r27, 0x18
lbl_802D2430:
/* 802D2430 98 03 00 20 */ stb r0, 0x20(r3)
/* 802D2434 83 03 00 14 */ lwz r24, 0x14(r3)
lbl_802D2438:
/* 802D2438 28 1F 00 00 */ cmplwi r31, 0
/* 802D243C 41 82 00 0C */ beq lbl_802D2448
/* 802D2440 7C 1F B8 40 */ cmplw r31, r23
/* 802D2444 40 81 00 0C */ ble lbl_802D2450
lbl_802D2448:
/* 802D2448 38 17 00 1F */ addi r0, r23, 0x1f
/* 802D244C 54 1F 00 34 */ rlwinm r31, r0, 0, 0, 0x1a
lbl_802D2450:
/* 802D2450 7C 1F C8 40 */ cmplw r31, r25
/* 802D2454 40 81 00 08 */ ble lbl_802D245C
/* 802D2458 7F 3F CB 78 */ mr r31, r25
lbl_802D245C:
/* 802D245C 7F 23 CB 78 */ mr r3, r25
/* 802D2460 38 80 FF E0 */ li r4, -32
/* 802D2464 7F 45 D3 78 */ mr r5, r26
/* 802D2468 4B FF C0 0D */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D246C 7C 77 1B 79 */ or. r23, r3, r3
/* 802D2470 40 82 00 30 */ bne lbl_802D24A0
/* 802D2474 28 1D 00 00 */ cmplwi r29, 0
/* 802D2478 41 82 00 20 */ beq lbl_802D2498
/* 802D247C 41 82 00 1C */ beq lbl_802D2498
/* 802D2480 7F A3 EB 78 */ mr r3, r29
/* 802D2484 38 80 00 01 */ li r4, 1
/* 802D2488 81 9D 00 00 */ lwz r12, 0(r29)
/* 802D248C 81 8C 00 08 */ lwz r12, 8(r12)
/* 802D2490 7D 89 03 A6 */ mtctr r12
/* 802D2494 4E 80 04 21 */ bctrl
lbl_802D2498:
/* 802D2498 38 60 00 00 */ li r3, 0
/* 802D249C 48 00 01 00 */ b lbl_802D259C
lbl_802D24A0:
/* 802D24A0 7F C3 F3 78 */ mr r3, r30
/* 802D24A4 7E E4 BB 78 */ mr r4, r23
/* 802D24A8 7F 25 CB 78 */ mr r5, r25
/* 802D24AC 38 C0 00 00 */ li r6, 0
/* 802D24B0 48 00 94 D9 */ bl orderSync__9JKRDecompFPUcPUcUlUl
/* 802D24B4 38 60 00 00 */ li r3, 0
/* 802D24B8 7E E4 BB 78 */ mr r4, r23
/* 802D24BC 7F 05 C3 78 */ mr r5, r24
/* 802D24C0 7F E6 FB 78 */ mr r6, r31
/* 802D24C4 7F A7 EB 78 */ mr r7, r29
/* 802D24C8 48 00 13 71 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D24CC 7E E3 BB 78 */ mr r3, r23
/* 802D24D0 7F 44 D3 78 */ mr r4, r26
/* 802D24D4 4B FF C0 2D */ bl free__7JKRHeapFPvP7JKRHeap
/* 802D24D8 28 1D 00 00 */ cmplwi r29, 0
/* 802D24DC 40 82 00 0C */ bne lbl_802D24E8
/* 802D24E0 38 60 FF FF */ li r3, -1
/* 802D24E4 48 00 00 08 */ b lbl_802D24EC
lbl_802D24E8:
/* 802D24E8 7F A3 EB 78 */ mr r3, r29
lbl_802D24EC:
/* 802D24EC 28 1C 00 00 */ cmplwi r28, 0
/* 802D24F0 41 82 00 AC */ beq lbl_802D259C
/* 802D24F4 93 FC 00 00 */ stw r31, 0(r28)
/* 802D24F8 48 00 00 A4 */ b lbl_802D259C
lbl_802D24FC:
/* 802D24FC 28 19 00 00 */ cmplwi r25, 0
/* 802D2500 41 82 00 10 */ beq lbl_802D2510
/* 802D2504 7C 1F C8 40 */ cmplw r31, r25
/* 802D2508 40 81 00 08 */ ble lbl_802D2510
/* 802D250C 7F 3F CB 78 */ mr r31, r25
lbl_802D2510:
/* 802D2510 28 18 00 00 */ cmplwi r24, 0
/* 802D2514 40 82 00 50 */ bne lbl_802D2564
/* 802D2518 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram(r13)
/* 802D251C 80 63 00 94 */ lwz r3, 0x94(r3)
/* 802D2520 7F E4 FB 78 */ mr r4, r31
/* 802D2524 38 A0 00 00 */ li r5, 0
/* 802D2528 48 00 0A 95 */ bl alloc__11JKRAramHeapFUlQ211JKRAramHeap10EAllocMode
/* 802D252C 7C 7D 1B 78 */ mr r29, r3
/* 802D2530 2C 1B 00 00 */ cmpwi r27, 0
/* 802D2534 40 80 00 14 */ bge lbl_802D2548
/* 802D2538 80 8D 8E 48 */ lwz r4, sAramObject__7JKRAram(r13)
/* 802D253C 80 84 00 94 */ lwz r4, 0x94(r4)
/* 802D2540 88 04 00 40 */ lbz r0, 0x40(r4)
/* 802D2544 48 00 00 08 */ b lbl_802D254C
lbl_802D2548:
/* 802D2548 57 60 06 3E */ clrlwi r0, r27, 0x18
lbl_802D254C:
/* 802D254C 98 03 00 20 */ stb r0, 0x20(r3)
/* 802D2550 28 03 00 00 */ cmplwi r3, 0
/* 802D2554 40 82 00 0C */ bne lbl_802D2560
/* 802D2558 38 60 00 00 */ li r3, 0
/* 802D255C 48 00 00 40 */ b lbl_802D259C
lbl_802D2560:
/* 802D2560 83 03 00 14 */ lwz r24, 0x14(r3)
lbl_802D2564:
/* 802D2564 38 60 00 00 */ li r3, 0
/* 802D2568 7F C4 F3 78 */ mr r4, r30
/* 802D256C 7F 05 C3 78 */ mr r5, r24
/* 802D2570 7F E6 FB 78 */ mr r6, r31
/* 802D2574 7F A7 EB 78 */ mr r7, r29
/* 802D2578 48 00 12 C1 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D257C 28 1D 00 00 */ cmplwi r29, 0
/* 802D2580 40 82 00 0C */ bne lbl_802D258C
/* 802D2584 38 60 FF FF */ li r3, -1
/* 802D2588 48 00 00 08 */ b lbl_802D2590
lbl_802D258C:
/* 802D258C 7F A3 EB 78 */ mr r3, r29
lbl_802D2590:
/* 802D2590 28 1C 00 00 */ cmplwi r28, 0
/* 802D2594 41 82 00 08 */ beq lbl_802D259C
/* 802D2598 93 FC 00 00 */ stw r31, 0(r28)
lbl_802D259C:
/* 802D259C 39 61 00 30 */ addi r11, r1, 0x30
/* 802D25A0 48 08 FC 71 */ bl _restgpr_23
/* 802D25A4 80 01 00 34 */ lwz r0, 0x34(r1)
/* 802D25A8 7C 08 03 A6 */ mtlr r0
/* 802D25AC 38 21 00 30 */ addi r1, r1, 0x30
/* 802D25B0 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRAram/nextSrcData__FPUc.s
-55
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@@ -1,55 +0,0 @@
lbl_802D2CE4:
/* 802D2CE4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 802D2CE8 7C 08 02 A6 */ mflr r0
/* 802D2CEC 90 01 00 24 */ stw r0, 0x24(r1)
/* 802D2CF0 39 61 00 20 */ addi r11, r1, 0x20
/* 802D2CF4 48 08 F4 E5 */ bl _savegpr_28
/* 802D2CF8 7C 64 1B 78 */ mr r4, r3
/* 802D2CFC 80 0D 8E 50 */ lwz r0, szpEnd(r13)
/* 802D2D00 7F A4 00 50 */ subf r29, r4, r0
/* 802D2D04 57 A5 06 FF */ clrlwi. r5, r29, 0x1b
/* 802D2D08 41 82 00 14 */ beq lbl_802D2D1C
/* 802D2D0C 80 6D 8E 4C */ lwz r3, szpBuf(r13)
/* 802D2D10 38 03 00 20 */ addi r0, r3, 0x20
/* 802D2D14 7F C5 00 50 */ subf r30, r5, r0
/* 802D2D18 48 00 00 08 */ b lbl_802D2D20
lbl_802D2D1C:
/* 802D2D1C 83 CD 8E 4C */ lwz r30, szpBuf(r13)
lbl_802D2D20:
/* 802D2D20 7F C3 F3 78 */ mr r3, r30
/* 802D2D24 7F A5 EB 78 */ mr r5, r29
/* 802D2D28 4B D3 08 19 */ bl memcpy
/* 802D2D2C 7F FE EA 14 */ add r31, r30, r29
/* 802D2D30 80 0D 8E 50 */ lwz r0, szpEnd(r13)
/* 802D2D34 7F 9F 00 50 */ subf r28, r31, r0
/* 802D2D38 80 0D 8E 64 */ lwz r0, transLeft(r13)
/* 802D2D3C 7C 1C 00 40 */ cmplw r28, r0
/* 802D2D40 40 81 00 08 */ ble lbl_802D2D48
/* 802D2D44 7C 1C 03 78 */ mr r28, r0
lbl_802D2D48:
/* 802D2D48 38 60 00 01 */ li r3, 1
/* 802D2D4C 80 8D 8E 6C */ lwz r4, srcAddress(r13)
/* 802D2D50 80 0D 8E 60 */ lwz r0, srcOffset(r13)
/* 802D2D54 7C 84 02 14 */ add r4, r4, r0
/* 802D2D58 7C BE EA 14 */ add r5, r30, r29
/* 802D2D5C 38 1C 00 1F */ addi r0, r28, 0x1f
/* 802D2D60 54 06 00 34 */ rlwinm r6, r0, 0, 0, 0x1a
/* 802D2D64 38 E0 00 00 */ li r7, 0
/* 802D2D68 48 00 0A D1 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D2D6C 80 0D 8E 60 */ lwz r0, srcOffset(r13)
/* 802D2D70 7C 00 E2 14 */ add r0, r0, r28
/* 802D2D74 90 0D 8E 60 */ stw r0, srcOffset(r13)
/* 802D2D78 80 0D 8E 64 */ lwz r0, transLeft(r13)
/* 802D2D7C 7C 1C 00 51 */ subf. r0, r28, r0
/* 802D2D80 90 0D 8E 64 */ stw r0, transLeft(r13)
/* 802D2D84 40 82 00 0C */ bne lbl_802D2D90
/* 802D2D88 7C 1F E2 14 */ add r0, r31, r28
/* 802D2D8C 90 0D 8E 68 */ stw r0, srcLimit(r13)
lbl_802D2D90:
/* 802D2D90 7F C3 F3 78 */ mr r3, r30
/* 802D2D94 39 61 00 20 */ addi r11, r1, 0x20
/* 802D2D98 48 08 F4 8D */ bl _restgpr_28
/* 802D2D9C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 802D2DA0 7C 08 03 A6 */ mtlr r0
/* 802D2DA4 38 21 00 20 */ addi r1, r1, 0x20
/* 802D2DA8 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRCompArchive/fetchResource__14JKRCompArchiveFPQ210JKRArchive12SDIFileEntryPUl.s
-106
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@@ -1,106 +0,0 @@
lbl_802D8F40:
/* 802D8F40 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 802D8F44 7C 08 02 A6 */ mflr r0
/* 802D8F48 90 01 00 34 */ stw r0, 0x34(r1)
/* 802D8F4C 39 61 00 30 */ addi r11, r1, 0x30
/* 802D8F50 48 08 92 89 */ bl _savegpr_28
/* 802D8F54 7C 7C 1B 78 */ mr r28, r3
/* 802D8F58 7C 9D 23 78 */ mr r29, r4
/* 802D8F5C 7C BE 2B 78 */ mr r30, r5
/* 802D8F60 80 A4 00 0C */ lwz r5, 0xc(r4)
/* 802D8F64 7C A4 2B 78 */ mr r4, r5
/* 802D8F68 80 1D 00 04 */ lwz r0, 4(r29)
/* 802D8F6C 54 03 46 3E */ srwi r3, r0, 0x18
/* 802D8F70 54 00 47 7B */ rlwinm. r0, r0, 8, 0x1d, 0x1d
/* 802D8F74 40 82 00 0C */ bne lbl_802D8F80
/* 802D8F78 3B E0 00 00 */ li r31, 0
/* 802D8F7C 48 00 00 18 */ b lbl_802D8F94
lbl_802D8F80:
/* 802D8F80 54 60 06 31 */ rlwinm. r0, r3, 0, 0x18, 0x18
/* 802D8F84 41 82 00 0C */ beq lbl_802D8F90
/* 802D8F88 3B E0 00 02 */ li r31, 2
/* 802D8F8C 48 00 00 08 */ b lbl_802D8F94
lbl_802D8F90:
/* 802D8F90 3B E0 00 01 */ li r31, 1
lbl_802D8F94:
/* 802D8F94 28 1E 00 00 */ cmplwi r30, 0
/* 802D8F98 40 82 00 08 */ bne lbl_802D8FA0
/* 802D8F9C 3B C1 00 10 */ addi r30, r1, 0x10
lbl_802D8FA0:
/* 802D8FA0 80 1D 00 10 */ lwz r0, 0x10(r29)
/* 802D8FA4 28 00 00 00 */ cmplwi r0, 0
/* 802D8FA8 40 82 00 F0 */ bne lbl_802D9098
/* 802D8FAC 54 60 06 F7 */ rlwinm. r0, r3, 0, 0x1b, 0x1b
/* 802D8FB0 41 82 00 1C */ beq lbl_802D8FCC
/* 802D8FB4 80 7C 00 64 */ lwz r3, 0x64(r28)
/* 802D8FB8 80 1D 00 08 */ lwz r0, 8(r29)
/* 802D8FBC 7C 03 02 14 */ add r0, r3, r0
/* 802D8FC0 90 1D 00 10 */ stw r0, 0x10(r29)
/* 802D8FC4 90 9E 00 00 */ stw r4, 0(r30)
/* 802D8FC8 48 00 00 DC */ b lbl_802D90A4
lbl_802D8FCC:
/* 802D8FCC 54 60 06 B5 */ rlwinm. r0, r3, 0, 0x1a, 0x1a
/* 802D8FD0 41 82 00 60 */ beq lbl_802D9030
/* 802D8FD4 80 7C 00 68 */ lwz r3, 0x68(r28)
/* 802D8FD8 80 A3 00 14 */ lwz r5, 0x14(r3)
/* 802D8FDC 80 7C 00 74 */ lwz r3, 0x74(r28)
/* 802D8FE0 80 1D 00 08 */ lwz r0, 8(r29)
/* 802D8FE4 7C 00 2A 14 */ add r0, r0, r5
/* 802D8FE8 7C 63 00 50 */ subf r3, r3, r0
/* 802D8FEC 80 BC 00 38 */ lwz r5, 0x38(r28)
/* 802D8FF0 7F E6 FB 78 */ mr r6, r31
/* 802D8FF4 38 E1 00 0C */ addi r7, r1, 0xc
/* 802D8FF8 4B FF E9 1D */ bl fetchResource_subroutine__14JKRAramArchiveFUlUlP7JKRHeapiPPUc
/* 802D8FFC 90 7E 00 00 */ stw r3, 0(r30)
/* 802D9000 80 01 00 0C */ lwz r0, 0xc(r1)
/* 802D9004 90 1D 00 10 */ stw r0, 0x10(r29)
/* 802D9008 2C 1F 00 02 */ cmpwi r31, 2
/* 802D900C 40 82 00 98 */ bne lbl_802D90A4
/* 802D9010 7F 83 E3 78 */ mr r3, r28
/* 802D9014 7F A4 EB 78 */ mr r4, r29
/* 802D9018 80 BE 00 00 */ lwz r5, 0(r30)
/* 802D901C 81 9C 00 00 */ lwz r12, 0(r28)
/* 802D9020 81 8C 00 48 */ lwz r12, 0x48(r12)
/* 802D9024 7D 89 03 A6 */ mtctr r12
/* 802D9028 4E 80 04 21 */ bctrl
/* 802D902C 48 00 00 78 */ b lbl_802D90A4
lbl_802D9030:
/* 802D9030 54 60 06 73 */ rlwinm. r0, r3, 0, 0x19, 0x19
/* 802D9034 41 82 00 70 */ beq lbl_802D90A4
/* 802D9038 80 7C 00 40 */ lwz r3, 0x40(r28)
/* 802D903C 80 9C 00 6C */ lwz r4, 0x6c(r28)
/* 802D9040 80 1D 00 08 */ lwz r0, 8(r29)
/* 802D9044 7C 84 02 14 */ add r4, r4, r0
/* 802D9048 80 DC 00 38 */ lwz r6, 0x38(r28)
/* 802D904C 7F E7 FB 78 */ mr r7, r31
/* 802D9050 81 1C 00 5C */ lwz r8, 0x5c(r28)
/* 802D9054 39 21 00 08 */ addi r9, r1, 8
/* 802D9058 4B FF F4 1D */ bl fetchResource_subroutine__13JKRDvdArchiveFlUlUlP7JKRHeapiiPPUc
/* 802D905C 28 1E 00 00 */ cmplwi r30, 0
/* 802D9060 41 82 00 08 */ beq lbl_802D9068
/* 802D9064 90 7E 00 00 */ stw r3, 0(r30)
lbl_802D9068:
/* 802D9068 80 01 00 08 */ lwz r0, 8(r1)
/* 802D906C 90 1D 00 10 */ stw r0, 0x10(r29)
/* 802D9070 2C 1F 00 02 */ cmpwi r31, 2
/* 802D9074 40 82 00 30 */ bne lbl_802D90A4
/* 802D9078 7F 83 E3 78 */ mr r3, r28
/* 802D907C 7F A4 EB 78 */ mr r4, r29
/* 802D9080 80 BE 00 00 */ lwz r5, 0(r30)
/* 802D9084 81 9C 00 00 */ lwz r12, 0(r28)
/* 802D9088 81 8C 00 48 */ lwz r12, 0x48(r12)
/* 802D908C 7D 89 03 A6 */ mtctr r12
/* 802D9090 4E 80 04 21 */ bctrl
/* 802D9094 48 00 00 10 */ b lbl_802D90A4
lbl_802D9098:
/* 802D9098 28 1E 00 00 */ cmplwi r30, 0
/* 802D909C 41 82 00 08 */ beq lbl_802D90A4
/* 802D90A0 90 BE 00 00 */ stw r5, 0(r30)
lbl_802D90A4:
/* 802D90A4 80 7D 00 10 */ lwz r3, 0x10(r29)
/* 802D90A8 39 61 00 30 */ addi r11, r1, 0x30
/* 802D90AC 48 08 91 79 */ bl _restgpr_28
/* 802D90B0 80 01 00 34 */ lwz r0, 0x34(r1)
/* 802D90B4 7C 08 03 A6 */ mtlr r0
/* 802D90B8 38 21 00 30 */ addi r1, r1, 0x30
/* 802D90BC 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRCompArchive/fetchResource__14JKRCompArchiveFPvUlPQ210JKRArchive12SDIFileEntryPUl.s
-116
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@@ -1,116 +0,0 @@
lbl_802D90C0:
/* 802D90C0 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 802D90C4 7C 08 02 A6 */ mflr r0
/* 802D90C8 90 01 00 24 */ stw r0, 0x24(r1)
/* 802D90CC 39 61 00 20 */ addi r11, r1, 0x20
/* 802D90D0 48 08 91 01 */ bl _savegpr_26
/* 802D90D4 7C 69 1B 78 */ mr r9, r3
/* 802D90D8 7C 9C 23 78 */ mr r28, r4
/* 802D90DC 7C BD 2B 78 */ mr r29, r5
/* 802D90E0 7C DE 33 78 */ mr r30, r6
/* 802D90E4 7C FF 3B 78 */ mr r31, r7
/* 802D90E8 3B 60 00 00 */ li r27, 0
/* 802D90EC 83 46 00 0C */ lwz r26, 0xc(r6)
/* 802D90F0 38 1A 00 1F */ addi r0, r26, 0x1f
/* 802D90F4 54 05 00 34 */ rlwinm r5, r0, 0, 0, 0x1a
/* 802D90F8 80 06 00 04 */ lwz r0, 4(r6)
/* 802D90FC 54 03 46 3E */ srwi r3, r0, 0x18
/* 802D9100 54 00 47 7B */ rlwinm. r0, r0, 8, 0x1d, 0x1d
/* 802D9104 40 82 00 0C */ bne lbl_802D9110
/* 802D9108 39 00 00 00 */ li r8, 0
/* 802D910C 48 00 00 18 */ b lbl_802D9124
lbl_802D9110:
/* 802D9110 54 60 06 31 */ rlwinm. r0, r3, 0, 0x18, 0x18
/* 802D9114 41 82 00 0C */ beq lbl_802D9120
/* 802D9118 39 00 00 02 */ li r8, 2
/* 802D911C 48 00 00 08 */ b lbl_802D9124
lbl_802D9120:
/* 802D9120 39 00 00 01 */ li r8, 1
lbl_802D9124:
/* 802D9124 80 1E 00 10 */ lwz r0, 0x10(r30)
/* 802D9128 28 00 00 00 */ cmplwi r0, 0
/* 802D912C 41 82 00 54 */ beq lbl_802D9180
/* 802D9130 2C 08 00 02 */ cmpwi r8, 2
/* 802D9134 40 82 00 28 */ bne lbl_802D915C
/* 802D9138 7D 23 4B 78 */ mr r3, r9
/* 802D913C 7F C4 F3 78 */ mr r4, r30
/* 802D9140 81 89 00 00 */ lwz r12, 0(r9)
/* 802D9144 81 8C 00 4C */ lwz r12, 0x4c(r12)
/* 802D9148 7D 89 03 A6 */ mtctr r12
/* 802D914C 4E 80 04 21 */ bctrl
/* 802D9150 28 03 00 00 */ cmplwi r3, 0
/* 802D9154 41 82 00 08 */ beq lbl_802D915C
/* 802D9158 7C 7A 1B 78 */ mr r26, r3
lbl_802D915C:
/* 802D915C 7C 1A E8 40 */ cmplw r26, r29
/* 802D9160 40 81 00 08 */ ble lbl_802D9168
/* 802D9164 7F BA EB 78 */ mr r26, r29
lbl_802D9168:
/* 802D9168 7F 83 E3 78 */ mr r3, r28
/* 802D916C 80 9E 00 10 */ lwz r4, 0x10(r30)
/* 802D9170 7F 45 D3 78 */ mr r5, r26
/* 802D9174 4B FF 59 A5 */ bl copyMemory__7JKRHeapFPvPvUl
/* 802D9178 7F 5B D3 78 */ mr r27, r26
/* 802D917C 48 00 00 BC */ b lbl_802D9238
lbl_802D9180:
/* 802D9180 54 60 06 F7 */ rlwinm. r0, r3, 0, 0x1b, 0x1b
/* 802D9184 41 82 00 2C */ beq lbl_802D91B0
/* 802D9188 80 69 00 64 */ lwz r3, 0x64(r9)
/* 802D918C 80 1E 00 08 */ lwz r0, 8(r30)
/* 802D9190 7C 63 02 14 */ add r3, r3, r0
/* 802D9194 7C A4 2B 78 */ mr r4, r5
/* 802D9198 7F 85 E3 78 */ mr r5, r28
/* 802D919C 57 A6 00 34 */ rlwinm r6, r29, 0, 0, 0x1a
/* 802D91A0 7D 07 43 78 */ mr r7, r8
/* 802D91A4 4B FF DD B9 */ bl fetchResource_subroutine__13JKRMemArchiveFPUcUlPUcUli
/* 802D91A8 7C 7B 1B 78 */ mr r27, r3
/* 802D91AC 48 00 00 8C */ b lbl_802D9238
lbl_802D91B0:
/* 802D91B0 54 60 06 B5 */ rlwinm. r0, r3, 0, 0x1a, 0x1a
/* 802D91B4 41 82 00 38 */ beq lbl_802D91EC
/* 802D91B8 80 69 00 68 */ lwz r3, 0x68(r9)
/* 802D91BC 80 83 00 14 */ lwz r4, 0x14(r3)
/* 802D91C0 80 69 00 74 */ lwz r3, 0x74(r9)
/* 802D91C4 80 1E 00 08 */ lwz r0, 8(r30)
/* 802D91C8 7C 00 22 14 */ add r0, r0, r4
/* 802D91CC 7C 63 00 50 */ subf r3, r3, r0
/* 802D91D0 7C A4 2B 78 */ mr r4, r5
/* 802D91D4 7F 85 E3 78 */ mr r5, r28
/* 802D91D8 57 A6 00 34 */ rlwinm r6, r29, 0, 0, 0x1a
/* 802D91DC 7D 07 43 78 */ mr r7, r8
/* 802D91E0 4B FF E6 79 */ bl fetchResource_subroutine__14JKRAramArchiveFUlUlPUcUli
/* 802D91E4 7C 7B 1B 78 */ mr r27, r3
/* 802D91E8 48 00 00 50 */ b lbl_802D9238
lbl_802D91EC:
/* 802D91EC 54 60 06 73 */ rlwinm. r0, r3, 0, 0x19, 0x19
/* 802D91F0 41 82 00 2C */ beq lbl_802D921C
/* 802D91F4 80 69 00 40 */ lwz r3, 0x40(r9)
/* 802D91F8 80 89 00 6C */ lwz r4, 0x6c(r9)
/* 802D91FC 80 1E 00 08 */ lwz r0, 8(r30)
/* 802D9200 7C 84 02 14 */ add r4, r4, r0
/* 802D9204 7F 86 E3 78 */ mr r6, r28
/* 802D9208 57 A7 00 34 */ rlwinm r7, r29, 0, 0, 0x1a
/* 802D920C 81 29 00 5C */ lwz r9, 0x5c(r9)
/* 802D9210 4B FF F0 5D */ bl fetchResource_subroutine__13JKRDvdArchiveFlUlUlPUcUlii
/* 802D9214 7C 7B 1B 78 */ mr r27, r3
/* 802D9218 48 00 00 20 */ b lbl_802D9238
lbl_802D921C:
/* 802D921C 3C 60 80 3A */ lis r3, JKRCompArchive__stringBase0@ha /* 0x8039D220@ha */
/* 802D9220 38 63 D2 20 */ addi r3, r3, JKRCompArchive__stringBase0@l /* 0x8039D220@l */
/* 802D9224 38 80 03 08 */ li r4, 0x308
/* 802D9228 38 A3 00 13 */ addi r5, r3, 0x13
/* 802D922C 38 C3 00 16 */ addi r6, r3, 0x16
/* 802D9230 4C C6 31 82 */ crclr 6
/* 802D9234 48 00 8F C9 */ bl panic_f__12JUTExceptionFPCciPCce
lbl_802D9238:
/* 802D9238 28 1F 00 00 */ cmplwi r31, 0
/* 802D923C 41 82 00 08 */ beq lbl_802D9244
/* 802D9240 93 7F 00 00 */ stw r27, 0(r31)
lbl_802D9244:
/* 802D9244 7F 83 E3 78 */ mr r3, r28
/* 802D9248 39 61 00 20 */ addi r11, r1, 0x20
/* 802D924C 48 08 8F D1 */ bl _restgpr_26
/* 802D9250 80 01 00 24 */ lwz r0, 0x24(r1)
/* 802D9254 7C 08 03 A6 */ mtlr r0
/* 802D9258 38 21 00 20 */ addi r1, r1, 0x20
/* 802D925C 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRCompArchive/getExpandedResSize__14JKRCompArchiveCFPCv.s
-119
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@@ -1,119 +0,0 @@
lbl_802D9360:
/* 802D9360 94 21 FF A0 */ stwu r1, -0x60(r1)
/* 802D9364 7C 08 02 A6 */ mflr r0
/* 802D9368 90 01 00 64 */ stw r0, 0x64(r1)
/* 802D936C 39 61 00 60 */ addi r11, r1, 0x60
/* 802D9370 48 08 8E 6D */ bl _savegpr_29
/* 802D9374 7C 7E 1B 78 */ mr r30, r3
/* 802D9378 7C 9D 23 78 */ mr r29, r4
/* 802D937C 80 03 00 50 */ lwz r0, 0x50(r3)
/* 802D9380 28 00 00 00 */ cmplwi r0, 0
/* 802D9384 40 82 00 18 */ bne lbl_802D939C
/* 802D9388 81 83 00 00 */ lwz r12, 0(r3)
/* 802D938C 81 8C 00 30 */ lwz r12, 0x30(r12)
/* 802D9390 7D 89 03 A6 */ mtctr r12
/* 802D9394 4E 80 04 21 */ bctrl
/* 802D9398 48 00 01 68 */ b lbl_802D9500
lbl_802D939C:
/* 802D939C 4B FF D3 99 */ bl findPtrResource__10JKRArchiveCFPCv
/* 802D93A0 7C 7F 1B 79 */ or. r31, r3, r3
/* 802D93A4 40 82 00 0C */ bne lbl_802D93B0
/* 802D93A8 38 60 FF FF */ li r3, -1
/* 802D93AC 48 00 01 54 */ b lbl_802D9500
lbl_802D93B0:
/* 802D93B0 80 1F 00 04 */ lwz r0, 4(r31)
/* 802D93B4 54 03 46 3E */ srwi r3, r0, 0x18
/* 802D93B8 54 00 47 7B */ rlwinm. r0, r0, 8, 0x1d, 0x1d
/* 802D93BC 40 82 00 20 */ bne lbl_802D93DC
/* 802D93C0 7F C3 F3 78 */ mr r3, r30
/* 802D93C4 7F A4 EB 78 */ mr r4, r29
/* 802D93C8 81 9E 00 00 */ lwz r12, 0(r30)
/* 802D93CC 81 8C 00 30 */ lwz r12, 0x30(r12)
/* 802D93D0 7D 89 03 A6 */ mtctr r12
/* 802D93D4 4E 80 04 21 */ bctrl
/* 802D93D8 48 00 01 28 */ b lbl_802D9500
lbl_802D93DC:
/* 802D93DC 54 60 06 F7 */ rlwinm. r0, r3, 0, 0x1b, 0x1b
/* 802D93E0 41 82 00 28 */ beq lbl_802D9408
/* 802D93E4 88 BD 00 07 */ lbz r5, 7(r29)
/* 802D93E8 88 9D 00 06 */ lbz r4, 6(r29)
/* 802D93EC 88 7D 00 04 */ lbz r3, 4(r29)
/* 802D93F0 88 1D 00 05 */ lbz r0, 5(r29)
/* 802D93F4 54 00 80 1E */ slwi r0, r0, 0x10
/* 802D93F8 50 60 C0 0E */ rlwimi r0, r3, 0x18, 0, 7
/* 802D93FC 50 80 44 2E */ rlwimi r0, r4, 8, 0x10, 0x17
/* 802D9400 7C A3 03 78 */ or r3, r5, r0
/* 802D9404 48 00 00 FC */ b lbl_802D9500
lbl_802D9408:
/* 802D9408 38 01 00 2F */ addi r0, r1, 0x2f
/* 802D940C 54 1D 00 34 */ rlwinm r29, r0, 0, 0, 0x1a
/* 802D9410 54 60 06 B5 */ rlwinm. r0, r3, 0, 0x1a, 0x1a
/* 802D9414 41 82 00 44 */ beq lbl_802D9458
/* 802D9418 80 7E 00 68 */ lwz r3, 0x68(r30)
/* 802D941C 80 63 00 14 */ lwz r3, 0x14(r3)
/* 802D9420 80 1F 00 08 */ lwz r0, 8(r31)
/* 802D9424 7C 60 1A 14 */ add r3, r0, r3
/* 802D9428 7F A4 EB 78 */ mr r4, r29
/* 802D942C 38 A0 00 20 */ li r5, 0x20
/* 802D9430 38 C0 00 00 */ li r6, 0
/* 802D9434 38 E0 00 00 */ li r7, 0
/* 802D9438 39 00 00 00 */ li r8, 0
/* 802D943C 39 20 FF FF */ li r9, -1
/* 802D9440 39 40 00 00 */ li r10, 0
/* 802D9444 4B FF 91 71 */ bl aramToMainRam__7JKRAramFUlPUcUl15JKRExpandSwitchUlP7JKRHeapiPUl
/* 802D9448 7F A3 EB 78 */ mr r3, r29
/* 802D944C 38 80 00 20 */ li r4, 0x20
/* 802D9450 48 06 21 31 */ bl DCInvalidateRange
/* 802D9454 48 00 00 6C */ b lbl_802D94C0
lbl_802D9458:
/* 802D9458 54 60 06 73 */ rlwinm. r0, r3, 0, 0x19, 0x19
/* 802D945C 41 82 00 48 */ beq lbl_802D94A4
/* 802D9460 38 00 00 00 */ li r0, 0
/* 802D9464 90 01 00 08 */ stw r0, 8(r1)
/* 802D9468 80 7E 00 40 */ lwz r3, 0x40(r30)
/* 802D946C 7F A4 EB 78 */ mr r4, r29
/* 802D9470 38 A0 00 02 */ li r5, 2
/* 802D9474 38 C0 00 20 */ li r6, 0x20
/* 802D9478 38 E0 00 00 */ li r7, 0
/* 802D947C 39 00 00 01 */ li r8, 1
/* 802D9480 81 3E 00 6C */ lwz r9, 0x6c(r30)
/* 802D9484 80 1F 00 08 */ lwz r0, 8(r31)
/* 802D9488 7D 29 02 14 */ add r9, r9, r0
/* 802D948C 39 40 00 00 */ li r10, 0
/* 802D9490 48 00 07 C5 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D9494 7F A3 EB 78 */ mr r3, r29
/* 802D9498 38 80 00 20 */ li r4, 0x20
/* 802D949C 48 06 20 E5 */ bl DCInvalidateRange
/* 802D94A0 48 00 00 20 */ b lbl_802D94C0
lbl_802D94A4:
/* 802D94A4 3C 60 80 3A */ lis r3, JKRCompArchive__stringBase0@ha /* 0x8039D220@ha */
/* 802D94A8 38 63 D2 20 */ addi r3, r3, JKRCompArchive__stringBase0@l /* 0x8039D220@l */
/* 802D94AC 38 80 03 AF */ li r4, 0x3af
/* 802D94B0 38 A3 00 13 */ addi r5, r3, 0x13
/* 802D94B4 38 C3 00 27 */ addi r6, r3, 0x27
/* 802D94B8 4C C6 31 82 */ crclr 6
/* 802D94BC 48 00 8D 41 */ bl panic_f__12JUTExceptionFPCciPCce
lbl_802D94C0:
/* 802D94C0 88 BD 00 07 */ lbz r5, 7(r29)
/* 802D94C4 88 9D 00 06 */ lbz r4, 6(r29)
/* 802D94C8 88 7D 00 04 */ lbz r3, 4(r29)
/* 802D94CC 88 1D 00 05 */ lbz r0, 5(r29)
/* 802D94D0 54 00 80 1E */ slwi r0, r0, 0x10
/* 802D94D4 50 60 C0 0E */ rlwimi r0, r3, 0x18, 0, 7
/* 802D94D8 50 80 44 2E */ rlwimi r0, r4, 8, 0x10, 0x17
/* 802D94DC 7C BD 03 78 */ or r29, r5, r0
/* 802D94E0 7F C3 F3 78 */ mr r3, r30
/* 802D94E4 7F E4 FB 78 */ mr r4, r31
/* 802D94E8 7F A5 EB 78 */ mr r5, r29
/* 802D94EC 81 9E 00 00 */ lwz r12, 0(r30)
/* 802D94F0 81 8C 00 48 */ lwz r12, 0x48(r12)
/* 802D94F4 7D 89 03 A6 */ mtctr r12
/* 802D94F8 4E 80 04 21 */ bctrl
/* 802D94FC 7F A3 EB 78 */ mr r3, r29
lbl_802D9500:
/* 802D9500 39 61 00 60 */ addi r11, r1, 0x60
/* 802D9504 48 08 8D 25 */ bl _restgpr_29
/* 802D9508 80 01 00 64 */ lwz r0, 0x64(r1)
/* 802D950C 7C 08 03 A6 */ mtlr r0
/* 802D9510 38 21 00 60 */ addi r1, r1, 0x60
/* 802D9514 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRCompArchive/open__14JKRCompArchiveFl.s
-380
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@@ -1,380 +0,0 @@
lbl_802D89BC:
/* 802D89BC 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 802D89C0 7C 08 02 A6 */ mflr r0
/* 802D89C4 90 01 00 34 */ stw r0, 0x34(r1)
/* 802D89C8 39 61 00 30 */ addi r11, r1, 0x30
/* 802D89CC 48 08 98 01 */ bl _savegpr_25
/* 802D89D0 7C 7F 1B 78 */ mr r31, r3
/* 802D89D4 7C 9A 23 78 */ mr r26, r4
/* 802D89D8 38 00 00 00 */ li r0, 0
/* 802D89DC 90 03 00 44 */ stw r0, 0x44(r3)
/* 802D89E0 90 03 00 64 */ stw r0, 0x64(r3)
/* 802D89E4 90 03 00 68 */ stw r0, 0x68(r3)
/* 802D89E8 90 03 00 6C */ stw r0, 0x6c(r3)
/* 802D89EC 90 03 00 74 */ stw r0, 0x74(r3)
/* 802D89F0 90 03 00 78 */ stw r0, 0x78(r3)
/* 802D89F4 90 03 00 7C */ stw r0, 0x7c(r3)
/* 802D89F8 90 03 00 48 */ stw r0, 0x48(r3)
/* 802D89FC 90 03 00 4C */ stw r0, 0x4c(r3)
/* 802D8A00 90 03 00 54 */ stw r0, 0x54(r3)
/* 802D8A04 38 60 00 F8 */ li r3, 0xf8
/* 802D8A08 80 8D 8D F0 */ lwz r4, sSystemHeap__7JKRHeap(r13)
/* 802D8A0C 38 A0 00 00 */ li r5, 0
/* 802D8A10 4B FF 62 89 */ bl __nw__FUlP7JKRHeapi
/* 802D8A14 7C 60 1B 79 */ or. r0, r3, r3
/* 802D8A18 41 82 00 10 */ beq lbl_802D8A28
/* 802D8A1C 7F 44 D3 78 */ mr r4, r26
/* 802D8A20 48 00 0C 81 */ bl __ct__10JKRDvdFileFl
/* 802D8A24 7C 60 1B 78 */ mr r0, r3
lbl_802D8A28:
/* 802D8A28 90 1F 00 70 */ stw r0, 0x70(r31)
/* 802D8A2C 80 1F 00 70 */ lwz r0, 0x70(r31)
/* 802D8A30 28 00 00 00 */ cmplwi r0, 0
/* 802D8A34 40 82 00 14 */ bne lbl_802D8A48
/* 802D8A38 38 00 00 00 */ li r0, 0
/* 802D8A3C 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8A40 38 60 00 00 */ li r3, 0
/* 802D8A44 48 00 04 E4 */ b lbl_802D8F28
lbl_802D8A48:
/* 802D8A48 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap(r13)
/* 802D8A4C 38 80 00 20 */ li r4, 0x20
/* 802D8A50 38 A0 FF E0 */ li r5, -32
/* 802D8A54 4B FF 5A 81 */ bl alloc__7JKRHeapFUli
/* 802D8A58 7C 7E 1B 79 */ or. r30, r3, r3
/* 802D8A5C 40 82 00 10 */ bne lbl_802D8A6C
/* 802D8A60 38 00 00 00 */ li r0, 0
/* 802D8A64 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8A68 48 00 04 70 */ b lbl_802D8ED8
lbl_802D8A6C:
/* 802D8A6C 38 00 00 00 */ li r0, 0
/* 802D8A70 90 01 00 08 */ stw r0, 8(r1)
/* 802D8A74 7F 43 D3 78 */ mr r3, r26
/* 802D8A78 7F C4 F3 78 */ mr r4, r30
/* 802D8A7C 38 A0 00 01 */ li r5, 1
/* 802D8A80 38 C0 00 20 */ li r6, 0x20
/* 802D8A84 38 E0 00 00 */ li r7, 0
/* 802D8A88 39 00 00 01 */ li r8, 1
/* 802D8A8C 39 20 00 00 */ li r9, 0
/* 802D8A90 39 5F 00 5C */ addi r10, r31, 0x5c
/* 802D8A94 48 00 11 C1 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D8A98 7F C3 F3 78 */ mr r3, r30
/* 802D8A9C 38 80 00 20 */ li r4, 0x20
/* 802D8AA0 48 06 2A E1 */ bl DCInvalidateRange
/* 802D8AA4 80 1E 00 14 */ lwz r0, 0x14(r30)
/* 802D8AA8 90 1F 00 74 */ stw r0, 0x74(r31)
/* 802D8AAC 80 1E 00 18 */ lwz r0, 0x18(r30)
/* 802D8AB0 90 1F 00 78 */ stw r0, 0x78(r31)
/* 802D8AB4 80 1F 00 5C */ lwz r0, 0x5c(r31)
/* 802D8AB8 2C 00 00 01 */ cmpwi r0, 1
/* 802D8ABC 41 82 01 60 */ beq lbl_802D8C1C
/* 802D8AC0 40 80 00 10 */ bge lbl_802D8AD0
/* 802D8AC4 2C 00 00 00 */ cmpwi r0, 0
/* 802D8AC8 40 80 00 10 */ bge lbl_802D8AD8
/* 802D8ACC 48 00 03 58 */ b lbl_802D8E24
lbl_802D8AD0:
/* 802D8AD0 2C 00 00 03 */ cmpwi r0, 3
/* 802D8AD4 40 80 03 50 */ bge lbl_802D8E24
lbl_802D8AD8:
/* 802D8AD8 80 1F 00 60 */ lwz r0, 0x60(r31)
/* 802D8ADC 2C 00 00 01 */ cmpwi r0, 1
/* 802D8AE0 38 80 FF E0 */ li r4, -32
/* 802D8AE4 40 82 00 08 */ bne lbl_802D8AEC
/* 802D8AE8 38 80 00 20 */ li r4, 0x20
lbl_802D8AEC:
/* 802D8AEC 7C 9D 23 78 */ mr r29, r4
/* 802D8AF0 80 7E 00 0C */ lwz r3, 0xc(r30)
/* 802D8AF4 80 1F 00 74 */ lwz r0, 0x74(r31)
/* 802D8AF8 7C 63 02 14 */ add r3, r3, r0
/* 802D8AFC 80 BF 00 38 */ lwz r5, 0x38(r31)
/* 802D8B00 4B FF 59 75 */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D8B04 90 7F 00 44 */ stw r3, 0x44(r31)
/* 802D8B08 80 9F 00 44 */ lwz r4, 0x44(r31)
/* 802D8B0C 28 04 00 00 */ cmplwi r4, 0
/* 802D8B10 40 82 00 10 */ bne lbl_802D8B20
/* 802D8B14 38 00 00 00 */ li r0, 0
/* 802D8B18 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8B1C 48 00 03 08 */ b lbl_802D8E24
lbl_802D8B20:
/* 802D8B20 38 00 00 00 */ li r0, 0
/* 802D8B24 90 01 00 08 */ stw r0, 8(r1)
/* 802D8B28 7F 43 D3 78 */ mr r3, r26
/* 802D8B2C 38 A0 00 01 */ li r5, 1
/* 802D8B30 80 DE 00 0C */ lwz r6, 0xc(r30)
/* 802D8B34 80 1F 00 74 */ lwz r0, 0x74(r31)
/* 802D8B38 7C C6 02 14 */ add r6, r6, r0
/* 802D8B3C 38 E0 00 00 */ li r7, 0
/* 802D8B40 39 00 00 01 */ li r8, 1
/* 802D8B44 39 20 00 20 */ li r9, 0x20
/* 802D8B48 39 40 00 00 */ li r10, 0
/* 802D8B4C 48 00 11 09 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D8B50 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8B54 80 9E 00 0C */ lwz r4, 0xc(r30)
/* 802D8B58 80 1F 00 74 */ lwz r0, 0x74(r31)
/* 802D8B5C 7C 84 02 14 */ add r4, r4, r0
/* 802D8B60 48 06 2A 21 */ bl DCInvalidateRange
/* 802D8B64 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8B68 80 1E 00 0C */ lwz r0, 0xc(r30)
/* 802D8B6C 7C 03 02 14 */ add r0, r3, r0
/* 802D8B70 90 1F 00 64 */ stw r0, 0x64(r31)
/* 802D8B74 80 9F 00 78 */ lwz r4, 0x78(r31)
/* 802D8B78 28 04 00 00 */ cmplwi r4, 0
/* 802D8B7C 41 82 00 5C */ beq lbl_802D8BD8
/* 802D8B80 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram(r13)
/* 802D8B84 80 63 00 94 */ lwz r3, 0x94(r3)
/* 802D8B88 38 A0 00 00 */ li r5, 0
/* 802D8B8C 4B FF A4 31 */ bl alloc__11JKRAramHeapFUlQ211JKRAramHeap10EAllocMode
/* 802D8B90 90 7F 00 68 */ stw r3, 0x68(r31)
/* 802D8B94 80 7F 00 68 */ lwz r3, 0x68(r31)
/* 802D8B98 28 03 00 00 */ cmplwi r3, 0
/* 802D8B9C 40 82 00 10 */ bne lbl_802D8BAC
/* 802D8BA0 38 00 00 00 */ li r0, 0
/* 802D8BA4 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8BA8 48 00 02 7C */ b lbl_802D8E24
lbl_802D8BAC:
/* 802D8BAC 80 83 00 14 */ lwz r4, 0x14(r3)
/* 802D8BB0 7F 43 D3 78 */ mr r3, r26
/* 802D8BB4 38 A0 00 01 */ li r5, 1
/* 802D8BB8 80 DF 00 74 */ lwz r6, 0x74(r31)
/* 802D8BBC 80 FE 00 08 */ lwz r7, 8(r30)
/* 802D8BC0 80 1E 00 0C */ lwz r0, 0xc(r30)
/* 802D8BC4 7C C0 32 14 */ add r6, r0, r6
/* 802D8BC8 7C C7 32 14 */ add r6, r7, r6
/* 802D8BCC 38 E0 00 00 */ li r7, 0
/* 802D8BD0 39 00 00 00 */ li r8, 0
/* 802D8BD4 48 00 1C A1 */ bl loadToAram__16JKRDvdAramRipperFlUl15JKRExpandSwitchUlUlPUl
lbl_802D8BD8:
/* 802D8BD8 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8BDC 80 03 00 04 */ lwz r0, 4(r3)
/* 802D8BE0 7C 03 02 14 */ add r0, r3, r0
/* 802D8BE4 90 1F 00 48 */ stw r0, 0x48(r31)
/* 802D8BE8 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8BEC 80 03 00 0C */ lwz r0, 0xc(r3)
/* 802D8BF0 7C 03 02 14 */ add r0, r3, r0
/* 802D8BF4 90 1F 00 4C */ stw r0, 0x4c(r31)
/* 802D8BF8 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8BFC 80 03 00 14 */ lwz r0, 0x14(r3)
/* 802D8C00 7C 03 02 14 */ add r0, r3, r0
/* 802D8C04 90 1F 00 54 */ stw r0, 0x54(r31)
/* 802D8C08 80 7E 00 08 */ lwz r3, 8(r30)
/* 802D8C0C 80 1E 00 0C */ lwz r0, 0xc(r30)
/* 802D8C10 7C 03 02 14 */ add r0, r3, r0
/* 802D8C14 90 1F 00 6C */ stw r0, 0x6c(r31)
/* 802D8C18 48 00 02 0C */ b lbl_802D8E24
lbl_802D8C1C:
/* 802D8C1C 80 7F 00 70 */ lwz r3, 0x70(r31)
/* 802D8C20 81 83 00 00 */ lwz r12, 0(r3)
/* 802D8C24 81 8C 00 1C */ lwz r12, 0x1c(r12)
/* 802D8C28 7D 89 03 A6 */ mtctr r12
/* 802D8C2C 4E 80 04 21 */ bctrl
/* 802D8C30 38 03 00 1F */ addi r0, r3, 0x1f
/* 802D8C34 54 19 00 34 */ rlwinm r25, r0, 0, 0, 0x1a
/* 802D8C38 80 1F 00 60 */ lwz r0, 0x60(r31)
/* 802D8C3C 2C 00 00 01 */ cmpwi r0, 1
/* 802D8C40 3B A0 FF E0 */ li r29, -32
/* 802D8C44 40 82 00 08 */ bne lbl_802D8C4C
/* 802D8C48 3B A0 00 20 */ li r29, 0x20
lbl_802D8C4C:
/* 802D8C4C 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap(r13)
/* 802D8C50 7F 24 CB 78 */ mr r4, r25
/* 802D8C54 7F 9D 00 D0 */ neg r28, r29
/* 802D8C58 7F 85 E3 78 */ mr r5, r28
/* 802D8C5C 4B FF 58 79 */ bl alloc__7JKRHeapFUli
/* 802D8C60 7C 7B 1B 79 */ or. r27, r3, r3
/* 802D8C64 40 82 00 10 */ bne lbl_802D8C74
/* 802D8C68 38 00 00 00 */ li r0, 0
/* 802D8C6C 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8C70 48 00 01 74 */ b lbl_802D8DE4
lbl_802D8C74:
/* 802D8C74 38 00 00 00 */ li r0, 0
/* 802D8C78 90 01 00 08 */ stw r0, 8(r1)
/* 802D8C7C 7F 43 D3 78 */ mr r3, r26
/* 802D8C80 7F 64 DB 78 */ mr r4, r27
/* 802D8C84 38 A0 00 02 */ li r5, 2
/* 802D8C88 7F 26 CB 78 */ mr r6, r25
/* 802D8C8C 38 E0 00 00 */ li r7, 0
/* 802D8C90 39 00 00 01 */ li r8, 1
/* 802D8C94 39 20 00 00 */ li r9, 0
/* 802D8C98 39 40 00 00 */ li r10, 0
/* 802D8C9C 48 00 0F B9 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D8CA0 7F 63 DB 78 */ mr r3, r27
/* 802D8CA4 7F 24 CB 78 */ mr r4, r25
/* 802D8CA8 48 06 28 D9 */ bl DCInvalidateRange
/* 802D8CAC 88 BB 00 07 */ lbz r5, 7(r27)
/* 802D8CB0 88 9B 00 06 */ lbz r4, 6(r27)
/* 802D8CB4 88 7B 00 04 */ lbz r3, 4(r27)
/* 802D8CB8 88 1B 00 05 */ lbz r0, 5(r27)
/* 802D8CBC 54 00 80 1E */ slwi r0, r0, 0x10
/* 802D8CC0 50 60 C0 0E */ rlwimi r0, r3, 0x18, 0, 7
/* 802D8CC4 50 80 44 2E */ rlwimi r0, r4, 8, 0x10, 0x17
/* 802D8CC8 7C A3 03 78 */ or r3, r5, r0
/* 802D8CCC 38 03 00 1F */ addi r0, r3, 0x1f
/* 802D8CD0 54 19 00 34 */ rlwinm r25, r0, 0, 0, 0x1a
/* 802D8CD4 7F 23 CB 78 */ mr r3, r25
/* 802D8CD8 7F 84 E3 78 */ mr r4, r28
/* 802D8CDC 80 BF 00 38 */ lwz r5, 0x38(r31)
/* 802D8CE0 4B FF 57 95 */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D8CE4 7C 7C 1B 79 */ or. r28, r3, r3
/* 802D8CE8 40 82 00 10 */ bne lbl_802D8CF8
/* 802D8CEC 38 00 00 00 */ li r0, 0
/* 802D8CF0 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8CF4 48 00 00 F0 */ b lbl_802D8DE4
lbl_802D8CF8:
/* 802D8CF8 7F 9E E3 78 */ mr r30, r28
/* 802D8CFC 7F 63 DB 78 */ mr r3, r27
/* 802D8D00 7F 84 E3 78 */ mr r4, r28
/* 802D8D04 7F 25 CB 78 */ mr r5, r25
/* 802D8D08 38 C0 00 00 */ li r6, 0
/* 802D8D0C 48 00 2C 7D */ bl orderSync__9JKRDecompFPUcPUcUlUl
/* 802D8D10 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap(r13)
/* 802D8D14 7F 64 DB 78 */ mr r4, r27
/* 802D8D18 4B FF 58 31 */ bl free__7JKRHeapFPv
/* 802D8D1C 80 7E 00 0C */ lwz r3, 0xc(r30)
/* 802D8D20 80 1F 00 74 */ lwz r0, 0x74(r31)
/* 802D8D24 7C 63 02 14 */ add r3, r3, r0
/* 802D8D28 7F A4 EB 78 */ mr r4, r29
/* 802D8D2C 80 BF 00 38 */ lwz r5, 0x38(r31)
/* 802D8D30 4B FF 57 45 */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D8D34 90 7F 00 44 */ stw r3, 0x44(r31)
/* 802D8D38 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8D3C 28 03 00 00 */ cmplwi r3, 0
/* 802D8D40 40 82 00 10 */ bne lbl_802D8D50
/* 802D8D44 38 00 00 00 */ li r0, 0
/* 802D8D48 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8D4C 48 00 00 98 */ b lbl_802D8DE4
lbl_802D8D50:
/* 802D8D50 38 9E 00 20 */ addi r4, r30, 0x20
/* 802D8D54 80 BE 00 0C */ lwz r5, 0xc(r30)
/* 802D8D58 80 1F 00 74 */ lwz r0, 0x74(r31)
/* 802D8D5C 7C A5 02 14 */ add r5, r5, r0
/* 802D8D60 4B FF 5D B9 */ bl copyMemory__7JKRHeapFPvPvUl
/* 802D8D64 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8D68 80 1E 00 0C */ lwz r0, 0xc(r30)
/* 802D8D6C 7C 03 02 14 */ add r0, r3, r0
/* 802D8D70 90 1F 00 64 */ stw r0, 0x64(r31)
/* 802D8D74 80 9F 00 78 */ lwz r4, 0x78(r31)
/* 802D8D78 28 04 00 00 */ cmplwi r4, 0
/* 802D8D7C 41 82 00 68 */ beq lbl_802D8DE4
/* 802D8D80 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram(r13)
/* 802D8D84 80 63 00 94 */ lwz r3, 0x94(r3)
/* 802D8D88 38 A0 00 00 */ li r5, 0
/* 802D8D8C 4B FF A2 31 */ bl alloc__11JKRAramHeapFUlQ211JKRAramHeap10EAllocMode
/* 802D8D90 90 7F 00 68 */ stw r3, 0x68(r31)
/* 802D8D94 80 7F 00 68 */ lwz r3, 0x68(r31)
/* 802D8D98 28 03 00 00 */ cmplwi r3, 0
/* 802D8D9C 40 82 00 10 */ bne lbl_802D8DAC
/* 802D8DA0 38 00 00 00 */ li r0, 0
/* 802D8DA4 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8DA8 48 00 00 3C */ b lbl_802D8DE4
lbl_802D8DAC:
/* 802D8DAC 80 83 00 14 */ lwz r4, 0x14(r3)
/* 802D8DB0 80 7E 00 08 */ lwz r3, 8(r30)
/* 802D8DB4 80 1E 00 0C */ lwz r0, 0xc(r30)
/* 802D8DB8 7C 63 02 14 */ add r3, r3, r0
/* 802D8DBC 80 1F 00 74 */ lwz r0, 0x74(r31)
/* 802D8DC0 7C 63 02 14 */ add r3, r3, r0
/* 802D8DC4 7C 7C 1A 14 */ add r3, r28, r3
/* 802D8DC8 80 BF 00 78 */ lwz r5, 0x78(r31)
/* 802D8DCC 38 C0 00 00 */ li r6, 0
/* 802D8DD0 38 E0 00 00 */ li r7, 0
/* 802D8DD4 39 00 00 00 */ li r8, 0
/* 802D8DD8 39 20 FF FF */ li r9, -1
/* 802D8DDC 39 40 00 00 */ li r10, 0
/* 802D8DE0 4B FF 95 5D */ bl mainRamToAram__7JKRAramFPUcUlUl15JKRExpandSwitchUlP7JKRHeapiPUl
lbl_802D8DE4:
/* 802D8DE4 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8DE8 80 03 00 04 */ lwz r0, 4(r3)
/* 802D8DEC 7C 03 02 14 */ add r0, r3, r0
/* 802D8DF0 90 1F 00 48 */ stw r0, 0x48(r31)
/* 802D8DF4 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8DF8 80 03 00 0C */ lwz r0, 0xc(r3)
/* 802D8DFC 7C 03 02 14 */ add r0, r3, r0
/* 802D8E00 90 1F 00 4C */ stw r0, 0x4c(r31)
/* 802D8E04 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8E08 80 03 00 14 */ lwz r0, 0x14(r3)
/* 802D8E0C 7C 03 02 14 */ add r0, r3, r0
/* 802D8E10 90 1F 00 54 */ stw r0, 0x54(r31)
/* 802D8E14 80 7E 00 08 */ lwz r3, 8(r30)
/* 802D8E18 80 1E 00 0C */ lwz r0, 0xc(r30)
/* 802D8E1C 7C 03 02 14 */ add r0, r3, r0
/* 802D8E20 90 1F 00 6C */ stw r0, 0x6c(r31)
lbl_802D8E24:
/* 802D8E24 38 00 00 00 */ li r0, 0
/* 802D8E28 90 1F 00 50 */ stw r0, 0x50(r31)
/* 802D8E2C 38 80 00 00 */ li r4, 0
/* 802D8E30 80 BF 00 4C */ lwz r5, 0x4c(r31)
/* 802D8E34 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8E38 80 03 00 08 */ lwz r0, 8(r3)
/* 802D8E3C 7C 09 03 A6 */ mtctr r0
/* 802D8E40 28 00 00 00 */ cmplwi r0, 0
/* 802D8E44 40 81 00 30 */ ble lbl_802D8E74
lbl_802D8E48:
/* 802D8E48 80 05 00 04 */ lwz r0, 4(r5)
/* 802D8E4C 54 03 46 3E */ srwi r3, r0, 0x18
/* 802D8E50 54 00 47 FF */ rlwinm. r0, r0, 8, 0x1f, 0x1f
/* 802D8E54 41 82 00 18 */ beq lbl_802D8E6C
/* 802D8E58 54 60 06 F7 */ rlwinm. r0, r3, 0, 0x1b, 0x1b
/* 802D8E5C 40 82 00 10 */ bne lbl_802D8E6C
/* 802D8E60 54 60 07 7A */ rlwinm r0, r3, 0, 0x1d, 0x1d
/* 802D8E64 7C 80 03 78 */ or r0, r4, r0
/* 802D8E68 54 04 06 3E */ clrlwi r4, r0, 0x18
lbl_802D8E6C:
/* 802D8E6C 38 A5 00 14 */ addi r5, r5, 0x14
/* 802D8E70 42 00 FF D8 */ bdnz lbl_802D8E48
lbl_802D8E74:
/* 802D8E74 54 80 06 3F */ clrlwi. r0, r4, 0x18
/* 802D8E78 41 82 00 60 */ beq lbl_802D8ED8
/* 802D8E7C 7F A3 EB 78 */ mr r3, r29
/* 802D8E80 48 08 C2 51 */ bl abs
/* 802D8E84 7C 64 1B 78 */ mr r4, r3
/* 802D8E88 80 BF 00 38 */ lwz r5, 0x38(r31)
/* 802D8E8C 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D8E90 80 03 00 08 */ lwz r0, 8(r3)
/* 802D8E94 54 03 10 3A */ slwi r3, r0, 2
/* 802D8E98 4B FF 55 DD */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 802D8E9C 90 7F 00 50 */ stw r3, 0x50(r31)
/* 802D8EA0 80 7F 00 50 */ lwz r3, 0x50(r31)
/* 802D8EA4 28 03 00 00 */ cmplwi r3, 0
/* 802D8EA8 40 82 00 1C */ bne lbl_802D8EC4
/* 802D8EAC 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap(r13)
/* 802D8EB0 80 9F 00 44 */ lwz r4, 0x44(r31)
/* 802D8EB4 4B FF 56 95 */ bl free__7JKRHeapFPv
/* 802D8EB8 38 00 00 00 */ li r0, 0
/* 802D8EBC 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D8EC0 48 00 00 18 */ b lbl_802D8ED8
lbl_802D8EC4:
/* 802D8EC4 38 80 00 00 */ li r4, 0
/* 802D8EC8 80 BF 00 44 */ lwz r5, 0x44(r31)
/* 802D8ECC 80 05 00 08 */ lwz r0, 8(r5)
/* 802D8ED0 54 05 10 3A */ slwi r5, r0, 2
/* 802D8ED4 4B D2 A5 85 */ bl memset
lbl_802D8ED8:
/* 802D8ED8 28 1E 00 00 */ cmplwi r30, 0
/* 802D8EDC 41 82 00 10 */ beq lbl_802D8EEC
/* 802D8EE0 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap(r13)
/* 802D8EE4 7F C4 F3 78 */ mr r4, r30
/* 802D8EE8 4B FF 56 61 */ bl free__7JKRHeapFPv
lbl_802D8EEC:
/* 802D8EEC 88 1F 00 3C */ lbz r0, 0x3c(r31)
/* 802D8EF0 28 00 00 00 */ cmplwi r0, 0
/* 802D8EF4 40 82 00 30 */ bne lbl_802D8F24
/* 802D8EF8 80 7F 00 70 */ lwz r3, 0x70(r31)
/* 802D8EFC 28 03 00 00 */ cmplwi r3, 0
/* 802D8F00 41 82 00 1C */ beq lbl_802D8F1C
/* 802D8F04 41 82 00 18 */ beq lbl_802D8F1C
/* 802D8F08 38 80 00 01 */ li r4, 1
/* 802D8F0C 81 83 00 00 */ lwz r12, 0(r3)
/* 802D8F10 81 8C 00 08 */ lwz r12, 8(r12)
/* 802D8F14 7D 89 03 A6 */ mtctr r12
/* 802D8F18 4E 80 04 21 */ bctrl
lbl_802D8F1C:
/* 802D8F1C 38 60 00 00 */ li r3, 0
/* 802D8F20 48 00 00 08 */ b lbl_802D8F28
lbl_802D8F24:
/* 802D8F24 38 60 00 01 */ li r3, 1
lbl_802D8F28:
/* 802D8F28 39 61 00 30 */ addi r11, r1, 0x30
/* 802D8F2C 48 08 92 ED */ bl _restgpr_25
/* 802D8F30 80 01 00 34 */ lwz r0, 0x34(r1)
/* 802D8F34 7C 08 03 A6 */ mtlr r0
/* 802D8F38 38 21 00 30 */ addi r1, r1, 0x30
/* 802D8F3C 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRMemArchive/open__13JKRMemArchiveFPvUl15JKRMemBreakFlag.s
-44
View File
@@ -1,44 +0,0 @@
lbl_802D6D30:
/* 802D6D30 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 802D6D34 7C 08 02 A6 */ mflr r0
/* 802D6D38 90 01 00 14 */ stw r0, 0x14(r1)
/* 802D6D3C 93 E1 00 0C */ stw r31, 0xc(r1)
/* 802D6D40 7C 7F 1B 78 */ mr r31, r3
/* 802D6D44 90 83 00 64 */ stw r4, 0x64(r3)
/* 802D6D48 80 63 00 64 */ lwz r3, 0x64(r3)
/* 802D6D4C 80 03 00 08 */ lwz r0, 8(r3)
/* 802D6D50 7C 03 02 14 */ add r0, r3, r0
/* 802D6D54 90 1F 00 44 */ stw r0, 0x44(r31)
/* 802D6D58 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D6D5C 80 03 00 04 */ lwz r0, 4(r3)
/* 802D6D60 7C 03 02 14 */ add r0, r3, r0
/* 802D6D64 90 1F 00 48 */ stw r0, 0x48(r31)
/* 802D6D68 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D6D6C 80 03 00 0C */ lwz r0, 0xc(r3)
/* 802D6D70 7C 03 02 14 */ add r0, r3, r0
/* 802D6D74 90 1F 00 4C */ stw r0, 0x4c(r31)
/* 802D6D78 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D6D7C 80 03 00 14 */ lwz r0, 0x14(r3)
/* 802D6D80 7C 03 02 14 */ add r0, r3, r0
/* 802D6D84 90 1F 00 54 */ stw r0, 0x54(r31)
/* 802D6D88 80 BF 00 64 */ lwz r5, 0x64(r31)
/* 802D6D8C 80 65 00 0C */ lwz r3, 0xc(r5)
/* 802D6D90 80 05 00 08 */ lwz r0, 8(r5)
/* 802D6D94 7C 00 1A 14 */ add r0, r0, r3
/* 802D6D98 7C 05 02 14 */ add r0, r5, r0
/* 802D6D9C 90 1F 00 68 */ stw r0, 0x68(r31)
/* 802D6DA0 20 06 00 01 */ subfic r0, r6, 1
/* 802D6DA4 7C 00 00 34 */ cntlzw r0, r0
/* 802D6DA8 54 00 D9 7E */ srwi r0, r0, 5
/* 802D6DAC 98 1F 00 6C */ stb r0, 0x6c(r31)
/* 802D6DB0 7C 83 23 78 */ mr r3, r4
/* 802D6DB4 4B FF 7A 89 */ bl findFromRoot__7JKRHeapFPv
/* 802D6DB8 90 7F 00 38 */ stw r3, 0x38(r31)
/* 802D6DBC 38 00 00 00 */ li r0, 0
/* 802D6DC0 90 1F 00 5C */ stw r0, 0x5c(r31)
/* 802D6DC4 38 60 00 01 */ li r3, 1
/* 802D6DC8 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 802D6DCC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 802D6DD0 7C 08 03 A6 */ mtlr r0
/* 802D6DD4 38 21 00 10 */ addi r1, r1, 0x10
/* 802D6DD8 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRMemArchive/open__13JKRMemArchiveFlQ210JKRArchive15EMountDirection.s
-94
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@@ -1,94 +0,0 @@
lbl_802D6BCC:
/* 802D6BCC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 802D6BD0 7C 08 02 A6 */ mflr r0
/* 802D6BD4 90 01 00 24 */ stw r0, 0x24(r1)
/* 802D6BD8 93 E1 00 1C */ stw r31, 0x1c(r1)
/* 802D6BDC 7C 7F 1B 78 */ mr r31, r3
/* 802D6BE0 38 00 00 00 */ li r0, 0
/* 802D6BE4 90 03 00 64 */ stw r0, 0x64(r3)
/* 802D6BE8 90 03 00 44 */ stw r0, 0x44(r3)
/* 802D6BEC 90 03 00 68 */ stw r0, 0x68(r3)
/* 802D6BF0 90 03 00 48 */ stw r0, 0x48(r3)
/* 802D6BF4 90 03 00 4C */ stw r0, 0x4c(r3)
/* 802D6BF8 90 03 00 54 */ stw r0, 0x54(r3)
/* 802D6BFC 98 03 00 6C */ stb r0, 0x6c(r3)
/* 802D6C00 90 A3 00 60 */ stw r5, 0x60(r3)
/* 802D6C04 80 03 00 60 */ lwz r0, 0x60(r3)
/* 802D6C08 2C 00 00 01 */ cmpwi r0, 1
/* 802D6C0C 40 82 00 4C */ bne lbl_802D6C58
/* 802D6C10 38 01 00 14 */ addi r0, r1, 0x14
/* 802D6C14 90 01 00 08 */ stw r0, 8(r1)
/* 802D6C18 7C 83 23 78 */ mr r3, r4
/* 802D6C1C 38 80 00 00 */ li r4, 0
/* 802D6C20 38 A0 00 01 */ li r5, 1
/* 802D6C24 38 C0 00 00 */ li r6, 0
/* 802D6C28 80 FF 00 38 */ lwz r7, 0x38(r31)
/* 802D6C2C 39 00 00 01 */ li r8, 1
/* 802D6C30 39 20 00 00 */ li r9, 0
/* 802D6C34 39 5F 00 5C */ addi r10, r31, 0x5c
/* 802D6C38 48 00 30 1D */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D6C3C 90 7F 00 64 */ stw r3, 0x64(r31)
/* 802D6C40 80 7F 00 64 */ lwz r3, 0x64(r31)
/* 802D6C44 28 03 00 00 */ cmplwi r3, 0
/* 802D6C48 41 82 00 54 */ beq lbl_802D6C9C
/* 802D6C4C 80 81 00 14 */ lwz r4, 0x14(r1)
/* 802D6C50 48 06 49 31 */ bl DCInvalidateRange
/* 802D6C54 48 00 00 48 */ b lbl_802D6C9C
lbl_802D6C58:
/* 802D6C58 38 01 00 10 */ addi r0, r1, 0x10
/* 802D6C5C 90 01 00 08 */ stw r0, 8(r1)
/* 802D6C60 7C 83 23 78 */ mr r3, r4
/* 802D6C64 38 80 00 00 */ li r4, 0
/* 802D6C68 38 A0 00 01 */ li r5, 1
/* 802D6C6C 38 C0 00 00 */ li r6, 0
/* 802D6C70 80 FF 00 38 */ lwz r7, 0x38(r31)
/* 802D6C74 39 00 00 02 */ li r8, 2
/* 802D6C78 39 20 00 00 */ li r9, 0
/* 802D6C7C 39 5F 00 5C */ addi r10, r31, 0x5c
/* 802D6C80 48 00 2F D5 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D6C84 90 7F 00 64 */ stw r3, 0x64(r31)
/* 802D6C88 80 7F 00 64 */ lwz r3, 0x64(r31)
/* 802D6C8C 28 03 00 00 */ cmplwi r3, 0
/* 802D6C90 41 82 00 0C */ beq lbl_802D6C9C
/* 802D6C94 80 81 00 10 */ lwz r4, 0x10(r1)
/* 802D6C98 48 06 48 E9 */ bl DCInvalidateRange
lbl_802D6C9C:
/* 802D6C9C 80 7F 00 64 */ lwz r3, 0x64(r31)
/* 802D6CA0 28 03 00 00 */ cmplwi r3, 0
/* 802D6CA4 40 82 00 10 */ bne lbl_802D6CB4
/* 802D6CA8 38 00 00 00 */ li r0, 0
/* 802D6CAC 98 1F 00 3C */ stb r0, 0x3c(r31)
/* 802D6CB0 48 00 00 60 */ b lbl_802D6D10
lbl_802D6CB4:
/* 802D6CB4 80 03 00 08 */ lwz r0, 8(r3)
/* 802D6CB8 7C 03 02 14 */ add r0, r3, r0
/* 802D6CBC 90 1F 00 44 */ stw r0, 0x44(r31)
/* 802D6CC0 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D6CC4 80 03 00 04 */ lwz r0, 4(r3)
/* 802D6CC8 7C 03 02 14 */ add r0, r3, r0
/* 802D6CCC 90 1F 00 48 */ stw r0, 0x48(r31)
/* 802D6CD0 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D6CD4 80 03 00 0C */ lwz r0, 0xc(r3)
/* 802D6CD8 7C 03 02 14 */ add r0, r3, r0
/* 802D6CDC 90 1F 00 4C */ stw r0, 0x4c(r31)
/* 802D6CE0 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D6CE4 80 03 00 14 */ lwz r0, 0x14(r3)
/* 802D6CE8 7C 03 02 14 */ add r0, r3, r0
/* 802D6CEC 90 1F 00 54 */ stw r0, 0x54(r31)
/* 802D6CF0 80 9F 00 64 */ lwz r4, 0x64(r31)
/* 802D6CF4 80 64 00 0C */ lwz r3, 0xc(r4)
/* 802D6CF8 80 04 00 08 */ lwz r0, 8(r4)
/* 802D6CFC 7C 00 1A 14 */ add r0, r0, r3
/* 802D6D00 7C 04 02 14 */ add r0, r4, r0
/* 802D6D04 90 1F 00 68 */ stw r0, 0x68(r31)
/* 802D6D08 38 00 00 01 */ li r0, 1
/* 802D6D0C 98 1F 00 6C */ stb r0, 0x6c(r31)
lbl_802D6D10:
/* 802D6D10 88 7F 00 3C */ lbz r3, 0x3c(r31)
/* 802D6D14 30 03 FF FF */ addic r0, r3, -1
/* 802D6D18 7C 60 19 10 */ subfe r3, r0, r3
/* 802D6D1C 83 E1 00 1C */ lwz r31, 0x1c(r1)
/* 802D6D20 80 01 00 24 */ lwz r0, 0x24(r1)
/* 802D6D24 7C 08 03 A6 */ mtlr r0
/* 802D6D28 38 21 00 20 */ addi r1, r1, 0x20
/* 802D6D2C 4E 80 00 20 */ blr
asm/JSystem/JKernel/JKRSolidHeap/state_register__12JKRSolidHeapCFPQ27JKRHeap6TStateUl.s
-24
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@@ -1,24 +0,0 @@
lbl_802D11FC:
/* 802D11FC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 802D1200 7C 08 02 A6 */ mflr r0
/* 802D1204 90 01 00 14 */ stw r0, 0x14(r1)
/* 802D1208 93 E1 00 0C */ stw r31, 0xc(r1)
/* 802D120C 93 C1 00 08 */ stw r30, 8(r1)
/* 802D1210 7C 7E 1B 78 */ mr r30, r3
/* 802D1214 7C 9F 23 78 */ mr r31, r4
/* 802D1218 90 A4 00 14 */ stw r5, 0x14(r4)
/* 802D121C 4B FF D5 69 */ bl getTotalFreeSize__7JKRHeapFv
/* 802D1220 80 1E 00 38 */ lwz r0, 0x38(r30)
/* 802D1224 7C 03 00 50 */ subf r0, r3, r0
/* 802D1228 90 1F 00 00 */ stw r0, 0(r31)
/* 802D122C 80 7E 00 70 */ lwz r3, 0x70(r30)
/* 802D1230 80 1E 00 74 */ lwz r0, 0x74(r30)
/* 802D1234 1C 00 00 03 */ mulli r0, r0, 3
/* 802D1238 7C 63 02 14 */ add r3, r3, r0
/* 802D123C 90 7F 00 04 */ stw r3, 4(r31)
/* 802D1240 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 802D1244 83 C1 00 08 */ lwz r30, 8(r1)
/* 802D1248 80 01 00 14 */ lwz r0, 0x14(r1)
/* 802D124C 7C 08 03 A6 */ mtlr r0
/* 802D1250 38 21 00 10 */ addi r1, r1, 0x10
/* 802D1254 4E 80 00 20 */ blr
asm/JSystem/JParticle/JPAKeyBlock/__ct__11JPAKeyBlockFPCUc.s
-5
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@@ -1,5 +0,0 @@
lbl_8027D730:
/* 8027D730 90 83 00 00 */ stw r4, 0(r3)
/* 8027D734 38 04 00 0C */ addi r0, r4, 0xc
/* 8027D738 90 03 00 04 */ stw r0, 4(r3)
/* 8027D73C 4E 80 00 20 */ blr
asm/JSystem/JParticle/JPAKeyBlock/calc__11JPAKeyBlockFf.s
-39
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@@ -1,39 +0,0 @@
lbl_8027D740:
/* 8027D740 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8027D744 7C 08 02 A6 */ mflr r0
/* 8027D748 90 01 00 24 */ stw r0, 0x24(r1)
/* 8027D74C 7C 66 1B 78 */ mr r6, r3
/* 8027D750 80 A3 00 00 */ lwz r5, 0(r3)
/* 8027D754 88 05 00 0B */ lbz r0, 0xb(r5)
/* 8027D758 2C 00 00 00 */ cmpwi r0, 0
/* 8027D75C 41 82 00 5C */ beq lbl_8027D7B8
/* 8027D760 80 86 00 04 */ lwz r4, 4(r6)
/* 8027D764 88 65 00 09 */ lbz r3, 9(r5)
/* 8027D768 38 03 FF FF */ addi r0, r3, -1
/* 8027D76C 54 00 20 36 */ slwi r0, r0, 4
/* 8027D770 7C 04 04 2E */ lfsx f0, r4, r0
/* 8027D774 FC 00 00 1E */ fctiwz f0, f0
/* 8027D778 D8 01 00 08 */ stfd f0, 8(r1)
/* 8027D77C 80 61 00 0C */ lwz r3, 0xc(r1)
/* 8027D780 38 63 00 01 */ addi r3, r3, 1
/* 8027D784 FC 00 08 1E */ fctiwz f0, f1
/* 8027D788 D8 01 00 10 */ stfd f0, 0x10(r1)
/* 8027D78C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8027D790 7C 00 1B D6 */ divw r0, r0, r3
/* 8027D794 7C 00 19 D6 */ mullw r0, r0, r3
/* 8027D798 C8 42 B9 50 */ lfd f2, lit_2215(r2)
/* 8027D79C 6C 00 80 00 */ xoris r0, r0, 0x8000
/* 8027D7A0 90 01 00 1C */ stw r0, 0x1c(r1)
/* 8027D7A4 3C 00 43 30 */ lis r0, 0x4330
/* 8027D7A8 90 01 00 18 */ stw r0, 0x18(r1)
/* 8027D7AC C8 01 00 18 */ lfd f0, 0x18(r1)
/* 8027D7B0 EC 00 10 28 */ fsubs f0, f0, f2
/* 8027D7B4 EC 21 00 28 */ fsubs f1, f1, f0
lbl_8027D7B8:
/* 8027D7B8 88 65 00 09 */ lbz r3, 9(r5)
/* 8027D7BC 80 86 00 04 */ lwz r4, 4(r6)
/* 8027D7C0 48 00 31 C5 */ bl JPACalcKeyAnmValue__FfUsPCf
/* 8027D7C4 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8027D7C8 7C 08 03 A6 */ mtlr r0
/* 8027D7CC 38 21 00 20 */ addi r1, r1, 0x20
/* 8027D7D0 4E 80 00 20 */ blr
asm/JSystem/JStudio/JStudio/fvb-data-parse/func_802850AC.s
-29
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@@ -1,29 +0,0 @@
lbl_802850AC:
/* 802850AC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 802850B0 7C 08 02 A6 */ mflr r0
/* 802850B4 90 01 00 14 */ stw r0, 0x14(r1)
/* 802850B8 93 E1 00 0C */ stw r31, 0xc(r1)
/* 802850BC 7C 9F 23 78 */ mr r31, r4
/* 802850C0 80 63 00 00 */ lwz r3, 0(r3)
/* 802850C4 38 BF 00 04 */ addi r5, r31, 4
/* 802850C8 38 C0 00 00 */ li r6, 0
/* 802850CC 48 05 77 99 */ bl parseVariableUInt_16_32_following__Q27JGadget6binaryFPCvPUlPUlPQ37JGadget6binary5TEBit
/* 802850D0 80 9F 00 00 */ lwz r4, 0(r31)
/* 802850D4 28 04 00 00 */ cmplwi r4, 0
/* 802850D8 40 82 00 14 */ bne lbl_802850EC
/* 802850DC 38 00 00 00 */ li r0, 0
/* 802850E0 90 1F 00 08 */ stw r0, 8(r31)
/* 802850E4 90 7F 00 0C */ stw r3, 0xc(r31)
/* 802850E8 48 00 00 18 */ b lbl_80285100
lbl_802850EC:
/* 802850EC 90 7F 00 08 */ stw r3, 8(r31)
/* 802850F0 38 04 00 03 */ addi r0, r4, 3
/* 802850F4 54 00 00 3A */ rlwinm r0, r0, 0, 0, 0x1d
/* 802850F8 7C 03 02 14 */ add r0, r3, r0
/* 802850FC 90 1F 00 0C */ stw r0, 0xc(r31)
lbl_80285100:
/* 80285100 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80285104 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80285108 7C 08 03 A6 */ mtlr r0
/* 8028510C 38 21 00 10 */ addi r1, r1, 0x10
/* 80285110 4E 80 00 20 */ blr
asm/JSystem/JStudio/JStudio/stb-data-parse/func_80289A80.s
-34
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@@ -1,34 +0,0 @@
lbl_80289A80:
/* 80289A80 38 00 00 00 */ li r0, 0
/* 80289A84 90 04 00 04 */ stw r0, 4(r4)
/* 80289A88 90 04 00 08 */ stw r0, 8(r4)
/* 80289A8C 90 04 00 0C */ stw r0, 0xc(r4)
/* 80289A90 90 04 00 10 */ stw r0, 0x10(r4)
/* 80289A94 80 63 00 00 */ lwz r3, 0(r3)
/* 80289A98 28 03 00 00 */ cmplwi r3, 0
/* 80289A9C 4D 82 00 20 */ beqlr
/* 80289AA0 88 C3 00 00 */ lbz r6, 0(r3)
/* 80289AA4 54 C0 07 76 */ rlwinm r0, r6, 0, 0x1d, 0x1b
/* 80289AA8 98 04 00 00 */ stb r0, 0(r4)
/* 80289AAC 28 06 00 00 */ cmplwi r6, 0
/* 80289AB0 4D 82 00 20 */ beqlr
/* 80289AB4 38 E0 00 01 */ li r7, 1
/* 80289AB8 54 C0 07 39 */ rlwinm. r0, r6, 0, 0x1c, 0x1c
/* 80289ABC 38 A3 00 01 */ addi r5, r3, 1
/* 80289AC0 41 82 00 0C */ beq lbl_80289ACC
/* 80289AC4 88 E5 00 00 */ lbz r7, 0(r5)
/* 80289AC8 38 A5 00 01 */ addi r5, r5, 1
lbl_80289ACC:
/* 80289ACC 90 E4 00 08 */ stw r7, 8(r4)
/* 80289AD0 90 A4 00 0C */ stw r5, 0xc(r4)
/* 80289AD4 54 C0 07 7F */ clrlwi. r0, r6, 0x1d
/* 80289AD8 4D 82 00 20 */ beqlr
/* 80289ADC 54 00 15 BA */ rlwinm r0, r0, 2, 0x16, 0x1d
/* 80289AE0 3C 60 80 3A */ lis r3, gauDataSize_TEParagraph_data__Q37JStudio3stb4data@ha /* 0x8039AB88@ha */
/* 80289AE4 38 63 AB 88 */ addi r3, r3, gauDataSize_TEParagraph_data__Q37JStudio3stb4data@l /* 0x8039AB88@l */
/* 80289AE8 7C 03 00 2E */ lwzx r0, r3, r0
/* 80289AEC 90 04 00 04 */ stw r0, 4(r4)
/* 80289AF0 7C 00 39 D6 */ mullw r0, r0, r7
/* 80289AF4 7C 05 02 14 */ add r0, r5, r0
/* 80289AF8 90 04 00 10 */ stw r0, 0x10(r4)
/* 80289AFC 4E 80 00 20 */ blr
asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent/TRKConstructEvent.s
-7
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@@ -1,7 +0,0 @@
lbl_8036CC3C:
/* 8036CC3C 90 83 00 00 */ stw r4, 0(r3)
/* 8036CC40 38 80 00 00 */ li r4, 0
/* 8036CC44 38 00 FF FF */ li r0, -1
/* 8036CC48 90 83 00 04 */ stw r4, 4(r3)
/* 8036CC4C 90 03 00 08 */ stw r0, 8(r3)
/* 8036CC50 4E 80 00 20 */ blr
asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent/TRKGetNextEvent.s
-48
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@@ -1,48 +0,0 @@
lbl_8036CD34:
/* 8036CD34 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8036CD38 7C 08 02 A6 */ mflr r0
/* 8036CD3C 3C 80 80 45 */ lis r4, gTRKEventQueue@ha /* 0x8044D890@ha */
/* 8036CD40 90 01 00 24 */ stw r0, 0x24(r1)
/* 8036CD44 93 E1 00 1C */ stw r31, 0x1c(r1)
/* 8036CD48 93 C1 00 18 */ stw r30, 0x18(r1)
/* 8036CD4C 3B C0 00 00 */ li r30, 0
/* 8036CD50 93 A1 00 14 */ stw r29, 0x14(r1)
/* 8036CD54 7C 7D 1B 78 */ mr r29, r3
/* 8036CD58 38 64 D8 90 */ addi r3, r4, gTRKEventQueue@l /* 0x8044D890@l */
/* 8036CD5C 48 00 27 45 */ bl TRKAcquireMutex
/* 8036CD60 3C 60 80 45 */ lis r3, gTRKEventQueue@ha /* 0x8044D890@ha */
/* 8036CD64 3B E3 D8 90 */ addi r31, r3, gTRKEventQueue@l /* 0x8044D890@l */
/* 8036CD68 80 1F 00 04 */ lwz r0, 4(r31)
/* 8036CD6C 2C 00 00 00 */ cmpwi r0, 0
/* 8036CD70 40 81 00 4C */ ble lbl_8036CDBC
/* 8036CD74 80 1F 00 08 */ lwz r0, 8(r31)
/* 8036CD78 7F A3 EB 78 */ mr r3, r29
/* 8036CD7C 38 A0 00 0C */ li r5, 0xc
/* 8036CD80 1C 00 00 0C */ mulli r0, r0, 0xc
/* 8036CD84 7C 9F 02 14 */ add r4, r31, r0
/* 8036CD88 38 84 00 0C */ addi r4, r4, 0xc
/* 8036CD8C 4B C9 68 35 */ bl TRK_memcpy
/* 8036CD90 80 7F 00 08 */ lwz r3, 8(r31)
/* 8036CD94 80 9F 00 04 */ lwz r4, 4(r31)
/* 8036CD98 38 03 00 01 */ addi r0, r3, 1
/* 8036CD9C 38 64 FF FF */ addi r3, r4, -1
/* 8036CDA0 90 1F 00 08 */ stw r0, 8(r31)
/* 8036CDA4 2C 00 00 02 */ cmpwi r0, 2
/* 8036CDA8 90 7F 00 04 */ stw r3, 4(r31)
/* 8036CDAC 40 82 00 0C */ bne lbl_8036CDB8
/* 8036CDB0 38 00 00 00 */ li r0, 0
/* 8036CDB4 90 1F 00 08 */ stw r0, 8(r31)
lbl_8036CDB8:
/* 8036CDB8 3B C0 00 01 */ li r30, 1
lbl_8036CDBC:
/* 8036CDBC 3C 60 80 45 */ lis r3, gTRKEventQueue@ha /* 0x8044D890@ha */
/* 8036CDC0 38 63 D8 90 */ addi r3, r3, gTRKEventQueue@l /* 0x8044D890@l */
/* 8036CDC4 48 00 26 D5 */ bl TRKReleaseMutex
/* 8036CDC8 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8036CDCC 7F C3 F3 78 */ mr r3, r30
/* 8036CDD0 83 E1 00 1C */ lwz r31, 0x1c(r1)
/* 8036CDD4 83 C1 00 18 */ lwz r30, 0x18(r1)
/* 8036CDD8 83 A1 00 14 */ lwz r29, 0x14(r1)
/* 8036CDDC 7C 08 03 A6 */ mtlr r0
/* 8036CDE0 38 21 00 20 */ addi r1, r1, 0x20
/* 8036CDE4 4E 80 00 20 */ blr
asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetGetPC.s
-5
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@@ -1,5 +0,0 @@
lbl_8036FD20:
/* 8036FD20 3C 60 80 45 */ lis r3, gTRKCPUState@ha /* 0x8044F338@ha */
/* 8036FD24 38 63 F3 38 */ addi r3, r3, gTRKCPUState@l /* 0x8044F338@l */
/* 8036FD28 80 63 00 80 */ lwz r3, 0x80(r3)
/* 8036FD2C 4E 80 00 20 */ blr
asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetSetInputPendingPtr.s
-5
View File
@@ -1,5 +0,0 @@
lbl_8036FAD8:
/* 8036FAD8 3C 80 80 45 */ lis r4, gTRKState@ha /* 0x8044F294@ha */
/* 8036FADC 38 84 F2 94 */ addi r4, r4, gTRKState@l /* 0x8044F294@l */
/* 8036FAE0 90 64 00 A0 */ stw r3, 0xa0(r4)
/* 8036FAE4 4E 80 00 20 */ blr
asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetSetStopped.s
-5
View File
@@ -1,5 +0,0 @@
lbl_8036FB00:
/* 8036FB00 3C 80 80 45 */ lis r4, gTRKState@ha /* 0x8044F294@ha */
/* 8036FB04 38 84 F2 94 */ addi r4, r4, gTRKState@l /* 0x8044F294@l */
/* 8036FB08 90 64 00 98 */ stw r3, 0x98(r4)
/* 8036FB0C 4E 80 00 20 */ blr
asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetStop.s
-7
View File
@@ -1,7 +0,0 @@
lbl_8036FAE8:
/* 8036FAE8 3C 60 80 45 */ lis r3, gTRKState@ha /* 0x8044F294@ha */
/* 8036FAEC 38 00 00 01 */ li r0, 1
/* 8036FAF0 38 83 F2 94 */ addi r4, r3, gTRKState@l /* 0x8044F294@l */
/* 8036FAF4 38 60 00 00 */ li r3, 0
/* 8036FAF8 90 04 00 98 */ stw r0, 0x98(r4)
/* 8036FAFC 4E 80 00 20 */ blr
asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetStopped.s
-5
View File
@@ -1,5 +0,0 @@
lbl_8036FB10:
/* 8036FB10 3C 60 80 45 */ lis r3, gTRKState@ha /* 0x8044F294@ha */
/* 8036FB14 38 63 F2 94 */ addi r3, r3, gTRKState@l /* 0x8044F294@l */
/* 8036FB18 80 63 00 98 */ lwz r3, 0x98(r3)
/* 8036FB1C 4E 80 00 20 */ blr
include/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h
+1 -1
View File
@@ -4,7 +4,7 @@
#include "dolphin/types.h"
typedef struct TRKBuffer {
u8 _00[4];
u32 _00;
u32 _04;
s32 _08;
u32 _0C;
include/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.h
+13
View File
@@ -3,4 +3,17 @@
#include "dolphin/types.h"
typedef struct TRKEventQueue {
s32 _00;
s32 _04;
s32 _08;
s32 _0C;
s32 _10;
s32 _14;
s32 _18;
s32 _1C;
s32 _20;
u32 _24;
} TRKEventQueue;
#endif /* METROTRK_PORTABLE_NUBEVENT_H */
include/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl.h
+17
View File
@@ -6,4 +6,21 @@
void TRKSwapAndGo();
void TRKTargetSetStopped(s32);
typedef struct TRKState {
/* 0x00 */ u32 field_0x00[35];
/* 0x8C */ u32 msr;
/* 0x90 */ u32 field_0x90[2];
/* 0x98 */ u32 target;
/* 0x9C */ u32 field_0x9C;
/* 0xA0 */ void* inputPendingPtr;
} TRKState;
TRKState gTRKState;
typedef struct TRKCPUState {
/* 0x00 */ u32 field_0x00[32];
/* 0x80 */ u32 pc;
/* 0x84 */ u32 field_0x84[235];
} TRKCPUState;
TRKCPUState gTRKCPUState;
#endif /* PPC_GENERIC_TARGIMPL_H */
libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.c
+24 -20
View File
@@ -16,14 +16,14 @@
void TRKDestructEvent();
void TRKConstructEvent();
void TRKPostEvent();
void TRKGetNextEvent();
u8 TRKGetNextEvent();
u8 TRKInitializeEventQueue();
//
// External References:
//
SECTION_INIT void TRK_memcpy();
SECTION_INIT void TRK_memcpy(void* dst, const void* src, size_t n);
void TRKReleaseBuffer();
//
@@ -36,18 +36,15 @@ void TRKDestructEvent(TRKBuffer* buf) {
}
/* 8036CC3C-8036CC54 36757C 0018+00 0/0 5/5 0/0 .text TRKConstructEvent */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void TRKConstructEvent() {
nofralloc
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent/TRKConstructEvent.s"
void TRKConstructEvent(TRKBuffer* buf, u32 param_1) {
buf->_00 = param_1;
buf->_04 = 0;
buf->_08 = -1;
}
#pragma pop
/* ############################################################################################## */
/* 8044D890-8044D8B8 07A5B0 0028+00 3/3 0/0 0/0 .bss gTRKEventQueue */
static s32 gTRKEventQueue[10];
static TRKEventQueue gTRKEventQueue;
/* 8036CC54-8036CD34 367594 00E0+00 0/0 5/5 0/0 .text TRKPostEvent */
#pragma push
@@ -60,22 +57,29 @@ asm void TRKPostEvent() {
#pragma pop
/* 8036CD34-8036CDE8 367674 00B4+00 0/0 1/1 0/0 .text TRKGetNextEvent */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void TRKGetNextEvent() {
nofralloc
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent/TRKGetNextEvent.s"
u8 TRKGetNextEvent(void* event) {
u8 status = 0;
TRKAcquireMutex(&gTRKEventQueue);
if (0 < gTRKEventQueue._04) {
TRK_memcpy(event, &gTRKEventQueue._0C + gTRKEventQueue._08 * 3, 12);
gTRKEventQueue._04 -= 1;
gTRKEventQueue._08 += 1;
if (gTRKEventQueue._08 == 2) {
gTRKEventQueue._08 = 0;
}
status = 1;
}
TRKReleaseMutex(&gTRKEventQueue);
return status;
}
#pragma pop
/* 8036CDE8-8036CE40 367728 0058+00 0/0 1/1 0/0 .text TRKInitializeEventQueue */
u8 TRKInitializeEventQueue() {
TRKInitializeMutex(&gTRKEventQueue);
TRKAcquireMutex(&gTRKEventQueue);
gTRKEventQueue[1] = 0;
gTRKEventQueue[2] = 0;
gTRKEventQueue[9] = 0x100;
gTRKEventQueue._04 = 0;
gTRKEventQueue._08 = 0;
gTRKEventQueue._24 = 0x100;
TRKReleaseMutex();
return 0;
}
libs/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk.c
+3 -5
View File
@@ -36,8 +36,6 @@ void TRKSaveExtended1Block();
void TRK_main();
void EnableEXI2Interrupts();
void InitMetroTRKCommTable();
extern u32 gTRKState[41];
extern u32 gTRKCPUState[268];
void regist__9daBgObj_cFP4dBgW();
//
@@ -90,8 +88,8 @@ SECTION_BSS static u32 lc_base[1 + 1 /*padding*/];
/* 803719AC-803719F8 36C2EC 004C+00 0/0 1/1 0/0 .text TRKInitializeTarget */
int TRKInitializeTarget() {
gTRKState[38] = 1;
gTRKState[35] = __TRK_get_MSR();
gTRKState.target = 1;
gTRKState.msr = __TRK_get_MSR();
*lc_base = 0xE0000000;
return 0;
}
@@ -179,7 +177,7 @@ asm void __TRK_copy_vectors() {
/* 80371B24-80371B7C 36C464 0058+00 0/0 1/1 0/0 .text TRKTargetTranslate */
u32 TRKTargetTranslate(u32 param_0) {
if (param_0 >= *lc_base) {
if ((param_0 < *lc_base + 0x4000) && ((gTRKCPUState[142] & 3) != 0)) {
if ((param_0 < *lc_base + 0x4000) && ((gTRKCPUState.field_0x84[109] & 3) != 0)) {
return param_0;
}
}
libs/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl.c
+14 -46
View File
@@ -21,10 +21,10 @@ static void ReadFPSCR();
static void WriteFPSCR();
void TRKTargetAccessARAM();
void TRKTargetSetInputPendingPtr();
void TRKTargetStop();
void TRKTargetStopped();
u32 TRKTargetStop();
s32 TRKTargetStopped();
void TRKTargetSupportRequest();
void TRKTargetGetPC();
u32 TRKTargetGetPC();
void TRKTargetStepOutOfRange();
void TRKTargetSingleStep();
void TRKTargetAddExceptionInfo();
@@ -123,14 +123,6 @@ SECTION_DATA static u8 gTRKExceptionStatus[16] = {
/* 8044F290-8044F294 07BFB0 0002+02 1/1 0/0 0/0 .bss TRK_saved_exceptionID */
SECTION_BSS static s32 TRK_saved_exceptionID = 0;
/* 8044F294-8044F338 07BFB4 00A4+00 11/11 1/1 0/0 .bss gTRKState */
extern u8 gTRKState[164];
u8 gTRKState[164];
/* 8044F338-8044F768 07C058 0430+00 12/12 6/6 0/0 .bss gTRKCPUState */
extern u8 gTRKCPUState[1072];
u8 gTRKCPUState[1072];
/* 8044F768-8044F7FC 07C488 0094+00 1/1 0/0 0/0 .bss gTRKSaveState */
static u8 gTRKSaveState[148];
@@ -206,44 +198,25 @@ asm void TRKTargetAccessARAM() {
#pragma pop
/* 8036FAD8-8036FAE8 36A418 0010+00 0/0 1/1 0/0 .text TRKTargetSetInputPendingPtr */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void TRKTargetSetInputPendingPtr() {
nofralloc
#include "asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetSetInputPendingPtr.s"
void TRKTargetSetInputPendingPtr(void* ptr) {
gTRKState.inputPendingPtr = ptr;
}
#pragma pop
/* 8036FAE8-8036FB00 36A428 0018+00 0/0 1/1 0/0 .text TRKTargetStop */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void TRKTargetStop() {
nofralloc
#include "asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetStop.s"
u32 TRKTargetStop() {
gTRKState.target = 1;
return 0;
}
#pragma pop
/* 8036FB00-8036FB10 36A440 0010+00 0/0 1/1 0/0 .text TRKTargetSetStopped */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void TRKTargetSetStopped(s32) {
nofralloc
#include "asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetSetStopped.s"
void TRKTargetSetStopped(s32 tgt) {
gTRKState.target = tgt;
}
#pragma pop
/* 8036FB10-8036FB20 36A450 0010+00 0/0 3/3 0/0 .text TRKTargetStopped */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void TRKTargetStopped() {
nofralloc
#include "asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetStopped.s"
s32 TRKTargetStopped() {
return gTRKState.target;
}
#pragma pop
/* 8036FB20-8036FD20 36A460 0200+00 0/0 1/1 0/0 .text TRKTargetSupportRequest */
#pragma push
@@ -256,14 +229,9 @@ asm void TRKTargetSupportRequest() {
#pragma pop
/* 8036FD20-8036FD30 36A660 0010+00 0/0 1/1 0/0 .text TRKTargetGetPC */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void TRKTargetGetPC() {
nofralloc
#include "asm/TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl/TRKTargetGetPC.s"
u32 TRKTargetGetPC() {
return gTRKCPUState.pc;
}
#pragma pop
/* ############################################################################################## */
/* 803A2B60-803A2B70 02F1C0 0010+00 1/1 0/0 0/0 .rodata gTRKMemMap */