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split d_stage

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This commit is contained in:
Pheenoh
2021-01-08 13:01:37 -05:00
parent 2c1b491978
commit f1ff8a45ee
303 changed files with 7429 additions and 4954 deletions
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asm/d/d_stage.s
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include/d/d_stage/asm/func_80023E28.s
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/* 80023E28 00020D68 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023E2C 00020D6C 7C 08 02 A6 */ mflr r0
/* 80023E30 00020D70 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023E34 00020D74 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80023E38 00020D78 7C 9F 23 78 */ mr r31, r4
/* 80023E3C 00020D7C 88 03 00 0E */ lbz r0, 0xe(r3)
/* 80023E40 00020D80 7C 00 07 75 */ extsb. r0, r0
/* 80023E44 00020D84 40 82 00 3C */ bne lbl_80023E80
/* 80023E48 00020D88 38 00 00 01 */ li r0, 1
/* 80023E4C 00020D8C 98 03 00 0E */ stb r0, 0xe(r3)
/* 80023E50 00020D90 99 03 00 0F */ stb r8, 0xf(r3)
/* 80023E54 00020D94 99 23 00 10 */ stb r9, 0x10(r3)
/* 80023E58 00020D98 48 00 03 45 */ bl dStage_startStage_c_NS_set
/* 80023E5C 00020D9C 7F E3 FB 78 */ mr r3, r31
/* 80023E60 00020DA0 3C 80 80 38 */ lis r4, lbl_80378A50@ha
/* 80023E64 00020DA4 38 84 8A 50 */ addi r4, r4, lbl_80378A50@l
/* 80023E68 00020DA8 48 34 4B 2D */ bl strcmp
/* 80023E6C 00020DAC 2C 03 00 00 */ cmpwi r3, 0
/* 80023E70 00020DB0 40 82 00 10 */ bne lbl_80023E80
/* 80023E74 00020DB4 38 00 00 01 */ li r0, 1
/* 80023E78 00020DB8 80 6D 86 F8 */ lwz r3, m_Do_Reset_NS_mDoRst_NS_mResetData-_SDA_BASE_(r13)
/* 80023E7C 00020DBC 90 03 00 00 */ stw r0, 0(r3)
lbl_80023E80:
/* 80023E80 00020DC0 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80023E84 00020DC4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023E88 00020DC8 7C 08 03 A6 */ mtlr r0
/* 80023E8C 00020DCC 38 21 00 10 */ addi r1, r1, 0x10
/* 80023E90 00020DD0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80023E94.s
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/* 80023E94 00020DD4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023E98 00020DD8 7C 08 02 A6 */ mflr r0
/* 80023E9C 00020DDC 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023EA0 00020DE0 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 80023EA4 00020DE4 38 63 8A 50 */ addi r3, r3, lbl_80378A50@l
/* 80023EA8 00020DE8 38 63 00 08 */ addi r3, r3, 8
/* 80023EAC 00020DEC 4C C6 31 82 */ crclr 6
/* 80023EB0 00020DF0 4B FE 2D 5D */ bl OSReport_Error
/* 80023EB4 00020DF4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023EB8 00020DF8 7C 08 03 A6 */ mtlr r0
/* 80023EBC 00020DFC 38 21 00 10 */ addi r1, r1, 0x10
/* 80023EC0 00020E00 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80023EC4.s
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/* 80023EC4 00020E04 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023EC8 00020E08 7C 08 02 A6 */ mflr r0
/* 80023ECC 00020E0C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023ED0 00020E10 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 80023ED4 00020E14 38 63 8A 50 */ addi r3, r3, lbl_80378A50@l
/* 80023ED8 00020E18 38 63 00 49 */ addi r3, r3, 0x49
/* 80023EDC 00020E1C 4C C6 31 82 */ crclr 6
/* 80023EE0 00020E20 4B FE 2D 2D */ bl OSReport_Error
/* 80023EE4 00020E24 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023EE8 00020E28 7C 08 03 A6 */ mtlr r0
/* 80023EEC 00020E2C 38 21 00 10 */ addi r1, r1, 0x10
/* 80023EF0 00020E30 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80023EF4.s
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/* 80023EF4 00020E34 3C 60 80 3F */ lis r3, lbl_803F4E74@ha
/* 80023EF8 00020E38 38 63 4E 74 */ addi r3, r3, lbl_803F4E74@l
/* 80023EFC 00020E3C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80023F00.s
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/* 80023F00 00020E40 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023F04 00020E44 7C 08 02 A6 */ mflr r0
/* 80023F08 00020E48 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023F0C 00020E4C 81 83 00 00 */ lwz r12, 0(r3)
/* 80023F10 00020E50 81 8C 00 BC */ lwz r12, 0xbc(r12)
/* 80023F14 00020E54 7D 89 03 A6 */ mtctr r12
/* 80023F18 00020E58 4E 80 04 21 */ bctrl
/* 80023F1C 00020E5C 28 03 00 00 */ cmplwi r3, 0
/* 80023F20 00020E60 40 82 00 0C */ bne lbl_80023F2C
/* 80023F24 00020E64 38 60 00 00 */ li r3, 0
/* 80023F28 00020E68 48 00 00 18 */ b lbl_80023F40
lbl_80023F2C:
/* 80023F2C 00020E6C 80 03 00 0C */ lwz r0, 0xc(r3)
/* 80023F30 00020E70 54 00 87 7E */ rlwinm r0, r0, 0x10, 0x1d, 0x1f
/* 80023F34 00020E74 20 00 00 03 */ subfic r0, r0, 3
/* 80023F38 00020E78 7C 00 00 34 */ cntlzw r0, r0
/* 80023F3C 00020E7C 54 03 DE 3E */ rlwinm r3, r0, 0x1b, 0x18, 0x1f
lbl_80023F40:
/* 80023F40 00020E80 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023F44 00020E84 7C 08 03 A6 */ mtlr r0
/* 80023F48 00020E88 38 21 00 10 */ addi r1, r1, 0x10
/* 80023F4C 00020E8C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80023F50.s
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/* 80023F50 00020E90 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023F54 00020E94 7C 08 02 A6 */ mflr r0
/* 80023F58 00020E98 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023F5C 00020E9C 4B FF FF A5 */ bl dStage_isBossStage
/* 80023F60 00020EA0 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 80023F64 00020EA4 40 82 00 10 */ bne lbl_80023F74
/* 80023F68 00020EA8 38 00 00 00 */ li r0, 0
/* 80023F6C 00020EAC 3C 60 80 3F */ lis r3, lbl_803F4E74@ha
/* 80023F70 00020EB0 90 03 4E 74 */ stw r0, lbl_803F4E74@l(r3)
lbl_80023F74:
/* 80023F74 00020EB4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023F78 00020EB8 7C 08 03 A6 */ mtlr r0
/* 80023F7C 00020EBC 38 21 00 10 */ addi r1, r1, 0x10
/* 80023F80 00020EC0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80023F84.s
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/* 80023F84 00020EC4 28 04 00 00 */ cmplwi r4, 0
/* 80023F88 00020EC8 40 82 00 14 */ bne lbl_80023F9C
/* 80023F8C 00020ECC 38 00 00 00 */ li r0, 0
/* 80023F90 00020ED0 3C 60 80 3F */ lis r3, lbl_803F4E74@ha
/* 80023F94 00020ED4 90 03 4E 74 */ stw r0, lbl_803F4E74@l(r3)
/* 80023F98 00020ED8 4E 80 00 20 */ blr
lbl_80023F9C:
/* 80023F9C 00020EDC 80 04 00 00 */ lwz r0, 0(r4)
/* 80023FA0 00020EE0 2C 00 00 40 */ cmpwi r0, 0x40
/* 80023FA4 00020EE4 40 80 00 0C */ bge lbl_80023FB0
/* 80023FA8 00020EE8 2C 00 00 00 */ cmpwi r0, 0
/* 80023FAC 00020EEC 40 80 00 14 */ bge lbl_80023FC0
lbl_80023FB0:
/* 80023FB0 00020EF0 38 00 00 00 */ li r0, 0
/* 80023FB4 00020EF4 3C 60 80 3F */ lis r3, lbl_803F4E74@ha
/* 80023FB8 00020EF8 90 03 4E 74 */ stw r0, lbl_803F4E74@l(r3)
/* 80023FBC 00020EFC 4E 80 00 20 */ blr
lbl_80023FC0:
/* 80023FC0 00020F00 3C 60 80 3F */ lis r3, lbl_803F4E74@ha
/* 80023FC4 00020F04 38 A3 4E 74 */ addi r5, r3, lbl_803F4E74@l
/* 80023FC8 00020F08 90 05 00 00 */ stw r0, 0(r5)
/* 80023FCC 00020F0C 4D 82 00 20 */ beqlr
/* 80023FD0 00020F10 80 84 00 04 */ lwz r4, 4(r4)
/* 80023FD4 00020F14 38 C5 00 04 */ addi r6, r5, 4
/* 80023FD8 00020F18 38 E0 00 00 */ li r7, 0
/* 80023FDC 00020F1C 48 00 00 70 */ b lbl_8002404C
lbl_80023FE0:
/* 80023FE0 00020F20 80 64 00 00 */ lwz r3, 0(r4)
/* 80023FE4 00020F24 80 04 00 04 */ lwz r0, 4(r4)
/* 80023FE8 00020F28 90 66 00 00 */ stw r3, 0(r6)
/* 80023FEC 00020F2C 90 06 00 04 */ stw r0, 4(r6)
/* 80023FF0 00020F30 80 04 00 08 */ lwz r0, 8(r4)
/* 80023FF4 00020F34 90 06 00 08 */ stw r0, 8(r6)
/* 80023FF8 00020F38 C0 04 00 0C */ lfs f0, 0xc(r4)
/* 80023FFC 00020F3C D0 06 00 0C */ stfs f0, 0xc(r6)
/* 80024000 00020F40 C0 04 00 10 */ lfs f0, 0x10(r4)
/* 80024004 00020F44 D0 06 00 10 */ stfs f0, 0x10(r6)
/* 80024008 00020F48 C0 04 00 14 */ lfs f0, 0x14(r4)
/* 8002400C 00020F4C D0 06 00 14 */ stfs f0, 0x14(r6)
/* 80024010 00020F50 A8 04 00 18 */ lha r0, 0x18(r4)
/* 80024014 00020F54 B0 06 00 18 */ sth r0, 0x18(r6)
/* 80024018 00020F58 A8 04 00 1A */ lha r0, 0x1a(r4)
/* 8002401C 00020F5C B0 06 00 1A */ sth r0, 0x1a(r6)
/* 80024020 00020F60 A8 04 00 1C */ lha r0, 0x1c(r4)
/* 80024024 00020F64 B0 06 00 1C */ sth r0, 0x1c(r6)
/* 80024028 00020F68 A0 04 00 1E */ lhz r0, 0x1e(r4)
/* 8002402C 00020F6C B0 06 00 1E */ sth r0, 0x1e(r6)
/* 80024030 00020F70 A0 04 00 20 */ lhz r0, 0x20(r4)
/* 80024034 00020F74 B0 06 00 20 */ sth r0, 0x20(r6)
/* 80024038 00020F78 88 04 00 22 */ lbz r0, 0x22(r4)
/* 8002403C 00020F7C 98 06 00 22 */ stb r0, 0x22(r6)
/* 80024040 00020F80 38 C6 00 24 */ addi r6, r6, 0x24
/* 80024044 00020F84 38 84 00 24 */ addi r4, r4, 0x24
/* 80024048 00020F88 38 E7 00 01 */ addi r7, r7, 1
lbl_8002404C:
/* 8002404C 00020F8C 80 05 00 00 */ lwz r0, 0(r5)
/* 80024050 00020F90 7C 07 00 00 */ cmpw r7, r0
/* 80024054 00020F94 41 80 FF 8C */ blt lbl_80023FE0
/* 80024058 00020F98 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002405C.s
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/* 8002405C 00020F9C 3C 60 80 3F */ lis r3, lbl_803F5784@ha
/* 80024060 00020FA0 38 63 57 84 */ addi r3, r3, lbl_803F5784@l
/* 80024064 00020FA4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024068.s
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/* 80024068 00020FA8 38 00 00 00 */ li r0, 0
/* 8002406C 00020FAC 3C 60 80 3F */ lis r3, lbl_803F5784@ha
/* 80024070 00020FB0 90 03 57 84 */ stw r0, lbl_803F5784@l(r3)
/* 80024074 00020FB4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024078.s
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/* 80024078 00020FB8 28 04 00 00 */ cmplwi r4, 0
/* 8002407C 00020FBC 4D 82 00 20 */ beqlr
/* 80024080 00020FC0 80 C4 00 00 */ lwz r6, 0(r4)
/* 80024084 00020FC4 3C A0 80 3F */ lis r5, 0x803f
/* 80024088 00020FC8 84 E5 57 84 */ lwzu r7, 0x5784(r5)
/* 8002408C 00020FCC 7C 06 3A 14 */ add r0, r6, r7
/* 80024090 00020FD0 2C 00 00 40 */ cmpwi r0, 0x40
/* 80024094 00020FD4 4C 80 00 20 */ bgelr
/* 80024098 00020FD8 2C 06 00 00 */ cmpwi r6, 0
/* 8002409C 00020FDC 40 80 00 08 */ bge lbl_800240A4
/* 800240A0 00020FE0 4E 80 00 20 */ blr
lbl_800240A4:
/* 800240A4 00020FE4 4D 82 00 20 */ beqlr
/* 800240A8 00020FE8 80 C4 00 04 */ lwz r6, 4(r4)
/* 800240AC 00020FEC 1C 07 00 24 */ mulli r0, r7, 0x24
/* 800240B0 00020FF0 7C A5 02 14 */ add r5, r5, r0
/* 800240B4 00020FF4 38 E5 00 04 */ addi r7, r5, 4
/* 800240B8 00020FF8 39 00 00 00 */ li r8, 0
/* 800240BC 00020FFC 39 20 00 00 */ li r9, 0
/* 800240C0 00021000 48 00 00 94 */ b lbl_80024154
lbl_800240C4:
/* 800240C4 00021004 80 A6 00 00 */ lwz r5, 0(r6)
/* 800240C8 00021008 80 06 00 04 */ lwz r0, 4(r6)
/* 800240CC 0002100C 90 A7 00 00 */ stw r5, 0(r7)
/* 800240D0 00021010 90 07 00 04 */ stw r0, 4(r7)
/* 800240D4 00021014 80 06 00 08 */ lwz r0, 8(r6)
/* 800240D8 00021018 90 07 00 08 */ stw r0, 8(r7)
/* 800240DC 0002101C C0 06 00 0C */ lfs f0, 0xc(r6)
/* 800240E0 00021020 D0 07 00 0C */ stfs f0, 0xc(r7)
/* 800240E4 00021024 C0 06 00 10 */ lfs f0, 0x10(r6)
/* 800240E8 00021028 D0 07 00 10 */ stfs f0, 0x10(r7)
/* 800240EC 0002102C C0 06 00 14 */ lfs f0, 0x14(r6)
/* 800240F0 00021030 D0 07 00 14 */ stfs f0, 0x14(r7)
/* 800240F4 00021034 A8 06 00 18 */ lha r0, 0x18(r6)
/* 800240F8 00021038 B0 07 00 18 */ sth r0, 0x18(r7)
/* 800240FC 0002103C A8 06 00 1A */ lha r0, 0x1a(r6)
/* 80024100 00021040 B0 07 00 1A */ sth r0, 0x1a(r7)
/* 80024104 00021044 A8 06 00 1C */ lha r0, 0x1c(r6)
/* 80024108 00021048 B0 07 00 1C */ sth r0, 0x1c(r7)
/* 8002410C 0002104C A0 06 00 1E */ lhz r0, 0x1e(r6)
/* 80024110 00021050 B0 07 00 1E */ sth r0, 0x1e(r7)
/* 80024114 00021054 A0 06 00 20 */ lhz r0, 0x20(r6)
/* 80024118 00021058 B0 07 00 20 */ sth r0, 0x20(r7)
/* 8002411C 0002105C 88 06 00 22 */ lbz r0, 0x22(r6)
/* 80024120 00021060 98 07 00 22 */ stb r0, 0x22(r7)
/* 80024124 00021064 A8 07 00 18 */ lha r0, 0x18(r7)
/* 80024128 00021068 54 00 00 32 */ rlwinm r0, r0, 0, 0, 0x19
/* 8002412C 0002106C B0 07 00 18 */ sth r0, 0x18(r7)
/* 80024130 00021070 A8 A7 00 18 */ lha r5, 0x18(r7)
/* 80024134 00021074 88 03 00 04 */ lbz r0, 4(r3)
/* 80024138 00021078 54 00 06 BE */ clrlwi r0, r0, 0x1a
/* 8002413C 0002107C 7C A0 03 78 */ or r0, r5, r0
/* 80024140 00021080 B0 07 00 18 */ sth r0, 0x18(r7)
/* 80024144 00021084 38 E7 00 24 */ addi r7, r7, 0x24
/* 80024148 00021088 38 C6 00 24 */ addi r6, r6, 0x24
/* 8002414C 0002108C 39 08 00 01 */ addi r8, r8, 1
/* 80024150 00021090 39 29 00 01 */ addi r9, r9, 1
lbl_80024154:
/* 80024154 00021094 80 04 00 00 */ lwz r0, 0(r4)
/* 80024158 00021098 7C 09 00 00 */ cmpw r9, r0
/* 8002415C 0002109C 41 80 FF 68 */ blt lbl_800240C4
/* 80024160 000210A0 3C 60 80 3F */ lis r3, lbl_803F0000@ha
/* 80024164 000210A4 84 03 57 84 */ lwzu r0, 0x5784(r3)
/* 80024168 000210A8 7C 00 42 14 */ add r0, r0, r8
/* 8002416C 000210AC 90 03 00 00 */ stw r0, lbl_803F0000@l(r3)
/* 80024170 000210B0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024174.s
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/* 80024174 000210B4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024178 000210B8 7C 08 02 A6 */ mflr r0
/* 8002417C 000210BC 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024180 000210C0 38 84 00 04 */ addi r4, r4, 4
/* 80024184 000210C4 4B FF FE F5 */ bl dStage_RoomKeepDoorInfoProc
/* 80024188 000210C8 38 60 00 01 */ li r3, 1
/* 8002418C 000210CC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024190 000210D0 7C 08 03 A6 */ mtlr r0
/* 80024194 000210D4 38 21 00 10 */ addi r1, r1, 0x10
/* 80024198 000210D8 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002419C.s
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/* 8002419C 000210DC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800241A0 000210E0 7C 08 02 A6 */ mflr r0
/* 800241A4 000210E4 90 01 00 24 */ stw r0, 0x24(r1)
/* 800241A8 000210E8 39 61 00 20 */ addi r11, r1, 0x20
/* 800241AC 000210EC 48 33 E0 2D */ bl _savegpr_28
/* 800241B0 000210F0 7C 7C 1B 78 */ mr r28, r3
/* 800241B4 000210F4 7C BD 2B 78 */ mr r29, r5
/* 800241B8 000210F8 7C DE 33 78 */ mr r30, r6
/* 800241BC 000210FC 7C FF 3B 78 */ mr r31, r7
/* 800241C0 00021100 48 34 49 6D */ bl strcpy
/* 800241C4 00021104 9B BC 00 0A */ stb r29, 0xa(r28)
/* 800241C8 00021108 B3 DC 00 08 */ sth r30, 8(r28)
/* 800241CC 0002110C 9B FC 00 0B */ stb r31, 0xb(r28)
/* 800241D0 00021110 39 61 00 20 */ addi r11, r1, 0x20
/* 800241D4 00021114 48 33 E0 51 */ bl _restgpr_28
/* 800241D8 00021118 80 01 00 24 */ lwz r0, 0x24(r1)
/* 800241DC 0002111C 7C 08 03 A6 */ mtlr r0
/* 800241E0 00021120 38 21 00 20 */ addi r1, r1, 0x20
/* 800241E4 00021124 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800241E8.s
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/* 800241E8 00021128 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800241EC 0002112C 7C 08 02 A6 */ mflr r0
/* 800241F0 00021130 90 01 00 24 */ stw r0, 0x24(r1)
/* 800241F4 00021134 39 61 00 20 */ addi r11, r1, 0x20
/* 800241F8 00021138 48 33 DF E1 */ bl _savegpr_28
/* 800241FC 0002113C 38 80 FF FF */ li r4, -1
/* 80024200 00021140 98 8D 87 E4 */ stb r4, lbl_80450D64-_SDA_BASE_(r13)
/* 80024204 00021144 98 8D 87 E5 */ stb r4, lbl_80450D65-_SDA_BASE_(r13)
/* 80024208 00021148 98 8D 87 E6 */ stb r4, lbl_80450D66-_SDA_BASE_(r13)
/* 8002420C 0002114C 38 00 00 00 */ li r0, 0
/* 80024210 00021150 98 0D 87 E8 */ stb r0, lbl_80450D68-_SDA_BASE_(r13)
/* 80024214 00021154 98 8D 80 70 */ stb r4, lbl_804505F0-_SDA_BASE_(r13)
/* 80024218 00021158 3C 80 80 40 */ lis r4, g_dComIfG_gameInfo@ha
/* 8002421C 0002115C 38 84 61 C0 */ addi r4, r4, g_dComIfG_gameInfo@l
/* 80024220 00021160 A8 04 4E 08 */ lha r0, 0x4e08(r4)
/* 80024224 00021164 7C 00 07 35 */ extsh. r0, r0
/* 80024228 00021168 40 80 00 0C */ bge lbl_80024234
/* 8002422C 0002116C 2C 00 FF FC */ cmpwi r0, -4
/* 80024230 00021170 40 82 00 08 */ bne lbl_80024238
lbl_80024234:
/* 80024234 00021174 48 00 01 05 */ bl dStage_roomControl_c_NS_initZone
lbl_80024238:
/* 80024238 00021178 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 8002423C 0002117C 3B E3 60 94 */ addi r31, r3, lbl_803F6094@l
/* 80024240 00021180 7F FE FB 78 */ mr r30, r31
/* 80024244 00021184 3B A0 00 00 */ li r29, 0
/* 80024248 00021188 3B 80 00 00 */ li r28, 0
lbl_8002424C:
/* 8002424C 0002118C 7F C3 F3 78 */ mr r3, r30
/* 80024250 00021190 81 9E 00 00 */ lwz r12, 0(r30)
/* 80024254 00021194 81 8C 00 08 */ lwz r12, 8(r12)
/* 80024258 00021198 7D 89 03 A6 */ mtctr r12
/* 8002425C 0002119C 4E 80 04 21 */ bctrl
/* 80024260 000211A0 7F C3 F3 78 */ mr r3, r30
/* 80024264 000211A4 48 00 0A 45 */ bl dStage_roomDt_c_NS_initFileList2
/* 80024268 000211A8 38 00 00 00 */ li r0, 0
/* 8002426C 000211AC 7C 7F E2 14 */ add r3, r31, r28
/* 80024270 000211B0 98 03 03 F4 */ stb r0, 0x3f4(r3)
/* 80024274 000211B4 98 1E 03 F5 */ stb r0, 0x3f5(r30)
/* 80024278 000211B8 88 7E 03 F7 */ lbz r3, 0x3f7(r30)
/* 8002427C 000211BC 7C 60 07 75 */ extsb. r0, r3
/* 80024280 000211C0 41 80 00 40 */ blt lbl_800242C0
/* 80024284 000211C4 7C 60 07 74 */ extsb r0, r3
/* 80024288 000211C8 54 04 28 34 */ slwi r4, r0, 5
/* 8002428C 000211CC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024290 000211D0 38 03 61 C0 */ addi r0, r3, g_dComIfG_gameInfo@l
/* 80024294 000211D4 7C 60 22 14 */ add r3, r0, r4
/* 80024298 000211D8 38 63 09 B6 */ addi r3, r3, 0x9b6
/* 8002429C 000211DC 48 01 0A 51 */ bl clearRoomSwitch__13dSv_zoneBit_cFv
/* 800242A0 000211E0 88 1E 03 F7 */ lbz r0, 0x3f7(r30)
/* 800242A4 000211E4 7C 00 07 74 */ extsb r0, r0
/* 800242A8 000211E8 54 04 28 34 */ slwi r4, r0, 5
/* 800242AC 000211EC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800242B0 000211F0 38 03 61 C0 */ addi r0, r3, g_dComIfG_gameInfo@l
/* 800242B4 000211F4 7C 60 22 14 */ add r3, r0, r4
/* 800242B8 000211F8 38 63 09 B6 */ addi r3, r3, 0x9b6
/* 800242BC 000211FC 48 01 0A 3D */ bl clearRoomItem__13dSv_zoneBit_cFv
lbl_800242C0:
/* 800242C0 00021200 38 00 FF FF */ li r0, -1
/* 800242C4 00021204 98 1E 03 F8 */ stb r0, 0x3f8(r30)
/* 800242C8 00021208 38 00 00 00 */ li r0, 0
/* 800242CC 0002120C 90 1E 04 00 */ stw r0, 0x400(r30)
/* 800242D0 00021210 3B BD 00 01 */ addi r29, r29, 1
/* 800242D4 00021214 2C 1D 00 40 */ cmpwi r29, 0x40
/* 800242D8 00021218 3B DE 04 04 */ addi r30, r30, 0x404
/* 800242DC 0002121C 3B 9C 04 04 */ addi r28, r28, 0x404
/* 800242E0 00021220 41 80 FF 6C */ blt lbl_8002424C
/* 800242E4 00021224 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 800242E8 00021228 38 63 8A 50 */ addi r3, r3, lbl_80378A50@l
/* 800242EC 0002122C 38 63 00 8D */ addi r3, r3, 0x8d
/* 800242F0 00021230 48 00 B1 45 */ bl dComIfG_getStageRes
/* 800242F4 00021234 90 6D 87 EC */ stw r3, lbl_80450D6C-_SDA_BASE_(r13)
/* 800242F8 00021238 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 800242FC 0002123C 38 63 8A 50 */ addi r3, r3, lbl_80378A50@l
/* 80024300 00021240 38 63 00 96 */ addi r3, r3, 0x96
/* 80024304 00021244 48 00 B1 31 */ bl dComIfG_getStageRes
/* 80024308 00021248 90 6D 87 F0 */ stw r3, lbl_80450D70-_SDA_BASE_(r13)
/* 8002430C 0002124C 80 0D 87 EC */ lwz r0, lbl_80450D6C-_SDA_BASE_(r13)
/* 80024310 00021250 28 00 00 00 */ cmplwi r0, 0
/* 80024314 00021254 40 82 00 0C */ bne lbl_80024320
/* 80024318 00021258 38 00 00 00 */ li r0, 0
/* 8002431C 0002125C 90 0D 87 F0 */ stw r0, lbl_80450D70-_SDA_BASE_(r13)
lbl_80024320:
/* 80024320 00021260 39 61 00 20 */ addi r11, r1, 0x20
/* 80024324 00021264 48 33 DF 01 */ bl _restgpr_28
/* 80024328 00021268 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8002432C 0002126C 7C 08 03 A6 */ mtlr r0
/* 80024330 00021270 38 21 00 20 */ addi r1, r1, 0x20
/* 80024334 00021274 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024338.s
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/* 80024338 00021278 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002433C 0002127C 7C 08 02 A6 */ mflr r0
/* 80024340 00021280 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024344 00021284 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024348 00021288 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 8002434C 0002128C 48 01 0E 01 */ bl initZone__10dSv_info_cFv
/* 80024350 00021290 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 80024354 00021294 38 03 60 94 */ addi r0, r3, lbl_803F6094@l
/* 80024358 00021298 7C 04 03 78 */ mr r4, r0
/* 8002435C 0002129C 38 60 FF FF */ li r3, -1
/* 80024360 000212A0 38 00 00 40 */ li r0, 0x40
/* 80024364 000212A4 7C 09 03 A6 */ mtctr r0
lbl_80024368:
/* 80024368 000212A8 98 64 03 F7 */ stb r3, 0x3f7(r4)
/* 8002436C 000212AC 38 84 04 04 */ addi r4, r4, 0x404
/* 80024370 000212B0 42 00 FF F8 */ bdnz lbl_80024368
/* 80024374 000212B4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024378 000212B8 7C 08 03 A6 */ mtlr r0
/* 8002437C 000212BC 38 21 00 10 */ addi r1, r1, 0x10
/* 80024380 000212C0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024384.s
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/* 80024384 000212C4 2C 04 00 00 */ cmpwi r4, 0
/* 80024388 000212C8 41 80 00 0C */ blt lbl_80024394
/* 8002438C 000212CC 2C 04 00 40 */ cmpwi r4, 0x40
/* 80024390 000212D0 41 80 00 0C */ blt lbl_8002439C
lbl_80024394:
/* 80024394 000212D4 38 60 00 00 */ li r3, 0
/* 80024398 000212D8 4E 80 00 20 */ blr
lbl_8002439C:
/* 8002439C 000212DC 1C 84 04 04 */ mulli r4, r4, 0x404
/* 800243A0 000212E0 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 800243A4 000212E4 38 03 60 94 */ addi r0, r3, lbl_803F6094@l
/* 800243A8 000212E8 7C 60 22 14 */ add r3, r0, r4
/* 800243AC 000212EC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800243B0.s
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/* 800243B0 000212F0 3C 80 80 3F */ lis r4, lbl_803F6094@ha
/* 800243B4 000212F4 38 84 60 94 */ addi r4, r4, lbl_803F6094@l
/* 800243B8 000212F8 1C 03 04 04 */ mulli r0, r3, 0x404
/* 800243BC 000212FC 7C 64 02 14 */ add r3, r4, r0
/* 800243C0 00021300 88 03 03 F8 */ lbz r0, 0x3f8(r3)
/* 800243C4 00021304 7C 00 07 75 */ extsb. r0, r0
/* 800243C8 00021308 40 80 00 0C */ bge lbl_800243D4
/* 800243CC 0002130C 38 60 00 00 */ li r3, 0
/* 800243D0 00021310 4E 80 00 20 */ blr
lbl_800243D4:
/* 800243D4 00021314 54 00 10 3A */ slwi r0, r0, 2
/* 800243D8 00021318 3C 60 80 3A */ lis r3, lbl_803A6920@ha
/* 800243DC 0002131C 38 63 69 20 */ addi r3, r3, lbl_803A6920@l
/* 800243E0 00021320 7C 63 00 2E */ lwzx r3, r3, r0
/* 800243E4 00021324 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800243E8.s
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/* 800243E8 00021328 88 0D 87 E4 */ lbz r0, lbl_80450D64-_SDA_BASE_(r13)
/* 800243EC 0002132C 98 0D 87 E5 */ stb r0, lbl_80450D65-_SDA_BASE_(r13)
/* 800243F0 00021330 98 6D 87 E4 */ stb r3, lbl_80450D64-_SDA_BASE_(r13)
/* 800243F4 00021334 54 65 06 3E */ clrlwi r5, r3, 0x18
/* 800243F8 00021338 98 6D 87 E6 */ stb r3, lbl_80450D66-_SDA_BASE_(r13)
/* 800243FC 0002133C 7C A0 07 75 */ extsb. r0, r5
/* 80024400 00021340 4D 80 00 20 */ bltlr
/* 80024404 00021344 38 80 00 01 */ li r4, 1
/* 80024408 00021348 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 8002440C 0002134C 38 63 60 94 */ addi r3, r3, lbl_803F6094@l
/* 80024410 00021350 7C A0 07 74 */ extsb r0, r5
/* 80024414 00021354 1C 00 04 04 */ mulli r0, r0, 0x404
/* 80024418 00021358 7C 63 02 14 */ add r3, r3, r0
/* 8002441C 0002135C 98 83 03 F5 */ stb r4, 0x3f5(r3)
/* 80024420 00021360 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024424.s
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/* 80024424 00021364 98 6D 87 E6 */ stb r3, lbl_80450D66-_SDA_BASE_(r13)
/* 80024428 00021368 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002442C.s
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/* 8002442C 0002136C 7C 69 03 A6 */ mtctr r3
/* 80024430 00021370 2C 03 00 00 */ cmpwi r3, 0
/* 80024434 00021374 40 81 00 24 */ ble lbl_80024458
lbl_80024438:
/* 80024438 00021378 88 04 00 00 */ lbz r0, 0(r4)
/* 8002443C 0002137C 54 00 06 BE */ clrlwi r0, r0, 0x1a
/* 80024440 00021380 7C 05 00 00 */ cmpw r5, r0
/* 80024444 00021384 40 82 00 0C */ bne lbl_80024450
/* 80024448 00021388 38 60 00 01 */ li r3, 1
/* 8002444C 0002138C 4E 80 00 20 */ blr
lbl_80024450:
/* 80024450 00021390 38 84 00 01 */ addi r4, r4, 1
/* 80024454 00021394 42 00 FF E4 */ bdnz lbl_80024438
lbl_80024458:
/* 80024458 00021398 38 60 00 00 */ li r3, 0
/* 8002445C 0002139C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024460.s
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/* 80024460 000213A0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024464 000213A4 7C 08 02 A6 */ mflr r0
/* 80024468 000213A8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8002446C 000213AC 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80024470 000213B0 93 C1 00 08 */ stw r30, 8(r1)
/* 80024474 000213B4 7C 7E 1B 78 */ mr r30, r3
/* 80024478 000213B8 38 60 00 04 */ li r3, 4
/* 8002447C 000213BC 38 80 FF FC */ li r4, -4
/* 80024480 000213C0 38 A0 00 00 */ li r5, 0
/* 80024484 000213C4 48 2A 9F F1 */ bl alloc__7JKRHeapFUliP7JKRHeap
/* 80024488 000213C8 7C 7F 1B 79 */ or. r31, r3, r3
/* 8002448C 000213CC 40 82 00 0C */ bne lbl_80024498
/* 80024490 000213D0 38 60 00 00 */ li r3, 0
/* 80024494 000213D4 48 00 00 3C */ b lbl_800244D0
lbl_80024498:
/* 80024498 000213D8 93 DF 00 00 */ stw r30, 0(r31)
/* 8002449C 000213DC 38 60 00 12 */ li r3, 0x12
/* 800244A0 000213E0 38 80 7F FF */ li r4, 0x7fff
/* 800244A4 000213E4 38 A0 00 00 */ li r5, 0
/* 800244A8 000213E8 7F E6 FB 78 */ mr r6, r31
/* 800244AC 000213EC 4B FF A8 D9 */ bl fopScnM_CreateReq
/* 800244B0 000213F0 2C 03 00 00 */ cmpwi r3, 0
/* 800244B4 000213F4 40 82 00 18 */ bne lbl_800244CC
/* 800244B8 000213F8 7F E3 FB 78 */ mr r3, r31
/* 800244BC 000213FC 38 80 00 00 */ li r4, 0
/* 800244C0 00021400 48 2A A0 41 */ bl free__7JKRHeapFPvP7JKRHeap
/* 800244C4 00021404 38 60 00 00 */ li r3, 0
/* 800244C8 00021408 48 00 00 08 */ b lbl_800244D0
lbl_800244CC:
/* 800244CC 0002140C 38 60 00 01 */ li r3, 1
lbl_800244D0:
/* 800244D0 00021410 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 800244D4 00021414 83 C1 00 08 */ lwz r30, 8(r1)
/* 800244D8 00021418 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800244DC 0002141C 7C 08 03 A6 */ mtlr r0
/* 800244E0 00021420 38 21 00 10 */ addi r1, r1, 0x10
/* 800244E4 00021424 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800244E8.s
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/* 800244E8 00021428 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 800244EC 0002142C 38 63 60 94 */ addi r3, r3, lbl_803F6094@l
/* 800244F0 00021430 1C 04 04 04 */ mulli r0, r4, 0x404
/* 800244F4 00021434 7C 63 02 14 */ add r3, r3, r0
/* 800244F8 00021438 88 63 03 F4 */ lbz r3, 0x3f4(r3)
/* 800244FC 0002143C 54 60 07 39 */ rlwinm. r0, r3, 0, 0x1c, 0x1c
/* 80024500 00021440 41 82 00 0C */ beq lbl_8002450C
/* 80024504 00021444 38 60 00 00 */ li r3, 0
/* 80024508 00021448 4E 80 00 20 */ blr
lbl_8002450C:
/* 8002450C 0002144C 54 63 06 F6 */ rlwinm r3, r3, 0, 0x1b, 0x1b
/* 80024510 00021450 30 03 FF FF */ addic r0, r3, -1
/* 80024514 00021454 7C 60 19 10 */ subfe r3, r0, r3
/* 80024518 00021458 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002451C.s
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/* 8002451C 0002145C 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 80024520 00021460 7C 08 02 A6 */ mflr r0
/* 80024524 00021464 90 01 00 34 */ stw r0, 0x34(r1)
/* 80024528 00021468 39 61 00 30 */ addi r11, r1, 0x30
/* 8002452C 0002146C 48 33 DC 9D */ bl _savegpr_24
/* 80024530 00021470 7C 9A 23 78 */ mr r26, r4
/* 80024534 00021474 7C BB 2B 78 */ mr r27, r5
/* 80024538 00021478 7C DC 33 78 */ mr r28, r6
/* 8002453C 0002147C 88 0D 80 70 */ lbz r0, lbl_804505F0-_SDA_BASE_(r13)
/* 80024540 00021480 7C 00 07 75 */ extsb. r0, r0
/* 80024544 00021484 40 80 00 18 */ bge lbl_8002455C
/* 80024548 00021488 88 0D 87 E8 */ lbz r0, lbl_80450D68-_SDA_BASE_(r13)
/* 8002454C 0002148C 28 00 00 00 */ cmplwi r0, 0
/* 80024550 00021490 41 82 00 0C */ beq lbl_8002455C
/* 80024554 00021494 38 60 00 00 */ li r3, 0
/* 80024558 00021498 48 00 01 AC */ b lbl_80024704
lbl_8002455C:
/* 8002455C 0002149C 38 60 00 00 */ li r3, 0
/* 80024560 000214A0 3C 80 80 3F */ lis r4, lbl_803F6094@ha
/* 80024564 000214A4 38 A4 60 94 */ addi r5, r4, lbl_803F6094@l
/* 80024568 000214A8 38 00 00 40 */ li r0, 0x40
/* 8002456C 000214AC 7C 09 03 A6 */ mtctr r0
lbl_80024570:
/* 80024570 000214B0 7C 85 1A 14 */ add r4, r5, r3
/* 80024574 000214B4 88 04 03 F4 */ lbz r0, 0x3f4(r4)
/* 80024578 000214B8 54 00 07 7D */ rlwinm. r0, r0, 0, 0x1d, 0x1e
/* 8002457C 000214BC 41 82 00 0C */ beq lbl_80024588
/* 80024580 000214C0 38 60 00 00 */ li r3, 0
/* 80024584 000214C4 48 00 01 80 */ b lbl_80024704
lbl_80024588:
/* 80024588 000214C8 38 63 04 04 */ addi r3, r3, 0x404
/* 8002458C 000214CC 42 00 FF E4 */ bdnz lbl_80024570
/* 80024590 000214D0 3B 00 00 01 */ li r24, 1
/* 80024594 000214D4 3B E0 00 00 */ li r31, 0
/* 80024598 000214D8 3B 20 00 00 */ li r25, 0
/* 8002459C 000214DC 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 800245A0 000214E0 3B A3 60 94 */ addi r29, r3, lbl_803F6094@l
lbl_800245A4:
/* 800245A4 000214E4 7C 7D CA 14 */ add r3, r29, r25
/* 800245A8 000214E8 3B C3 03 F4 */ addi r30, r3, 0x3f4
/* 800245AC 000214EC 88 03 03 F4 */ lbz r0, 0x3f4(r3)
/* 800245B0 000214F0 54 00 07 FF */ clrlwi. r0, r0, 0x1f
/* 800245B4 000214F4 41 82 00 2C */ beq lbl_800245E0
/* 800245B8 000214F8 7F 43 D3 78 */ mr r3, r26
/* 800245BC 000214FC 7F 64 DB 78 */ mr r4, r27
/* 800245C0 00021500 7F E5 FB 78 */ mr r5, r31
/* 800245C4 00021504 4B FF FE 69 */ bl stayRoomCheck
/* 800245C8 00021508 2C 03 00 00 */ cmpwi r3, 0
/* 800245CC 0002150C 40 82 00 14 */ bne lbl_800245E0
/* 800245D0 00021510 88 1E 00 00 */ lbz r0, 0(r30)
/* 800245D4 00021514 60 00 00 0C */ ori r0, r0, 0xc
/* 800245D8 00021518 98 1E 00 00 */ stb r0, 0(r30)
/* 800245DC 0002151C 3B 00 00 00 */ li r24, 0
lbl_800245E0:
/* 800245E0 00021520 3B FF 00 01 */ addi r31, r31, 1
/* 800245E4 00021524 2C 1F 00 40 */ cmpwi r31, 0x40
/* 800245E8 00021528 3B 39 04 04 */ addi r25, r25, 0x404
/* 800245EC 0002152C 41 80 FF B8 */ blt lbl_800245A4
/* 800245F0 00021530 2C 18 00 00 */ cmpwi r24, 0
/* 800245F4 00021534 40 82 00 0C */ bne lbl_80024600
/* 800245F8 00021538 38 60 00 00 */ li r3, 0
/* 800245FC 0002153C 48 00 01 08 */ b lbl_80024704
lbl_80024600:
/* 80024600 00021540 3B A0 00 00 */ li r29, 0
/* 80024604 00021544 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 80024608 00021548 3B E3 60 94 */ addi r31, r3, lbl_803F6094@l
/* 8002460C 0002154C 7F 79 DB 78 */ mr r25, r27
/* 80024610 00021550 48 00 00 E8 */ b lbl_800246F8
lbl_80024614:
/* 80024614 00021554 88 19 00 00 */ lbz r0, 0(r25)
/* 80024618 00021558 54 03 06 BE */ clrlwi r3, r0, 0x1a
/* 8002461C 0002155C 38 00 00 02 */ li r0, 2
/* 80024620 00021560 1F 03 04 04 */ mulli r24, r3, 0x404
/* 80024624 00021564 7C 9F C2 14 */ add r4, r31, r24
/* 80024628 00021568 98 04 03 F6 */ stb r0, 0x3f6(r4)
/* 8002462C 0002156C 3B C4 03 F4 */ addi r30, r4, 0x3f4
/* 80024630 00021570 88 84 03 F4 */ lbz r4, 0x3f4(r4)
/* 80024634 00021574 54 80 07 FF */ clrlwi. r0, r4, 0x1f
/* 80024638 00021578 40 82 00 78 */ bne lbl_800246B0
/* 8002463C 0002157C 57 80 06 3F */ clrlwi. r0, r28, 0x18
/* 80024640 00021580 41 82 00 2C */ beq lbl_8002466C
/* 80024644 00021584 88 19 00 00 */ lbz r0, 0(r25)
/* 80024648 00021588 54 00 06 31 */ rlwinm. r0, r0, 0, 0x18, 0x18
/* 8002464C 0002158C 41 82 00 A4 */ beq lbl_800246F0
/* 80024650 00021590 4B FF FE 11 */ bl createRoomScene
/* 80024654 00021594 2C 03 00 00 */ cmpwi r3, 0
/* 80024658 00021598 41 82 00 98 */ beq lbl_800246F0
/* 8002465C 0002159C 88 1E 00 00 */ lbz r0, 0(r30)
/* 80024660 000215A0 60 00 00 02 */ ori r0, r0, 2
/* 80024664 000215A4 98 1E 00 00 */ stb r0, 0(r30)
/* 80024668 000215A8 48 00 00 88 */ b lbl_800246F0
lbl_8002466C:
/* 8002466C 000215AC 4B FF FD F5 */ bl createRoomScene
/* 80024670 000215B0 2C 03 00 00 */ cmpwi r3, 0
/* 80024674 000215B4 41 82 00 34 */ beq lbl_800246A8
/* 80024678 000215B8 7C 1B E8 AE */ lbzx r0, r27, r29
/* 8002467C 000215BC 54 00 06 31 */ rlwinm. r0, r0, 0, 0x18, 0x18
/* 80024680 000215C0 38 80 00 4A */ li r4, 0x4a
/* 80024684 000215C4 41 82 00 08 */ beq lbl_8002468C
/* 80024688 000215C8 38 80 00 02 */ li r4, 2
lbl_8002468C:
/* 8002468C 000215CC 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 80024690 000215D0 38 03 60 94 */ addi r0, r3, lbl_803F6094@l
/* 80024694 000215D4 7C A0 C2 14 */ add r5, r0, r24
/* 80024698 000215D8 88 65 03 F4 */ lbz r3, 0x3f4(r5)
/* 8002469C 000215DC 54 80 06 3E */ clrlwi r0, r4, 0x18
/* 800246A0 000215E0 7C 60 03 78 */ or r0, r3, r0
/* 800246A4 000215E4 98 05 03 F4 */ stb r0, 0x3f4(r5)
lbl_800246A8:
/* 800246A8 000215E8 38 60 00 01 */ li r3, 1
/* 800246AC 000215EC 48 00 00 58 */ b lbl_80024704
lbl_800246B0:
/* 800246B0 000215F0 88 19 00 00 */ lbz r0, 0(r25)
/* 800246B4 000215F4 54 00 06 31 */ rlwinm. r0, r0, 0, 0x18, 0x18
/* 800246B8 000215F8 41 82 00 1C */ beq lbl_800246D4
/* 800246BC 000215FC 54 80 06 73 */ rlwinm. r0, r4, 0, 0x19, 0x19
/* 800246C0 00021600 41 82 00 30 */ beq lbl_800246F0
/* 800246C4 00021604 38 00 FF B7 */ li r0, -73
/* 800246C8 00021608 7C 80 00 38 */ and r0, r4, r0
/* 800246CC 0002160C 98 1E 00 00 */ stb r0, 0(r30)
/* 800246D0 00021610 48 00 00 20 */ b lbl_800246F0
lbl_800246D4:
/* 800246D4 00021614 54 80 06 75 */ rlwinm. r0, r4, 0, 0x19, 0x1a
/* 800246D8 00021618 40 82 00 10 */ bne lbl_800246E8
/* 800246DC 0002161C 60 80 00 48 */ ori r0, r4, 0x48
/* 800246E0 00021620 98 1E 00 00 */ stb r0, 0(r30)
/* 800246E4 00021624 48 00 00 0C */ b lbl_800246F0
lbl_800246E8:
/* 800246E8 00021628 60 80 00 40 */ ori r0, r4, 0x40
/* 800246EC 0002162C 98 1E 00 00 */ stb r0, 0(r30)
lbl_800246F0:
/* 800246F0 00021630 3B BD 00 01 */ addi r29, r29, 1
/* 800246F4 00021634 3B 39 00 01 */ addi r25, r25, 1
lbl_800246F8:
/* 800246F8 00021638 7C 1D D0 00 */ cmpw r29, r26
/* 800246FC 0002163C 41 80 FF 18 */ blt lbl_80024614
/* 80024700 00021640 38 60 00 01 */ li r3, 1
lbl_80024704:
/* 80024704 00021644 39 61 00 30 */ addi r11, r1, 0x30
/* 80024708 00021648 48 33 DB 0D */ bl _restgpr_24
/* 8002470C 0002164C 80 01 00 34 */ lwz r0, 0x34(r1)
/* 80024710 00021650 7C 08 03 A6 */ mtlr r0
/* 80024714 00021654 38 21 00 30 */ addi r1, r1, 0x30
/* 80024718 00021658 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002471C.s
+74
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@@ -0,0 +1,74 @@
/* 8002471C 0002165C 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80024720 00021660 7C 08 02 A6 */ mflr r0
/* 80024724 00021664 90 01 00 24 */ stw r0, 0x24(r1)
/* 80024728 00021668 39 61 00 20 */ addi r11, r1, 0x20
/* 8002472C 0002166C 48 33 DA AD */ bl _savegpr_28
/* 80024730 00021670 7C 9C 23 78 */ mr r28, r4
/* 80024734 00021674 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 80024738 00021678 38 03 60 94 */ addi r0, r3, lbl_803F6094@l
/* 8002473C 0002167C 7C 1E 03 78 */ mr r30, r0
/* 80024740 00021680 3B A0 00 00 */ li r29, 0
/* 80024744 00021684 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024748 00021688 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 8002474C 0002168C 3B E3 4E 20 */ addi r31, r3, 0x4e20
lbl_80024750:
/* 80024750 00021690 88 7E 03 F7 */ lbz r3, 0x3f7(r30)
/* 80024754 00021694 7C 60 07 75 */ extsb. r0, r3
/* 80024758 00021698 41 80 00 B4 */ blt lbl_8002480C
/* 8002475C 0002169C 88 1E 03 F6 */ lbz r0, 0x3f6(r30)
/* 80024760 000216A0 7C 00 07 75 */ extsb. r0, r0
/* 80024764 000216A4 40 81 00 A8 */ ble lbl_8002480C
/* 80024768 000216A8 7C 60 07 74 */ extsb r0, r3
/* 8002476C 000216AC 54 04 28 34 */ slwi r4, r0, 5
/* 80024770 000216B0 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024774 000216B4 38 03 61 C0 */ addi r0, r3, g_dComIfG_gameInfo@l
/* 80024778 000216B8 7C 60 22 14 */ add r3, r0, r4
/* 8002477C 000216BC 38 63 09 B6 */ addi r3, r3, 0x9b6
/* 80024780 000216C0 48 01 05 6D */ bl clearRoomSwitch__13dSv_zoneBit_cFv
/* 80024784 000216C4 88 1E 03 F7 */ lbz r0, 0x3f7(r30)
/* 80024788 000216C8 7C 00 07 74 */ extsb r0, r0
/* 8002478C 000216CC 54 04 28 34 */ slwi r4, r0, 5
/* 80024790 000216D0 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024794 000216D4 38 03 61 C0 */ addi r0, r3, g_dComIfG_gameInfo@l
/* 80024798 000216D8 7C 60 22 14 */ add r3, r0, r4
/* 8002479C 000216DC 38 63 09 B6 */ addi r3, r3, 0x9b6
/* 800247A0 000216E0 48 01 05 59 */ bl clearRoomItem__13dSv_zoneBit_cFv
/* 800247A4 000216E4 7F E3 FB 78 */ mr r3, r31
/* 800247A8 000216E8 81 9F 00 00 */ lwz r12, 0(r31)
/* 800247AC 000216EC 81 8C 00 BC */ lwz r12, 0xbc(r12)
/* 800247B0 000216F0 7D 89 03 A6 */ mtctr r12
/* 800247B4 000216F4 4E 80 04 21 */ bctrl
/* 800247B8 000216F8 80 03 00 0C */ lwz r0, 0xc(r3)
/* 800247BC 000216FC 54 00 87 7F */ rlwinm. r0, r0, 0x10, 0x1d, 0x1f
/* 800247C0 00021700 41 82 00 4C */ beq lbl_8002480C
/* 800247C4 00021704 88 0D 87 E5 */ lbz r0, lbl_80450D65-_SDA_BASE_(r13)
/* 800247C8 00021708 7C 00 07 74 */ extsb r0, r0
/* 800247CC 0002170C 7C 1C 00 00 */ cmpw r28, r0
/* 800247D0 00021710 41 82 00 3C */ beq lbl_8002480C
/* 800247D4 00021714 88 7E 03 F6 */ lbz r3, 0x3f6(r30)
/* 800247D8 00021718 38 03 FF FF */ addi r0, r3, -1
/* 800247DC 0002171C 98 1E 03 F6 */ stb r0, 0x3f6(r30)
/* 800247E0 00021720 7C 00 07 75 */ extsb. r0, r0
/* 800247E4 00021724 40 82 00 28 */ bne lbl_8002480C
/* 800247E8 00021728 38 A0 FF FF */ li r5, -1
/* 800247EC 0002172C 88 1E 03 F7 */ lbz r0, 0x3f7(r30)
/* 800247F0 00021730 7C 00 07 74 */ extsb r0, r0
/* 800247F4 00021734 54 04 28 34 */ slwi r4, r0, 5
/* 800247F8 00021738 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800247FC 0002173C 38 03 61 C0 */ addi r0, r3, g_dComIfG_gameInfo@l
/* 80024800 00021740 7C 60 22 14 */ add r3, r0, r4
/* 80024804 00021744 98 A3 09 B4 */ stb r5, 0x9b4(r3)
/* 80024808 00021748 98 BE 03 F7 */ stb r5, 0x3f7(r30)
lbl_8002480C:
/* 8002480C 0002174C 3B BD 00 01 */ addi r29, r29, 1
/* 80024810 00021750 2C 1D 00 40 */ cmpwi r29, 0x40
/* 80024814 00021754 3B DE 04 04 */ addi r30, r30, 0x404
/* 80024818 00021758 41 80 FF 38 */ blt lbl_80024750
/* 8002481C 0002175C 7F 83 E3 78 */ mr r3, r28
/* 80024820 00021760 4B FF FB C9 */ bl dStage_roomControl_c_NS_setStayNo
/* 80024824 00021764 39 61 00 20 */ addi r11, r1, 0x20
/* 80024828 00021768 48 33 D9 FD */ bl _restgpr_28
/* 8002482C 0002176C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80024830 00021770 7C 08 03 A6 */ mtlr r0
/* 80024834 00021774 38 21 00 20 */ addi r1, r1, 0x20
/* 80024838 00021778 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002483C.s
+2
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@@ -0,0 +1,2 @@
/* 8002483C 0002177C 80 63 00 5C */ lwz r3, 0x5c(r3)
/* 80024840 00021780 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024844.s
+26
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@@ -0,0 +1,26 @@
/* 80024844 00021784 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80024848 00021788 7C 08 02 A6 */ mflr r0
/* 8002484C 0002178C 90 01 00 24 */ stw r0, 0x24(r1)
/* 80024850 00021790 39 61 00 20 */ addi r11, r1, 0x20
/* 80024854 00021794 48 33 D9 89 */ bl _savegpr_29
/* 80024858 00021798 7C 9D 23 78 */ mr r29, r4
/* 8002485C 0002179C 54 7E 10 3A */ slwi r30, r3, 2
/* 80024860 000217A0 3C 60 80 3A */ lis r3, lbl_803A6920@ha
/* 80024864 000217A4 3B E3 69 20 */ addi r31, r3, lbl_803A6920@l
/* 80024868 000217A8 7C 1F F0 2E */ lwzx r0, r31, r30
/* 8002486C 000217AC 28 00 00 00 */ cmplwi r0, 0
/* 80024870 000217B0 40 82 00 1C */ bne lbl_8002488C
/* 80024874 000217B4 4B FE A5 79 */ bl mDoExt_getArchiveHeap
/* 80024878 000217B8 7C 64 1B 78 */ mr r4, r3
/* 8002487C 000217BC 7F A3 EB 78 */ mr r3, r29
/* 80024880 000217C0 38 A0 00 00 */ li r5, 0
/* 80024884 000217C4 48 2A A5 A9 */ bl create__10JKRExpHeapFUlP7JKRHeapb
/* 80024888 000217C8 7C 7F F1 2E */ stwx r3, r31, r30
lbl_8002488C:
/* 8002488C 000217CC 7C 7F F0 2E */ lwzx r3, r31, r30
/* 80024890 000217D0 39 61 00 20 */ addi r11, r1, 0x20
/* 80024894 000217D4 48 33 D9 95 */ bl _restgpr_29
/* 80024898 000217D8 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8002489C 000217DC 7C 08 03 A6 */ mtlr r0
/* 800248A0 000217E0 38 21 00 20 */ addi r1, r1, 0x20
/* 800248A4 000217E4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800248A8.s
+27
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@@ -0,0 +1,27 @@
/* 800248A8 000217E8 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800248AC 000217EC 7C 08 02 A6 */ mflr r0
/* 800248B0 000217F0 90 01 00 24 */ stw r0, 0x24(r1)
/* 800248B4 000217F4 39 61 00 20 */ addi r11, r1, 0x20
/* 800248B8 000217F8 48 33 D9 21 */ bl _savegpr_28
/* 800248BC 000217FC 3B 80 00 00 */ li r28, 0
/* 800248C0 00021800 3B E0 00 00 */ li r31, 0
/* 800248C4 00021804 3C 60 80 3A */ lis r3, lbl_803A6920@ha
/* 800248C8 00021808 3B A3 69 20 */ addi r29, r3, lbl_803A6920@l
/* 800248CC 0002180C 7F FE FB 78 */ mr r30, r31
lbl_800248D0:
/* 800248D0 00021810 7C 7D F8 2E */ lwzx r3, r29, r31
/* 800248D4 00021814 28 03 00 00 */ cmplwi r3, 0
/* 800248D8 00021818 41 82 00 0C */ beq lbl_800248E4
/* 800248DC 0002181C 4B FE A8 D1 */ bl mDoExt_destroyExpHeap
/* 800248E0 00021820 7F DD F9 2E */ stwx r30, r29, r31
lbl_800248E4:
/* 800248E4 00021824 3B 9C 00 01 */ addi r28, r28, 1
/* 800248E8 00021828 2C 1C 00 13 */ cmpwi r28, 0x13
/* 800248EC 0002182C 3B FF 00 04 */ addi r31, r31, 4
/* 800248F0 00021830 41 80 FF E0 */ blt lbl_800248D0
/* 800248F4 00021834 39 61 00 20 */ addi r11, r1, 0x20
/* 800248F8 00021838 48 33 D9 2D */ bl _restgpr_28
/* 800248FC 0002183C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80024900 00021840 7C 08 03 A6 */ mtlr r0
/* 80024904 00021844 38 21 00 20 */ addi r1, r1, 0x20
/* 80024908 00021848 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002490C.s
+13
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@@ -0,0 +1,13 @@
/* 8002490C 0002184C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024910 00021850 7C 08 02 A6 */ mflr r0
/* 80024914 00021854 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024918 00021858 1C A3 00 0A */ mulli r5, r3, 0xa
/* 8002491C 0002185C 3C 60 80 3A */ lis r3, lbl_803A696C@ha
/* 80024920 00021860 38 03 69 6C */ addi r0, r3, lbl_803A696C@l
/* 80024924 00021864 7C 60 2A 14 */ add r3, r0, r5
/* 80024928 00021868 38 A0 00 09 */ li r5, 9
/* 8002492C 0002186C 48 34 41 BD */ bl func_80368AE8
/* 80024930 00021870 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024934 00021874 7C 08 03 A6 */ mtlr r0
/* 80024938 00021878 38 21 00 10 */ addi r1, r1, 0x10
/* 8002493C 0002187C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024940.s
+5
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@@ -0,0 +1,5 @@
/* 80024940 00021880 1C 83 00 0A */ mulli r4, r3, 0xa
/* 80024944 00021884 3C 60 80 3A */ lis r3, lbl_803A696C@ha
/* 80024948 00021888 38 03 69 6C */ addi r0, r3, lbl_803A696C@l
/* 8002494C 0002188C 7C 60 22 14 */ add r3, r0, r4
/* 80024950 00021890 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024954.s
+62
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/* 80024954 00021894 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80024958 00021898 7C 08 02 A6 */ mflr r0
/* 8002495C 0002189C 90 01 00 24 */ stw r0, 0x24(r1)
/* 80024960 000218A0 39 61 00 20 */ addi r11, r1, 0x20
/* 80024964 000218A4 48 33 D8 75 */ bl _savegpr_28
/* 80024968 000218A8 7C 7D 1B 78 */ mr r29, r3
/* 8002496C 000218AC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024970 000218B0 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 80024974 000218B4 3F C3 00 02 */ addis r30, r3, 2
/* 80024978 000218B8 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 8002497C 000218BC 3B E3 8A 50 */ addi r31, r3, lbl_80378A50@l
/* 80024980 000218C0 3B DE C2 F8 */ addi r30, r30, -15624
/* 80024984 000218C4 48 00 00 8C */ b lbl_80024A10
lbl_80024988:
/* 80024988 000218C8 7F A3 EB 78 */ mr r3, r29
/* 8002498C 000218CC 4B FF FF B5 */ bl dStage_roomControl_c_NS_getArcBank
/* 80024990 000218D0 7C 7C 1B 78 */ mr r28, r3
/* 80024994 000218D4 38 9F 00 9F */ addi r4, r31, 0x9f
/* 80024998 000218D8 48 34 3F FD */ bl strcmp
/* 8002499C 000218DC 2C 03 00 00 */ cmpwi r3, 0
/* 800249A0 000218E0 41 82 00 6C */ beq lbl_80024A0C
/* 800249A4 000218E4 7F 83 E3 78 */ mr r3, r28
/* 800249A8 000218E8 7F C4 F3 78 */ mr r4, r30
/* 800249AC 000218EC 38 A0 00 80 */ li r5, 0x80
/* 800249B0 000218F0 48 01 77 B1 */ bl dRes_control_c_NS_syncRes
/* 800249B4 000218F4 2C 03 00 00 */ cmpwi r3, 0
/* 800249B8 000218F8 40 80 00 24 */ bge lbl_800249DC
/* 800249BC 000218FC 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 800249C0 00021900 38 63 8A 50 */ addi r3, r3, lbl_80378A50@l
/* 800249C4 00021904 38 63 00 A0 */ addi r3, r3, 0xa0
/* 800249C8 00021908 7F A4 EB 78 */ mr r4, r29
/* 800249CC 0002190C 7F 85 E3 78 */ mr r5, r28
/* 800249D0 00021910 4C C6 31 82 */ crclr 6
/* 800249D4 00021914 4B FE 22 39 */ bl OSReport_Error
/* 800249D8 00021918 48 00 00 34 */ b lbl_80024A0C
lbl_800249DC:
/* 800249DC 0002191C 40 81 00 0C */ ble lbl_800249E8
/* 800249E0 00021920 38 60 00 00 */ li r3, 0
/* 800249E4 00021924 48 00 00 38 */ b lbl_80024A1C
lbl_800249E8:
/* 800249E8 00021928 7F 83 E3 78 */ mr r3, r28
/* 800249EC 0002192C 7F C4 F3 78 */ mr r4, r30
/* 800249F0 00021930 38 A0 00 80 */ li r5, 0x80
/* 800249F4 00021934 48 01 77 A1 */ bl dRes_control_c_NS_deleteRes
/* 800249F8 00021938 7F A3 EB 78 */ mr r3, r29
/* 800249FC 0002193C 3C 80 80 38 */ lis r4, lbl_80378A50@ha
/* 80024A00 00021940 38 84 8A 50 */ addi r4, r4, lbl_80378A50@l
/* 80024A04 00021944 38 84 00 9F */ addi r4, r4, 0x9f
/* 80024A08 00021948 4B FF FF 05 */ bl dStage_roomControl_c_NS_setArcBank
lbl_80024A0C:
/* 80024A0C 0002194C 3B BD 00 01 */ addi r29, r29, 1
lbl_80024A10:
/* 80024A10 00021950 2C 1D 00 20 */ cmpwi r29, 0x20
/* 80024A14 00021954 41 80 FF 74 */ blt lbl_80024988
/* 80024A18 00021958 38 60 00 01 */ li r3, 1
lbl_80024A1C:
/* 80024A1C 0002195C 39 61 00 20 */ addi r11, r1, 0x20
/* 80024A20 00021960 48 33 D8 05 */ bl _restgpr_28
/* 80024A24 00021964 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80024A28 00021968 7C 08 03 A6 */ mtlr r0
/* 80024A2C 0002196C 38 21 00 20 */ addi r1, r1, 0x20
/* 80024A30 00021970 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024A34.s
+37
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@@ -0,0 +1,37 @@
/* 80024A34 00021974 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024A38 00021978 7C 08 02 A6 */ mflr r0
/* 80024A3C 0002197C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024A40 00021980 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80024A44 00021984 93 C1 00 08 */ stw r30, 8(r1)
/* 80024A48 00021988 7C 7E 1B 78 */ mr r30, r3
/* 80024A4C 0002198C 7C 9F 23 78 */ mr r31, r4
/* 80024A50 00021990 4B FE A3 9D */ bl mDoExt_getArchiveHeap
/* 80024A54 00021994 7C 64 1B 78 */ mr r4, r3
/* 80024A58 00021998 57 E3 15 BA */ rlwinm r3, r31, 2, 0x16, 0x1d
/* 80024A5C 0002199C 38 A0 FF FC */ li r5, -4
/* 80024A60 000219A0 48 2A A2 B1 */ bl __nwa__FUlP7JKRHeapi
/* 80024A64 000219A4 90 7E 00 04 */ stw r3, 4(r30)
/* 80024A68 000219A8 80 1E 00 04 */ lwz r0, 4(r30)
/* 80024A6C 000219AC 28 00 00 00 */ cmplwi r0, 0
/* 80024A70 000219B0 41 82 00 34 */ beq lbl_80024AA4
/* 80024A74 000219B4 7C 05 03 78 */ mr r5, r0
/* 80024A78 000219B8 38 C0 00 00 */ li r6, 0
/* 80024A7C 000219BC 38 80 00 00 */ li r4, 0
/* 80024A80 000219C0 57 E0 06 3E */ clrlwi r0, r31, 0x18
/* 80024A84 000219C4 48 00 00 10 */ b lbl_80024A94
lbl_80024A88:
/* 80024A88 000219C8 90 85 00 00 */ stw r4, 0(r5)
/* 80024A8C 000219CC 38 A5 00 04 */ addi r5, r5, 4
/* 80024A90 000219D0 38 C6 00 01 */ addi r6, r6, 1
lbl_80024A94:
/* 80024A94 000219D4 54 C3 06 3E */ clrlwi r3, r6, 0x18
/* 80024A98 000219D8 7C 03 00 40 */ cmplw r3, r0
/* 80024A9C 000219DC 41 80 FF EC */ blt lbl_80024A88
/* 80024AA0 000219E0 9B FE 00 00 */ stb r31, 0(r30)
lbl_80024AA4:
/* 80024AA4 000219E4 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80024AA8 000219E8 83 C1 00 08 */ lwz r30, 8(r1)
/* 80024AAC 000219EC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024AB0 000219F0 7C 08 03 A6 */ mtlr r0
/* 80024AB4 000219F4 38 21 00 10 */ addi r1, r1, 0x10
/* 80024AB8 000219F8 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024ABC.s
+38
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@@ -0,0 +1,38 @@
/* 80024ABC 000219FC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80024AC0 00021A00 7C 08 02 A6 */ mflr r0
/* 80024AC4 00021A04 90 01 00 24 */ stw r0, 0x24(r1)
/* 80024AC8 00021A08 39 61 00 20 */ addi r11, r1, 0x20
/* 80024ACC 00021A0C 48 33 D7 0D */ bl _savegpr_28
/* 80024AD0 00021A10 7C 7C 1B 78 */ mr r28, r3
/* 80024AD4 00021A14 88 03 00 00 */ lbz r0, 0(r3)
/* 80024AD8 00021A18 28 00 00 00 */ cmplwi r0, 0
/* 80024ADC 00021A1C 41 82 00 50 */ beq lbl_80024B2C
/* 80024AE0 00021A20 83 DC 00 04 */ lwz r30, 4(r28)
/* 80024AE4 00021A24 3B A0 00 00 */ li r29, 0
/* 80024AE8 00021A28 48 00 00 24 */ b lbl_80024B0C
lbl_80024AEC:
/* 80024AEC 00021A2C 83 FE 00 00 */ lwz r31, 0(r30)
/* 80024AF0 00021A30 28 1F 00 00 */ cmplwi r31, 0
/* 80024AF4 00021A34 41 82 00 10 */ beq lbl_80024B04
/* 80024AF8 00021A38 4B FE A2 F5 */ bl mDoExt_getArchiveHeap
/* 80024AFC 00021A3C 7F E4 FB 78 */ mr r4, r31
/* 80024B00 00021A40 48 2A 9A 49 */ bl free__7JKRHeapFPv
lbl_80024B04:
/* 80024B04 00021A44 3B DE 00 04 */ addi r30, r30, 4
/* 80024B08 00021A48 3B BD 00 01 */ addi r29, r29, 1
lbl_80024B0C:
/* 80024B0C 00021A4C 57 A3 06 3E */ clrlwi r3, r29, 0x18
/* 80024B10 00021A50 88 1C 00 00 */ lbz r0, 0(r28)
/* 80024B14 00021A54 7C 03 00 40 */ cmplw r3, r0
/* 80024B18 00021A58 41 80 FF D4 */ blt lbl_80024AEC
/* 80024B1C 00021A5C 80 7C 00 04 */ lwz r3, 4(r28)
/* 80024B20 00021A60 48 2A A2 41 */ bl __dla__FPv
/* 80024B24 00021A64 38 00 00 00 */ li r0, 0
/* 80024B28 00021A68 98 1C 00 00 */ stb r0, 0(r28)
lbl_80024B2C:
/* 80024B2C 00021A6C 39 61 00 20 */ addi r11, r1, 0x20
/* 80024B30 00021A70 48 33 D6 F5 */ bl _restgpr_28
/* 80024B34 00021A74 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80024B38 00021A78 7C 08 03 A6 */ mtlr r0
/* 80024B3C 00021A7C 38 21 00 20 */ addi r1, r1, 0x20
/* 80024B40 00021A80 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024B44.s
+57
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/* 80024B44 00021A84 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 80024B48 00021A88 7C 08 02 A6 */ mflr r0
/* 80024B4C 00021A8C 90 01 00 34 */ stw r0, 0x34(r1)
/* 80024B50 00021A90 39 61 00 30 */ addi r11, r1, 0x30
/* 80024B54 00021A94 48 33 D6 85 */ bl _savegpr_28
/* 80024B58 00021A98 7C A6 2B 78 */ mr r6, r5
/* 80024B5C 00021A9C 88 03 00 00 */ lbz r0, 0(r3)
/* 80024B60 00021AA0 28 00 00 00 */ cmplwi r0, 0
/* 80024B64 00021AA4 40 82 00 0C */ bne lbl_80024B70
/* 80024B68 00021AA8 38 60 00 00 */ li r3, 0
/* 80024B6C 00021AAC 48 00 00 98 */ b lbl_80024C04
lbl_80024B70:
/* 80024B70 00021AB0 83 A3 00 04 */ lwz r29, 4(r3)
/* 80024B74 00021AB4 54 9E 15 BA */ rlwinm r30, r4, 2, 0x16, 0x1d
/* 80024B78 00021AB8 7C 1D F0 2E */ lwzx r0, r29, r30
/* 80024B7C 00021ABC 28 00 00 00 */ cmplwi r0, 0
/* 80024B80 00021AC0 40 82 00 80 */ bne lbl_80024C00
/* 80024B84 00021AC4 38 61 00 08 */ addi r3, r1, 8
/* 80024B88 00021AC8 3C 80 80 38 */ lis r4, lbl_80378A50@ha
/* 80024B8C 00021ACC 38 84 8A 50 */ addi r4, r4, lbl_80378A50@l
/* 80024B90 00021AD0 38 84 00 C6 */ addi r4, r4, 0xc6
/* 80024B94 00021AD4 3C A0 80 40 */ lis r5, g_dComIfG_gameInfo@ha
/* 80024B98 00021AD8 38 A5 61 C0 */ addi r5, r5, g_dComIfG_gameInfo@l
/* 80024B9C 00021ADC 38 A5 4E 00 */ addi r5, r5, 0x4e00
/* 80024BA0 00021AE0 54 C6 06 3E */ clrlwi r6, r6, 0x18
/* 80024BA4 00021AE4 4C C6 31 82 */ crclr 6
/* 80024BA8 00021AE8 48 34 19 35 */ bl func_803664DC
/* 80024BAC 00021AEC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024BB0 00021AF0 3B E3 61 C0 */ addi r31, r3, g_dComIfG_gameInfo@l
/* 80024BB4 00021AF4 80 7F 5C 68 */ lwz r3, 0x5c68(r31)
/* 80024BB8 00021AF8 38 81 00 08 */ addi r4, r1, 8
/* 80024BBC 00021AFC 48 00 DB 7D */ bl dLib_getExpandSizeFromAramArchive__FP14JKRAramArchivePCc
/* 80024BC0 00021B00 7C 7C 1B 78 */ mr r28, r3
/* 80024BC4 00021B04 4B FE A2 29 */ bl mDoExt_getArchiveHeap
/* 80024BC8 00021B08 7F 84 E3 78 */ mr r4, r28
/* 80024BCC 00021B0C 38 A0 FF E0 */ li r5, -32
/* 80024BD0 00021B10 48 2A 99 05 */ bl alloc__7JKRHeapFUli
/* 80024BD4 00021B14 7C 7D F1 2E */ stwx r3, r29, r30
/* 80024BD8 00021B18 7C 9D F0 2E */ lwzx r4, r29, r30
/* 80024BDC 00021B1C 28 04 00 00 */ cmplwi r4, 0
/* 80024BE0 00021B20 41 82 00 20 */ beq lbl_80024C00
/* 80024BE4 00021B24 80 7F 5C 68 */ lwz r3, 0x5c68(r31)
/* 80024BE8 00021B28 7F 85 E3 78 */ mr r5, r28
/* 80024BEC 00021B2C 38 C1 00 08 */ addi r6, r1, 8
/* 80024BF0 00021B30 81 83 00 00 */ lwz r12, 0(r3)
/* 80024BF4 00021B34 81 8C 00 1C */ lwz r12, 0x1c(r12)
/* 80024BF8 00021B38 7D 89 03 A6 */ mtctr r12
/* 80024BFC 00021B3C 4E 80 04 21 */ bctrl
lbl_80024C00:
/* 80024C00 00021B40 7C 7D F0 2E */ lwzx r3, r29, r30
lbl_80024C04:
/* 80024C04 00021B44 39 61 00 30 */ addi r11, r1, 0x30
/* 80024C08 00021B48 48 33 D6 1D */ bl _restgpr_28
/* 80024C0C 00021B4C 80 01 00 34 */ lwz r0, 0x34(r1)
/* 80024C10 00021B50 7C 08 03 A6 */ mtlr r0
/* 80024C14 00021B54 38 21 00 30 */ addi r1, r1, 0x30
/* 80024C18 00021B58 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024C1C.s
+35
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/* 80024C1C 00021B5C 38 00 00 00 */ li r0, 0
/* 80024C20 00021B60 90 03 00 08 */ stw r0, 8(r3)
/* 80024C24 00021B64 90 03 00 0C */ stw r0, 0xc(r3)
/* 80024C28 00021B68 90 03 00 10 */ stw r0, 0x10(r3)
/* 80024C2C 00021B6C 90 03 00 14 */ stw r0, 0x14(r3)
/* 80024C30 00021B70 90 03 00 18 */ stw r0, 0x18(r3)
/* 80024C34 00021B74 90 03 00 1C */ stw r0, 0x1c(r3)
/* 80024C38 00021B78 90 03 00 20 */ stw r0, 0x20(r3)
/* 80024C3C 00021B7C 90 03 00 24 */ stw r0, 0x24(r3)
/* 80024C40 00021B80 90 03 00 28 */ stw r0, 0x28(r3)
/* 80024C44 00021B84 90 03 00 2C */ stw r0, 0x2c(r3)
/* 80024C48 00021B88 90 03 00 30 */ stw r0, 0x30(r3)
/* 80024C4C 00021B8C 90 03 00 34 */ stw r0, 0x34(r3)
/* 80024C50 00021B90 90 03 00 50 */ stw r0, 0x50(r3)
/* 80024C54 00021B94 90 03 00 38 */ stw r0, 0x38(r3)
/* 80024C58 00021B98 90 03 00 5C */ stw r0, 0x5c(r3)
/* 80024C5C 00021B9C 90 03 00 60 */ stw r0, 0x60(r3)
/* 80024C60 00021BA0 90 03 00 64 */ stw r0, 0x64(r3)
/* 80024C64 00021BA4 90 03 00 68 */ stw r0, 0x68(r3)
/* 80024C68 00021BA8 90 03 00 6C */ stw r0, 0x6c(r3)
/* 80024C6C 00021BAC 90 03 00 70 */ stw r0, 0x70(r3)
/* 80024C70 00021BB0 90 03 00 74 */ stw r0, 0x74(r3)
/* 80024C74 00021BB4 90 03 00 78 */ stw r0, 0x78(r3)
/* 80024C78 00021BB8 90 03 00 7C */ stw r0, 0x7c(r3)
/* 80024C7C 00021BBC 90 03 00 80 */ stw r0, 0x80(r3)
/* 80024C80 00021BC0 90 03 00 84 */ stw r0, 0x84(r3)
/* 80024C84 00021BC4 90 03 00 88 */ stw r0, 0x88(r3)
/* 80024C88 00021BC8 90 03 00 90 */ stw r0, 0x90(r3)
/* 80024C8C 00021BCC 90 03 00 94 */ stw r0, 0x94(r3)
/* 80024C90 00021BD0 90 03 00 98 */ stw r0, 0x98(r3)
/* 80024C94 00021BD4 90 03 00 9C */ stw r0, 0x9c(r3)
/* 80024C98 00021BD8 90 03 00 A0 */ stw r0, 0xa0(r3)
/* 80024C9C 00021BDC B0 03 00 56 */ sth r0, 0x56(r3)
/* 80024CA0 00021BE0 B0 03 00 58 */ sth r0, 0x58(r3)
/* 80024CA4 00021BE4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024CA8.s
+3
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/* 80024CA8 00021BE8 38 00 00 00 */ li r0, 0
/* 80024CAC 00021BEC 90 03 00 20 */ stw r0, 0x20(r3)
/* 80024CB0 00021BF0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024CB4.s
+23
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@@ -0,0 +1,23 @@
/* 80024CB4 00021BF4 38 00 00 00 */ li r0, 0
/* 80024CB8 00021BF8 90 03 00 08 */ stw r0, 8(r3)
/* 80024CBC 00021BFC 90 03 00 0C */ stw r0, 0xc(r3)
/* 80024CC0 00021C00 90 03 00 10 */ stw r0, 0x10(r3)
/* 80024CC4 00021C04 90 03 00 14 */ stw r0, 0x14(r3)
/* 80024CC8 00021C08 90 03 00 18 */ stw r0, 0x18(r3)
/* 80024CCC 00021C0C 90 03 00 1C */ stw r0, 0x1c(r3)
/* 80024CD0 00021C10 90 03 00 24 */ stw r0, 0x24(r3)
/* 80024CD4 00021C14 90 03 00 28 */ stw r0, 0x28(r3)
/* 80024CD8 00021C18 90 03 00 2C */ stw r0, 0x2c(r3)
/* 80024CDC 00021C1C 90 03 00 30 */ stw r0, 0x30(r3)
/* 80024CE0 00021C20 90 03 00 34 */ stw r0, 0x34(r3)
/* 80024CE4 00021C24 90 03 00 38 */ stw r0, 0x38(r3)
/* 80024CE8 00021C28 90 03 00 3C */ stw r0, 0x3c(r3)
/* 80024CEC 00021C2C 90 03 00 40 */ stw r0, 0x40(r3)
/* 80024CF0 00021C30 90 03 00 44 */ stw r0, 0x44(r3)
/* 80024CF4 00021C34 90 03 00 48 */ stw r0, 0x48(r3)
/* 80024CF8 00021C38 90 03 00 4C */ stw r0, 0x4c(r3)
/* 80024CFC 00021C3C 90 03 00 50 */ stw r0, 0x50(r3)
/* 80024D00 00021C40 90 03 00 54 */ stw r0, 0x54(r3)
/* 80024D04 00021C44 90 03 00 58 */ stw r0, 0x58(r3)
/* 80024D08 00021C48 90 03 00 5C */ stw r0, 0x5c(r3)
/* 80024D0C 00021C4C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024D10.s
+42
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/* 80024D10 00021C50 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80024D14 00021C54 7C 08 02 A6 */ mflr r0
/* 80024D18 00021C58 90 01 00 24 */ stw r0, 0x24(r1)
/* 80024D1C 00021C5C 39 61 00 20 */ addi r11, r1, 0x20
/* 80024D20 00021C60 48 33 D4 BD */ bl _savegpr_29
/* 80024D24 00021C64 7C 7D 1B 78 */ mr r29, r3
/* 80024D28 00021C68 4B FF F6 C1 */ bl dStage_roomControl_c_NS_setStayNo
/* 80024D2C 00021C6C 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80024D30 00021C70 3B C3 61 C0 */ addi r30, r3, g_dComIfG_gameInfo@l
/* 80024D34 00021C74 38 7E 4E 20 */ addi r3, r30, 0x4e20
/* 80024D38 00021C78 81 9E 4E 20 */ lwz r12, 0x4e20(r30)
/* 80024D3C 00021C7C 81 8C 00 30 */ lwz r12, 0x30(r12)
/* 80024D40 00021C80 7D 89 03 A6 */ mtctr r12
/* 80024D44 00021C84 4E 80 04 21 */ bctrl
/* 80024D48 00021C88 7C 7F 1B 79 */ or. r31, r3, r3
/* 80024D4C 00021C8C 41 82 00 48 */ beq lbl_80024D94
/* 80024D50 00021C90 80 1F 00 00 */ lwz r0, 0(r31)
/* 80024D54 00021C94 7C 00 E8 00 */ cmpw r0, r29
/* 80024D58 00021C98 40 81 00 3C */ ble lbl_80024D94
/* 80024D5C 00021C9C 80 7F 00 04 */ lwz r3, 4(r31)
/* 80024D60 00021CA0 57 BD 10 3A */ slwi r29, r29, 2
/* 80024D64 00021CA4 7C 63 E8 2E */ lwzx r3, r3, r29
/* 80024D68 00021CA8 88 03 00 02 */ lbz r0, 2(r3)
/* 80024D6C 00021CAC 54 03 07 BE */ clrlwi r3, r0, 0x1e
/* 80024D70 00021CB0 48 00 00 41 */ bl dStage_roomControl_c_NS_SetTimePass
/* 80024D74 00021CB4 80 7F 00 04 */ lwz r3, 4(r31)
/* 80024D78 00021CB8 7C A3 E8 2E */ lwzx r5, r3, r29
/* 80024D7C 00021CBC 38 7E 4E C4 */ addi r3, r30, 0x4ec4
/* 80024D80 00021CC0 88 85 00 00 */ lbz r4, 0(r5)
/* 80024D84 00021CC4 80 A5 00 04 */ lwz r5, 4(r5)
/* 80024D88 00021CC8 38 C0 00 01 */ li r6, 1
/* 80024D8C 00021CCC 4B FF F7 91 */ bl dStage_roomControl_c_NS_loadRoom
/* 80024D90 00021CD0 48 00 00 08 */ b lbl_80024D98
lbl_80024D94:
/* 80024D94 00021CD4 38 60 00 01 */ li r3, 1
lbl_80024D98:
/* 80024D98 00021CD8 39 61 00 20 */ addi r11, r1, 0x20
/* 80024D9C 00021CDC 48 33 D4 8D */ bl _restgpr_29
/* 80024DA0 00021CE0 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80024DA4 00021CE4 7C 08 03 A6 */ mtlr r0
/* 80024DA8 00021CE8 38 21 00 20 */ addi r1, r1, 0x20
/* 80024DAC 00021CEC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024DB0.s
+2
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/* 80024DB0 00021CF0 98 6D 87 E7 */ stb r3, lbl_80450D67-_SDA_BASE_(r13)
/* 80024DB4 00021CF4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024DB8.s
+2
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@@ -0,0 +1,2 @@
/* 80024DB8 00021CF8 80 63 00 14 */ lwz r3, 0x14(r3)
/* 80024DBC 00021CFC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024DC0.s
+31
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@@ -0,0 +1,31 @@
/* 80024DC0 00021D00 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80024DC4 00021D04 7C 08 02 A6 */ mflr r0
/* 80024DC8 00021D08 90 01 00 24 */ stw r0, 0x24(r1)
/* 80024DCC 00021D0C 39 61 00 20 */ addi r11, r1, 0x20
/* 80024DD0 00021D10 48 33 D4 0D */ bl _savegpr_29
/* 80024DD4 00021D14 7C 7D 1B 78 */ mr r29, r3
/* 80024DD8 00021D18 3C 60 80 3A */ lis r3, lbl_803A3B18@ha
/* 80024DDC 00021D1C 38 03 3B 18 */ addi r0, r3, lbl_803A3B18@l
/* 80024DE0 00021D20 7C 1F 03 78 */ mr r31, r0
/* 80024DE4 00021D24 3B C0 00 00 */ li r30, 0
lbl_80024DE8:
/* 80024DE8 00021D28 7F E3 FB 78 */ mr r3, r31
/* 80024DEC 00021D2C 7F A4 EB 78 */ mr r4, r29
/* 80024DF0 00021D30 48 34 3B A5 */ bl strcmp
/* 80024DF4 00021D34 2C 03 00 00 */ cmpwi r3, 0
/* 80024DF8 00021D38 40 82 00 0C */ bne lbl_80024E04
/* 80024DFC 00021D3C 7F E3 FB 78 */ mr r3, r31
/* 80024E00 00021D40 48 00 00 18 */ b lbl_80024E18
lbl_80024E04:
/* 80024E04 00021D44 3B DE 00 01 */ addi r30, r30, 1
/* 80024E08 00021D48 28 1E 03 8F */ cmplwi r30, 0x38f
/* 80024E0C 00021D4C 3B FF 00 0C */ addi r31, r31, 0xc
/* 80024E10 00021D50 41 80 FF D8 */ blt lbl_80024DE8
/* 80024E14 00021D54 38 60 00 00 */ li r3, 0
lbl_80024E18:
/* 80024E18 00021D58 39 61 00 20 */ addi r11, r1, 0x20
/* 80024E1C 00021D5C 48 33 D4 0D */ bl _restgpr_29
/* 80024E20 00021D60 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80024E24 00021D64 7C 08 03 A6 */ mtlr r0
/* 80024E28 00021D68 38 21 00 20 */ addi r1, r1, 0x20
/* 80024E2C 00021D6C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024E30.s
+48
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/* 80024E30 00021D70 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024E34 00021D74 7C 08 02 A6 */ mflr r0
/* 80024E38 00021D78 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024E3C 00021D7C 7C 68 1B 78 */ mr r8, r3
/* 80024E40 00021D80 7C 87 23 78 */ mr r7, r4
/* 80024E44 00021D84 3C 60 80 3A */ lis r3, lbl_803A3B18@ha
/* 80024E48 00021D88 38 03 3B 18 */ addi r0, r3, lbl_803A3B18@l
/* 80024E4C 00021D8C 7C 03 03 78 */ mr r3, r0
/* 80024E50 00021D90 38 C0 00 00 */ li r6, 0
/* 80024E54 00021D94 7C E4 07 74 */ extsb r4, r7
/* 80024E58 00021D98 7D 05 07 34 */ extsh r5, r8
/* 80024E5C 00021D9C 38 00 03 8F */ li r0, 0x38f
/* 80024E60 00021DA0 7C 09 03 A6 */ mtctr r0
lbl_80024E64:
/* 80024E64 00021DA4 A8 03 00 08 */ lha r0, 8(r3)
/* 80024E68 00021DA8 7C 00 28 00 */ cmpw r0, r5
/* 80024E6C 00021DAC 40 82 00 24 */ bne lbl_80024E90
/* 80024E70 00021DB0 88 03 00 0A */ lbz r0, 0xa(r3)
/* 80024E74 00021DB4 7C 00 07 74 */ extsb r0, r0
/* 80024E78 00021DB8 7C 00 20 00 */ cmpw r0, r4
/* 80024E7C 00021DBC 40 82 00 08 */ bne lbl_80024E84
/* 80024E80 00021DC0 48 00 00 4C */ b lbl_80024ECC
lbl_80024E84:
/* 80024E84 00021DC4 28 06 00 00 */ cmplwi r6, 0
/* 80024E88 00021DC8 40 82 00 08 */ bne lbl_80024E90
/* 80024E8C 00021DCC 7C 66 1B 78 */ mr r6, r3
lbl_80024E90:
/* 80024E90 00021DD0 38 63 00 0C */ addi r3, r3, 0xc
/* 80024E94 00021DD4 42 00 FF D0 */ bdnz lbl_80024E64
/* 80024E98 00021DD8 28 06 00 00 */ cmplwi r6, 0
/* 80024E9C 00021DDC 40 82 00 2C */ bne lbl_80024EC8
/* 80024EA0 00021DE0 38 6D 87 D8 */ addi r3, r13, 0x80450D58 - 0x80458580 /*SDA HACK; original: lbl_80450D58-_SDA_BASE_*/
/* 80024EA4 00021DE4 38 80 00 08 */ li r4, 8
/* 80024EA8 00021DE8 3C A0 80 38 */ lis r5, lbl_80378A50@ha
/* 80024EAC 00021DEC 38 A5 8A 50 */ addi r5, r5, lbl_80378A50@l
/* 80024EB0 00021DF0 38 A5 00 D4 */ addi r5, r5, 0xd4
/* 80024EB4 00021DF4 7D 06 07 34 */ extsh r6, r8
/* 80024EB8 00021DF8 7C E7 07 74 */ extsb r7, r7
/* 80024EBC 00021DFC 4C C6 31 82 */ crclr 6
/* 80024EC0 00021E00 48 34 16 FD */ bl func_803665BC
/* 80024EC4 00021E04 38 CD 87 D8 */ addi r6, r13, 0x80450D58 - 0x80458580 /*SDA HACK; original: lbl_80450D58-_SDA_BASE_*/
lbl_80024EC8:
/* 80024EC8 00021E08 7C C3 33 78 */ mr r3, r6
lbl_80024ECC:
/* 80024ECC 00021E0C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024ED0 00021E10 7C 08 03 A6 */ mtlr r0
/* 80024ED4 00021E14 38 21 00 10 */ addi r1, r1, 0x10
/* 80024ED8 00021E18 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024EDC.s
+8
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/* 80024EDC 00021E1C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024EE0 00021E20 7C 08 02 A6 */ mflr r0
/* 80024EE4 00021E24 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024EE8 00021E28 4B FF FF 49 */ bl dStage_getName
/* 80024EEC 00021E2C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024EF0 00021E30 7C 08 03 A6 */ mtlr r0
/* 80024EF4 00021E34 38 21 00 10 */ addi r1, r1, 0x10
/* 80024EF8 00021E38 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024EFC.s
+42
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/* 80024EFC 00021E3C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024F00 00021E40 7C 08 02 A6 */ mflr r0
/* 80024F04 00021E44 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024F08 00021E48 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80024F0C 00021E4C 93 C1 00 08 */ stw r30, 8(r1)
/* 80024F10 00021E50 7C 9E 23 78 */ mr r30, r4
/* 80024F14 00021E54 4B FF FE AD */ bl dStage_searchName
/* 80024F18 00021E58 28 03 00 00 */ cmplwi r3, 0
/* 80024F1C 00021E5C 40 82 00 14 */ bne lbl_80024F30
/* 80024F20 00021E60 7F C3 F3 78 */ mr r3, r30
/* 80024F24 00021E64 38 80 00 00 */ li r4, 0
/* 80024F28 00021E68 48 2A 95 D9 */ bl free__7JKRHeapFPvP7JKRHeap
/* 80024F2C 00021E6C 48 00 00 54 */ b lbl_80024F80
lbl_80024F30:
/* 80024F30 00021E70 88 03 00 0A */ lbz r0, 0xa(r3)
/* 80024F34 00021E74 98 1E 00 20 */ stb r0, 0x20(r30)
/* 80024F38 00021E78 AB E3 00 08 */ lha r31, 8(r3)
/* 80024F3C 00021E7C 2C 1F 03 0F */ cmpwi r31, 0x30f
/* 80024F40 00021E80 40 82 00 28 */ bne lbl_80024F68
/* 80024F44 00021E84 7F E3 FB 78 */ mr r3, r31
/* 80024F48 00021E88 38 80 00 00 */ li r4, 0
/* 80024F4C 00021E8C 38 A0 00 00 */ li r5, 0
/* 80024F50 00021E90 7F C6 F3 78 */ mr r6, r30
/* 80024F54 00021E94 4B FF 49 51 */ bl fopAcM_FastCreate
/* 80024F58 00021E98 28 03 00 00 */ cmplwi r3, 0
/* 80024F5C 00021E9C 41 82 00 24 */ beq lbl_80024F80
/* 80024F60 00021EA0 4B FF 4D 1D */ bl fopAcM_delete
/* 80024F64 00021EA4 48 00 00 1C */ b lbl_80024F80
lbl_80024F68:
/* 80024F68 00021EA8 4B FF C7 8D */ bl fpcLy_CurrentLayer
/* 80024F6C 00021EAC 7F E4 FB 78 */ mr r4, r31
/* 80024F70 00021EB0 38 A0 00 00 */ li r5, 0
/* 80024F74 00021EB4 38 C0 00 00 */ li r6, 0
/* 80024F78 00021EB8 7F C7 F3 78 */ mr r7, r30
/* 80024F7C 00021EBC 4B FF EE 19 */ bl fpcSCtRq_Request
lbl_80024F80:
/* 80024F80 00021EC0 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80024F84 00021EC4 83 C1 00 08 */ lwz r30, 8(r1)
/* 80024F88 00021EC8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024F8C 00021ECC 7C 08 03 A6 */ mtlr r0
/* 80024F90 00021ED0 38 21 00 10 */ addi r1, r1, 0x10
/* 80024F94 00021ED4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80024F98.s
+28
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/* 80024F98 00021ED8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80024F9C 00021EDC 7C 08 02 A6 */ mflr r0
/* 80024FA0 00021EE0 90 01 00 14 */ stw r0, 0x14(r1)
/* 80024FA4 00021EE4 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80024FA8 00021EE8 93 C1 00 08 */ stw r30, 8(r1)
/* 80024FAC 00021EEC 7C 9E 23 78 */ mr r30, r4
/* 80024FB0 00021EF0 7C BF 2B 78 */ mr r31, r5
/* 80024FB4 00021EF4 38 60 FF FC */ li r3, -4
/* 80024FB8 00021EF8 38 80 00 18 */ li r4, 0x18
/* 80024FBC 00021EFC 48 23 E2 6D */ bl memalignB__3cMlFiUl
/* 80024FC0 00021F00 7C 65 1B 79 */ or. r5, r3, r3
/* 80024FC4 00021F04 41 82 00 24 */ beq lbl_80024FE8
/* 80024FC8 00021F08 C0 02 82 90 */ lfs f0, lbl_80451C90-_SDA2_BASE_(r2)
/* 80024FCC 00021F0C D0 05 00 04 */ stfs f0, 4(r5)
/* 80024FD0 00021F10 D0 05 00 08 */ stfs f0, 8(r5)
/* 80024FD4 00021F14 D0 05 00 04 */ stfs f0, 4(r5)
/* 80024FD8 00021F18 93 E5 00 00 */ stw r31, 0(r5)
/* 80024FDC 00021F1C 7F C3 F3 78 */ mr r3, r30
/* 80024FE0 00021F20 38 80 03 0D */ li r4, 0x30d
/* 80024FE4 00021F24 4B FF 93 2D */ bl fopCamM_Create
lbl_80024FE8:
/* 80024FE8 00021F28 38 60 00 01 */ li r3, 1
/* 80024FEC 00021F2C 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80024FF0 00021F30 83 C1 00 08 */ lwz r30, 8(r1)
/* 80024FF4 00021F34 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80024FF8 00021F38 7C 08 03 A6 */ mtlr r0
/* 80024FFC 00021F3C 38 21 00 10 */ addi r1, r1, 0x10
/* 80025000 00021F40 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025004.s
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/* 80025004 00021F44 80 63 00 28 */ lwz r3, 0x28(r3)
/* 80025008 00021F48 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002500C.s
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/* 8002500C 00021F4C 80 63 00 10 */ lwz r3, 0x10(r3)
/* 80025010 00021F50 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025014.s
+183
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/* 80025014 00021F54 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025018 00021F58 7C 08 02 A6 */ mflr r0
/* 8002501C 00021F5C 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025020 00021F60 39 61 00 20 */ addi r11, r1, 0x20
/* 80025024 00021F64 48 33 D1 B5 */ bl _savegpr_28
/* 80025028 00021F68 7C 7D 1B 78 */ mr r29, r3
/* 8002502C 00021F6C 7C BC 2B 78 */ mr r28, r5
/* 80025030 00021F70 38 84 00 04 */ addi r4, r4, 4
/* 80025034 00021F74 83 C4 00 04 */ lwz r30, 4(r4)
/* 80025038 00021F78 81 83 00 00 */ lwz r12, 0(r3)
/* 8002503C 00021F7C 81 8C 00 1C */ lwz r12, 0x1c(r12)
/* 80025040 00021F80 7D 89 03 A6 */ mtctr r12
/* 80025044 00021F84 4E 80 04 21 */ bctrl
/* 80025048 00021F88 7F A3 EB 78 */ mr r3, r29
/* 8002504C 00021F8C 57 84 04 3E */ clrlwi r4, r28, 0x10
/* 80025050 00021F90 81 9D 00 00 */ lwz r12, 0(r29)
/* 80025054 00021F94 81 8C 00 24 */ lwz r12, 0x24(r12)
/* 80025058 00021F98 7D 89 03 A6 */ mtctr r12
/* 8002505C 00021F9C 4E 80 04 21 */ bctrl
/* 80025060 00021FA0 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80025064 00021FA4 3B E3 61 C0 */ addi r31, r3, g_dComIfG_gameInfo@l
/* 80025068 00021FA8 80 1F 5D AC */ lwz r0, 0x5dac(r31)
/* 8002506C 00021FAC 28 00 00 00 */ cmplwi r0, 0
/* 80025070 00021FB0 40 82 00 1C */ bne lbl_8002508C
/* 80025074 00021FB4 88 1F 4E 0A */ lbz r0, 0x4e0a(r31)
/* 80025078 00021FB8 7C 03 07 74 */ extsb r3, r0
/* 8002507C 00021FBC 88 1D 00 04 */ lbz r0, 4(r29)
/* 80025080 00021FC0 7C 00 07 74 */ extsb r0, r0
/* 80025084 00021FC4 7C 03 00 00 */ cmpw r3, r0
/* 80025088 00021FC8 41 82 00 0C */ beq lbl_80025094
lbl_8002508C:
/* 8002508C 00021FCC 38 60 00 01 */ li r3, 1
/* 80025090 00021FD0 48 00 02 10 */ b lbl_800252A0
lbl_80025094:
/* 80025094 00021FD4 4B FF 4A 15 */ bl fopAcM_CreateAppend
/* 80025098 00021FD8 7C 7D 1B 78 */ mr r29, r3
/* 8002509C 00021FDC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800250A0 00021FE0 38 C3 61 C0 */ addi r6, r3, g_dComIfG_gameInfo@l
/* 800250A4 00021FE4 A8 66 4E 08 */ lha r3, 0x4e08(r6)
/* 800250A8 00021FE8 80 86 0D C8 */ lwz r4, 0xdc8(r6)
/* 800250AC 00021FEC 2C 03 FF FE */ cmpwi r3, -2
/* 800250B0 00021FF0 41 82 00 0C */ beq lbl_800250BC
/* 800250B4 00021FF4 2C 03 FF FD */ cmpwi r3, -3
/* 800250B8 00021FF8 40 82 00 48 */ bne lbl_80025100
lbl_800250BC:
/* 800250BC 00021FFC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800250C0 00022000 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 800250C4 00022004 80 03 0E E4 */ lwz r0, 0xee4(r3)
/* 800250C8 00022008 90 1D 00 00 */ stw r0, 0(r29)
/* 800250CC 0002200C C0 03 0E D8 */ lfs f0, 0xed8(r3)
/* 800250D0 00022010 D0 1D 00 04 */ stfs f0, 4(r29)
/* 800250D4 00022014 C0 03 0E DC */ lfs f0, 0xedc(r3)
/* 800250D8 00022018 D0 1D 00 08 */ stfs f0, 8(r29)
/* 800250DC 0002201C C0 03 0E E0 */ lfs f0, 0xee0(r3)
/* 800250E0 00022020 D0 1D 00 0C */ stfs f0, 0xc(r29)
/* 800250E4 00022024 A8 63 0E E8 */ lha r3, 0xee8(r3)
/* 800250E8 00022028 38 00 00 00 */ li r0, 0
/* 800250EC 0002202C B0 1D 00 10 */ sth r0, 0x10(r29)
/* 800250F0 00022030 B0 7D 00 12 */ sth r3, 0x12(r29)
/* 800250F4 00022034 38 00 FF 00 */ li r0, -256
/* 800250F8 00022038 B0 1D 00 14 */ sth r0, 0x14(r29)
/* 800250FC 0002203C 48 00 01 0C */ b lbl_80025208
lbl_80025100:
/* 80025100 00022040 2C 03 FF FF */ cmpwi r3, -1
/* 80025104 00022044 40 82 00 3C */ bne lbl_80025140
/* 80025108 00022048 90 9D 00 00 */ stw r4, 0(r29)
/* 8002510C 0002204C C0 06 0D BC */ lfs f0, 0xdbc(r6)
/* 80025110 00022050 D0 1D 00 04 */ stfs f0, 4(r29)
/* 80025114 00022054 C0 06 0D C0 */ lfs f0, 0xdc0(r6)
/* 80025118 00022058 D0 1D 00 08 */ stfs f0, 8(r29)
/* 8002511C 0002205C C0 06 0D C4 */ lfs f0, 0xdc4(r6)
/* 80025120 00022060 D0 1D 00 0C */ stfs f0, 0xc(r29)
/* 80025124 00022064 A8 66 0D BA */ lha r3, 0xdba(r6)
/* 80025128 00022068 38 00 00 00 */ li r0, 0
/* 8002512C 0002206C B0 1D 00 10 */ sth r0, 0x10(r29)
/* 80025130 00022070 B0 7D 00 12 */ sth r3, 0x12(r29)
/* 80025134 00022074 38 00 FF 00 */ li r0, -256
/* 80025138 00022078 B0 1D 00 14 */ sth r0, 0x14(r29)
/* 8002513C 0002207C 48 00 00 CC */ b lbl_80025208
lbl_80025140:
/* 80025140 00022080 2C 03 FF FC */ cmpwi r3, -4
/* 80025144 00022084 40 82 00 0C */ bne lbl_80025150
/* 80025148 00022088 A8 A6 0E E8 */ lha r5, 0xee8(r6)
/* 8002514C 0002208C 48 00 00 08 */ b lbl_80025154
lbl_80025150:
/* 80025150 00022090 7C 65 1B 78 */ mr r5, r3
lbl_80025154:
/* 80025154 00022094 7F 89 03 A6 */ mtctr r28
/* 80025158 00022098 2C 1C 00 00 */ cmpwi r28, 0
/* 8002515C 0002209C 40 81 00 1C */ ble lbl_80025178
lbl_80025160:
/* 80025160 000220A0 A8 1E 00 1C */ lha r0, 0x1c(r30)
/* 80025164 000220A4 54 00 06 3E */ clrlwi r0, r0, 0x18
/* 80025168 000220A8 7C 00 28 00 */ cmpw r0, r5
/* 8002516C 000220AC 41 82 00 0C */ beq lbl_80025178
/* 80025170 000220B0 3B DE 00 20 */ addi r30, r30, 0x20
/* 80025174 000220B4 42 00 FF EC */ bdnz lbl_80025160
lbl_80025178:
/* 80025178 000220B8 80 1E 00 08 */ lwz r0, 8(r30)
/* 8002517C 000220BC 90 1D 00 00 */ stw r0, 0(r29)
/* 80025180 000220C0 C0 1E 00 0C */ lfs f0, 0xc(r30)
/* 80025184 000220C4 D0 1D 00 04 */ stfs f0, 4(r29)
/* 80025188 000220C8 C0 1E 00 10 */ lfs f0, 0x10(r30)
/* 8002518C 000220CC D0 1D 00 08 */ stfs f0, 8(r29)
/* 80025190 000220D0 C0 1E 00 14 */ lfs f0, 0x14(r30)
/* 80025194 000220D4 D0 1D 00 0C */ stfs f0, 0xc(r29)
/* 80025198 000220D8 A8 1E 00 18 */ lha r0, 0x18(r30)
/* 8002519C 000220DC B0 1D 00 10 */ sth r0, 0x10(r29)
/* 800251A0 000220E0 A8 1E 00 1A */ lha r0, 0x1a(r30)
/* 800251A4 000220E4 B0 1D 00 12 */ sth r0, 0x12(r29)
/* 800251A8 000220E8 A8 1E 00 1C */ lha r0, 0x1c(r30)
/* 800251AC 000220EC B0 1D 00 14 */ sth r0, 0x14(r29)
/* 800251B0 000220F0 A0 1E 00 1E */ lhz r0, 0x1e(r30)
/* 800251B4 000220F4 B0 1D 00 16 */ sth r0, 0x16(r29)
/* 800251B8 000220F8 2C 03 FF FC */ cmpwi r3, -4
/* 800251BC 000220FC 40 82 00 18 */ bne lbl_800251D4
/* 800251C0 00022100 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800251C4 00022104 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 800251C8 00022108 80 03 0E E4 */ lwz r0, 0xee4(r3)
/* 800251CC 0002210C 90 1D 00 00 */ stw r0, 0(r29)
/* 800251D0 00022110 48 00 00 38 */ b lbl_80025208
lbl_800251D4:
/* 800251D4 00022114 28 04 00 00 */ cmplwi r4, 0
/* 800251D8 00022118 41 82 00 18 */ beq lbl_800251F0
/* 800251DC 0002211C 88 1F 4E 0A */ lbz r0, 0x4e0a(r31)
/* 800251E0 00022120 7C 00 07 74 */ extsb r0, r0
/* 800251E4 00022124 50 80 00 32 */ rlwimi r0, r4, 0, 0, 0x19
/* 800251E8 00022128 90 1D 00 00 */ stw r0, 0(r29)
/* 800251EC 0002212C 48 00 00 1C */ b lbl_80025208
lbl_800251F0:
/* 800251F0 00022130 40 82 00 18 */ bne lbl_80025208
/* 800251F4 00022134 80 7D 00 00 */ lwz r3, 0(r29)
/* 800251F8 00022138 88 1F 4E 0A */ lbz r0, 0x4e0a(r31)
/* 800251FC 0002213C 7C 00 07 74 */ extsb r0, r0
/* 80025200 00022140 50 60 00 32 */ rlwimi r0, r3, 0, 0, 0x19
/* 80025204 00022144 90 1D 00 00 */ stw r0, 0(r29)
lbl_80025208:
/* 80025208 00022148 38 00 00 00 */ li r0, 0
/* 8002520C 0002214C 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80025210 00022150 38 E3 61 C0 */ addi r7, r3, g_dComIfG_gameInfo@l
/* 80025214 00022154 90 07 0D C8 */ stw r0, 0xdc8(r7)
/* 80025218 00022158 3C 60 00 01 */ lis r3, 0x0000FFFF@ha
/* 8002521C 0002215C 38 03 FF FF */ addi r0, r3, 0x0000FFFF@l
/* 80025220 00022160 B0 1D 00 16 */ sth r0, 0x16(r29)
/* 80025224 00022164 38 00 FF FF */ li r0, -1
/* 80025228 00022168 98 1D 00 21 */ stb r0, 0x21(r29)
/* 8002522C 0002216C 3B E7 4E 00 */ addi r31, r7, 0x4e00
/* 80025230 00022170 7F E3 FB 78 */ mr r3, r31
/* 80025234 00022174 7F E4 FB 78 */ mr r4, r31
/* 80025238 00022178 80 1D 00 00 */ lwz r0, 0(r29)
/* 8002523C 0002217C 54 05 06 BE */ clrlwi r5, r0, 0x1a
/* 80025240 00022180 A8 C6 4E 08 */ lha r6, 0x4e08(r6)
/* 80025244 00022184 88 07 4E 0B */ lbz r0, 0x4e0b(r7)
/* 80025248 00022188 7C 07 07 74 */ extsb r7, r0
/* 8002524C 0002218C 4B FF EF 51 */ bl dStage_startStage_c_NS_set
/* 80025250 00022190 7F C3 F3 78 */ mr r3, r30
/* 80025254 00022194 7F A4 EB 78 */ mr r4, r29
/* 80025258 00022198 4B FF FC A5 */ bl dStage_actorCreate
/* 8002525C 0002219C 80 6D 87 E0 */ lwz r3, lbl_80450D60-_SDA_BASE_(r13)
/* 80025260 000221A0 4B FF 9A 51 */ bl fopScnM_SearchByID
/* 80025264 000221A4 A8 03 00 08 */ lha r0, 8(r3)
/* 80025268 000221A8 2C 00 00 0B */ cmpwi r0, 0xb
/* 8002526C 000221AC 40 82 00 30 */ bne lbl_8002529C
/* 80025270 000221B0 7F E3 FB 78 */ mr r3, r31
/* 80025274 000221B4 3C 80 80 38 */ lis r4, lbl_80378A50@ha
/* 80025278 000221B8 38 84 8A 50 */ addi r4, r4, lbl_80378A50@l
/* 8002527C 000221BC 38 84 00 DB */ addi r4, r4, 0xdb
/* 80025280 000221C0 48 34 37 15 */ bl strcmp
/* 80025284 000221C4 2C 03 00 00 */ cmpwi r3, 0
/* 80025288 000221C8 41 82 00 14 */ beq lbl_8002529C
/* 8002528C 000221CC 38 60 03 16 */ li r3, 0x316
/* 80025290 000221D0 38 80 00 00 */ li r4, 0
/* 80025294 000221D4 38 A0 00 00 */ li r5, 0
/* 80025298 000221D8 4B FF AE 71 */ bl fopMsgM_Create
lbl_8002529C:
/* 8002529C 000221DC 38 60 00 01 */ li r3, 1
lbl_800252A0:
/* 800252A0 000221E0 39 61 00 20 */ addi r11, r1, 0x20
/* 800252A4 000221E4 48 33 CF 81 */ bl _restgpr_28
/* 800252A8 000221E8 80 01 00 24 */ lwz r0, 0x24(r1)
/* 800252AC 000221EC 7C 08 03 A6 */ mtlr r0
/* 800252B0 000221F0 38 21 00 20 */ addi r1, r1, 0x20
/* 800252B4 000221F4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800252B8.s
+20
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/* 800252B8 000221F8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800252BC 000221FC 7C 08 02 A6 */ mflr r0
/* 800252C0 00022200 90 01 00 14 */ stw r0, 0x14(r1)
/* 800252C4 00022204 93 E1 00 0C */ stw r31, 0xc(r1)
/* 800252C8 00022208 3B E4 00 04 */ addi r31, r4, 4
/* 800252CC 0002220C 7F E4 FB 78 */ mr r4, r31
/* 800252D0 00022210 81 83 00 00 */ lwz r12, 0(r3)
/* 800252D4 00022214 81 8C 00 0C */ lwz r12, 0xc(r12)
/* 800252D8 00022218 7D 89 03 A6 */ mtctr r12
/* 800252DC 0002221C 4E 80 04 21 */ bctrl
/* 800252E0 00022220 80 7F 00 04 */ lwz r3, 4(r31)
/* 800252E4 00022224 38 80 00 00 */ li r4, 0
/* 800252E8 00022228 38 A0 00 00 */ li r5, 0
/* 800252EC 0002222C 4B FF FC AD */ bl dStage_cameraCreate
/* 800252F0 00022230 38 60 00 01 */ li r3, 1
/* 800252F4 00022234 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 800252F8 00022238 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800252FC 0002223C 7C 08 03 A6 */ mtlr r0
/* 80025300 00022240 38 21 00 10 */ addi r1, r1, 0x10
/* 80025304 00022244 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025308.s
+13
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/* 80025308 00022248 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002530C 0002224C 7C 08 02 A6 */ mflr r0
/* 80025310 00022250 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025314 00022254 81 83 00 00 */ lwz r12, 0(r3)
/* 80025318 00022258 81 8C 00 0C */ lwz r12, 0xc(r12)
/* 8002531C 0002225C 7D 89 03 A6 */ mtctr r12
/* 80025320 00022260 38 84 00 04 */ addi r4, r4, 4
/* 80025324 00022264 4E 80 04 21 */ bctrl
/* 80025328 00022268 38 60 00 01 */ li r3, 1
/* 8002532C 0002226C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025330 00022270 7C 08 03 A6 */ mtlr r0
/* 80025334 00022274 38 21 00 10 */ addi r1, r1, 0x10
/* 80025338 00022278 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002533C.s
+13
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/* 8002533C 0002227C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025340 00022280 7C 08 02 A6 */ mflr r0
/* 80025344 00022284 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025348 00022288 81 83 00 00 */ lwz r12, 0(r3)
/* 8002534C 0002228C 81 8C 00 14 */ lwz r12, 0x14(r12)
/* 80025350 00022290 7D 89 03 A6 */ mtctr r12
/* 80025354 00022294 38 84 00 04 */ addi r4, r4, 4
/* 80025358 00022298 4E 80 04 21 */ bctrl
/* 8002535C 0002229C 38 60 00 01 */ li r3, 1
/* 80025360 000222A0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025364 000222A4 7C 08 03 A6 */ mtlr r0
/* 80025368 000222A8 38 21 00 10 */ addi r1, r1, 0x10
/* 8002536C 000222AC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025370.s
+41
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/* 80025370 000222B0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025374 000222B4 7C 08 02 A6 */ mflr r0
/* 80025378 000222B8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8002537C 000222BC 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80025380 000222C0 7C 9F 23 78 */ mr r31, r4
/* 80025384 000222C4 81 83 00 00 */ lwz r12, 0(r3)
/* 80025388 000222C8 81 8C 00 44 */ lwz r12, 0x44(r12)
/* 8002538C 000222CC 7D 89 03 A6 */ mtctr r12
/* 80025390 000222D0 4E 80 04 21 */ bctrl
/* 80025394 000222D4 28 03 00 00 */ cmplwi r3, 0
/* 80025398 000222D8 41 82 00 1C */ beq lbl_800253B4
/* 8002539C 000222DC 80 83 00 00 */ lwz r4, 0(r3)
/* 800253A0 000222E0 2C 04 00 00 */ cmpwi r4, 0
/* 800253A4 000222E4 41 82 00 10 */ beq lbl_800253B4
/* 800253A8 000222E8 80 03 00 04 */ lwz r0, 4(r3)
/* 800253AC 000222EC 28 00 00 00 */ cmplwi r0, 0
/* 800253B0 000222F0 40 82 00 0C */ bne lbl_800253BC
lbl_800253B4:
/* 800253B4 000222F4 38 60 00 00 */ li r3, 0
/* 800253B8 000222F8 48 00 00 30 */ b lbl_800253E8
lbl_800253BC:
/* 800253BC 000222FC 7C 03 03 78 */ mr r3, r0
/* 800253C0 00022300 7C 89 03 A6 */ mtctr r4
/* 800253C4 00022304 2C 04 00 00 */ cmpwi r4, 0
/* 800253C8 00022308 40 81 00 1C */ ble lbl_800253E4
lbl_800253CC:
/* 800253CC 0002230C 88 03 00 35 */ lbz r0, 0x35(r3)
/* 800253D0 00022310 7C 1F 00 00 */ cmpw r31, r0
/* 800253D4 00022314 40 82 00 08 */ bne lbl_800253DC
/* 800253D8 00022318 48 00 00 10 */ b lbl_800253E8
lbl_800253DC:
/* 800253DC 0002231C 38 63 00 38 */ addi r3, r3, 0x38
/* 800253E0 00022320 42 00 FF EC */ bdnz lbl_800253CC
lbl_800253E4:
/* 800253E4 00022324 38 60 00 00 */ li r3, 0
lbl_800253E8:
/* 800253E8 00022328 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 800253EC 0002232C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800253F0 00022330 7C 08 03 A6 */ mtlr r0
/* 800253F4 00022334 38 21 00 10 */ addi r1, r1, 0x10
/* 800253F8 00022338 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800253FC.s
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/* 800253FC 0002233C 80 63 00 14 */ lwz r3, 0x14(r3)
/* 80025400 00022340 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025404.s
+41
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/* 80025404 00022344 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025408 00022348 7C 08 02 A6 */ mflr r0
/* 8002540C 0002234C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025410 00022350 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80025414 00022354 7C 9F 23 78 */ mr r31, r4
/* 80025418 00022358 81 83 00 00 */ lwz r12, 0(r3)
/* 8002541C 0002235C 81 8C 00 44 */ lwz r12, 0x44(r12)
/* 80025420 00022360 7D 89 03 A6 */ mtctr r12
/* 80025424 00022364 4E 80 04 21 */ bctrl
/* 80025428 00022368 28 03 00 00 */ cmplwi r3, 0
/* 8002542C 0002236C 41 82 00 1C */ beq lbl_80025448
/* 80025430 00022370 80 83 00 00 */ lwz r4, 0(r3)
/* 80025434 00022374 2C 04 00 00 */ cmpwi r4, 0
/* 80025438 00022378 41 82 00 10 */ beq lbl_80025448
/* 8002543C 0002237C 80 03 00 04 */ lwz r0, 4(r3)
/* 80025440 00022380 28 00 00 00 */ cmplwi r0, 0
/* 80025444 00022384 40 82 00 0C */ bne lbl_80025450
lbl_80025448:
/* 80025448 00022388 38 60 00 00 */ li r3, 0
/* 8002544C 0002238C 48 00 00 30 */ b lbl_8002547C
lbl_80025450:
/* 80025450 00022390 7C 03 03 78 */ mr r3, r0
/* 80025454 00022394 7C 89 03 A6 */ mtctr r4
/* 80025458 00022398 2C 04 00 00 */ cmpwi r4, 0
/* 8002545C 0002239C 40 81 00 1C */ ble lbl_80025478
lbl_80025460:
/* 80025460 000223A0 88 03 00 35 */ lbz r0, 0x35(r3)
/* 80025464 000223A4 7C 1F 00 00 */ cmpw r31, r0
/* 80025468 000223A8 40 82 00 08 */ bne lbl_80025470
/* 8002546C 000223AC 48 00 00 10 */ b lbl_8002547C
lbl_80025470:
/* 80025470 000223B0 38 63 00 38 */ addi r3, r3, 0x38
/* 80025474 000223B4 42 00 FF EC */ bdnz lbl_80025460
lbl_80025478:
/* 80025478 000223B8 38 60 00 00 */ li r3, 0
lbl_8002547C:
/* 8002547C 000223BC 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80025480 000223C0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025484 000223C4 7C 08 03 A6 */ mtlr r0
/* 80025488 000223C8 38 21 00 10 */ addi r1, r1, 0x10
/* 8002548C 000223CC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025490.s
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/* 80025490 000223D0 80 63 00 1C */ lwz r3, 0x1c(r3)
/* 80025494 000223D4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025498.s
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/* 80025498 000223D8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002549C 000223DC 7C 08 02 A6 */ mflr r0
/* 800254A0 000223E0 90 01 00 14 */ stw r0, 0x14(r1)
/* 800254A4 000223E4 80 84 00 08 */ lwz r4, 8(r4)
/* 800254A8 000223E8 81 83 00 00 */ lwz r12, 0(r3)
/* 800254AC 000223EC 81 8C 00 48 */ lwz r12, 0x48(r12)
/* 800254B0 000223F0 7D 89 03 A6 */ mtctr r12
/* 800254B4 000223F4 4E 80 04 21 */ bctrl
/* 800254B8 000223F8 38 60 00 01 */ li r3, 1
/* 800254BC 000223FC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800254C0 00022400 7C 08 03 A6 */ mtlr r0
/* 800254C4 00022404 38 21 00 10 */ addi r1, r1, 0x10
/* 800254C8 00022408 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800254CC.s
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/* 800254CC 0002240C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800254D0 00022410 7C 08 02 A6 */ mflr r0
/* 800254D4 00022414 90 01 00 14 */ stw r0, 0x14(r1)
/* 800254D8 00022418 80 84 00 08 */ lwz r4, 8(r4)
/* 800254DC 0002241C 81 83 00 00 */ lwz r12, 0(r3)
/* 800254E0 00022420 81 8C 00 50 */ lwz r12, 0x50(r12)
/* 800254E4 00022424 7D 89 03 A6 */ mtctr r12
/* 800254E8 00022428 4E 80 04 21 */ bctrl
/* 800254EC 0002242C 38 60 00 01 */ li r3, 1
/* 800254F0 00022430 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800254F4 00022434 7C 08 03 A6 */ mtlr r0
/* 800254F8 00022438 38 21 00 10 */ addi r1, r1, 0x10
/* 800254FC 0002243C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025500.s
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/* 80025500 00022440 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025504 00022444 7C 08 02 A6 */ mflr r0
/* 80025508 00022448 90 01 00 14 */ stw r0, 0x14(r1)
/* 8002550C 0002244C 80 84 00 08 */ lwz r4, 8(r4)
/* 80025510 00022450 81 83 00 00 */ lwz r12, 0(r3)
/* 80025514 00022454 81 8C 00 58 */ lwz r12, 0x58(r12)
/* 80025518 00022458 7D 89 03 A6 */ mtctr r12
/* 8002551C 0002245C 4E 80 04 21 */ bctrl
/* 80025520 00022460 38 60 00 01 */ li r3, 1
/* 80025524 00022464 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025528 00022468 7C 08 03 A6 */ mtlr r0
/* 8002552C 0002246C 38 21 00 10 */ addi r1, r1, 0x10
/* 80025530 00022470 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025534.s
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/* 80025534 00022474 2C 05 00 00 */ cmpwi r5, 0
/* 80025538 00022478 40 82 00 0C */ bne lbl_80025544
/* 8002553C 0002247C 38 60 00 01 */ li r3, 1
/* 80025540 00022480 4E 80 00 20 */ blr
lbl_80025544:
/* 80025544 00022484 80 A4 00 08 */ lwz r5, 8(r4)
/* 80025548 00022488 3C 80 80 3F */ lis r4, lbl_803F6094@ha
/* 8002554C 0002248C 38 84 60 94 */ addi r4, r4, lbl_803F6094@l
/* 80025550 00022490 88 03 00 04 */ lbz r0, 4(r3)
/* 80025554 00022494 7C 00 07 74 */ extsb r0, r0
/* 80025558 00022498 1C 00 04 04 */ mulli r0, r0, 0x404
/* 8002555C 0002249C 7C 64 02 14 */ add r3, r4, r0
/* 80025560 000224A0 90 A3 00 20 */ stw r5, 0x20(r3)
/* 80025564 000224A4 38 60 00 01 */ li r3, 1
/* 80025568 000224A8 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002556C.s
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/* 8002556C 000224AC 2C 05 00 00 */ cmpwi r5, 0
/* 80025570 000224B0 40 82 00 0C */ bne lbl_8002557C
/* 80025574 000224B4 38 60 00 01 */ li r3, 1
/* 80025578 000224B8 4E 80 00 20 */ blr
lbl_8002557C:
/* 8002557C 000224BC 80 04 00 08 */ lwz r0, 8(r4)
/* 80025580 000224C0 90 03 00 04 */ stw r0, 4(r3)
/* 80025584 000224C4 38 60 00 01 */ li r3, 1
/* 80025588 000224C8 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002558C.s
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/* 8002558C 000224CC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025590 000224D0 7C 08 02 A6 */ mflr r0
/* 80025594 000224D4 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025598 000224D8 2C 05 00 00 */ cmpwi r5, 0
/* 8002559C 000224DC 40 82 00 1C */ bne lbl_800255B8
/* 800255A0 000224E0 38 80 00 00 */ li r4, 0
/* 800255A4 000224E4 81 83 00 00 */ lwz r12, 0(r3)
/* 800255A8 000224E8 81 8C 01 08 */ lwz r12, 0x108(r12)
/* 800255AC 000224EC 7D 89 03 A6 */ mtctr r12
/* 800255B0 000224F0 4E 80 04 21 */ bctrl
/* 800255B4 000224F4 48 00 00 18 */ b lbl_800255CC
lbl_800255B8:
/* 800255B8 000224F8 80 84 00 08 */ lwz r4, 8(r4)
/* 800255BC 000224FC 81 83 00 00 */ lwz r12, 0(r3)
/* 800255C0 00022500 81 8C 01 08 */ lwz r12, 0x108(r12)
/* 800255C4 00022504 7D 89 03 A6 */ mtctr r12
/* 800255C8 00022508 4E 80 04 21 */ bctrl
lbl_800255CC:
/* 800255CC 0002250C 38 60 00 01 */ li r3, 1
/* 800255D0 00022510 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800255D4 00022514 7C 08 03 A6 */ mtlr r0
/* 800255D8 00022518 38 21 00 10 */ addi r1, r1, 0x10
/* 800255DC 0002251C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800255E0.s
+13
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/* 800255E0 00022520 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800255E4 00022524 7C 08 02 A6 */ mflr r0
/* 800255E8 00022528 90 01 00 14 */ stw r0, 0x14(r1)
/* 800255EC 0002252C 80 84 00 08 */ lwz r4, 8(r4)
/* 800255F0 00022530 81 83 00 00 */ lwz r12, 0(r3)
/* 800255F4 00022534 81 8C 00 60 */ lwz r12, 0x60(r12)
/* 800255F8 00022538 7D 89 03 A6 */ mtctr r12
/* 800255FC 0002253C 4E 80 04 21 */ bctrl
/* 80025600 00022540 38 60 00 01 */ li r3, 1
/* 80025604 00022544 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025608 00022548 7C 08 03 A6 */ mtlr r0
/* 8002560C 0002254C 38 21 00 10 */ addi r1, r1, 0x10
/* 80025610 00022550 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025614.s
+13
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/* 80025614 00022554 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025618 00022558 7C 08 02 A6 */ mflr r0
/* 8002561C 0002255C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025620 00022560 80 84 00 08 */ lwz r4, 8(r4)
/* 80025624 00022564 81 83 00 00 */ lwz r12, 0(r3)
/* 80025628 00022568 81 8C 00 68 */ lwz r12, 0x68(r12)
/* 8002562C 0002256C 7D 89 03 A6 */ mtctr r12
/* 80025630 00022570 4E 80 04 21 */ bctrl
/* 80025634 00022574 38 60 00 01 */ li r3, 1
/* 80025638 00022578 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8002563C 0002257C 7C 08 03 A6 */ mtlr r0
/* 80025640 00022580 38 21 00 10 */ addi r1, r1, 0x10
/* 80025644 00022584 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025648.s
+25
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/* 80025648 00022588 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002564C 0002258C 7C 08 02 A6 */ mflr r0
/* 80025650 00022590 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025654 00022594 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80025658 00022598 93 C1 00 08 */ stw r30, 8(r1)
/* 8002565C 0002259C 7C 7E 1B 78 */ mr r30, r3
/* 80025660 000225A0 7C BF 2B 78 */ mr r31, r5
/* 80025664 000225A4 80 84 00 08 */ lwz r4, 8(r4)
/* 80025668 000225A8 81 83 00 00 */ lwz r12, 0(r3)
/* 8002566C 000225AC 81 8C 00 70 */ lwz r12, 0x70(r12)
/* 80025670 000225B0 7D 89 03 A6 */ mtctr r12
/* 80025674 000225B4 4E 80 04 21 */ bctrl
/* 80025678 000225B8 7F C3 F3 78 */ mr r3, r30
/* 8002567C 000225BC 7F E4 FB 78 */ mr r4, r31
/* 80025680 000225C0 81 9E 00 00 */ lwz r12, 0(r30)
/* 80025684 000225C4 81 8C 00 A0 */ lwz r12, 0xa0(r12)
/* 80025688 000225C8 7D 89 03 A6 */ mtctr r12
/* 8002568C 000225CC 4E 80 04 21 */ bctrl
/* 80025690 000225D0 38 60 00 01 */ li r3, 1
/* 80025694 000225D4 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80025698 000225D8 83 C1 00 08 */ lwz r30, 8(r1)
/* 8002569C 000225DC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800256A0 000225E0 7C 08 03 A6 */ mtlr r0
/* 800256A4 000225E4 38 21 00 10 */ addi r1, r1, 0x10
/* 800256A8 000225E8 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800256AC.s
+37
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/* 800256AC 000225EC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800256B0 000225F0 7C 08 02 A6 */ mflr r0
/* 800256B4 000225F4 90 01 00 24 */ stw r0, 0x24(r1)
/* 800256B8 000225F8 39 61 00 20 */ addi r11, r1, 0x20
/* 800256BC 000225FC 48 33 CB 21 */ bl _savegpr_29
/* 800256C0 00022600 7C 7D 1B 78 */ mr r29, r3
/* 800256C4 00022604 7C 9E 23 78 */ mr r30, r4
/* 800256C8 00022608 7C BF 2B 78 */ mr r31, r5
/* 800256CC 0002260C 7F E4 FB 78 */ mr r4, r31
/* 800256D0 00022610 81 83 00 00 */ lwz r12, 0(r3)
/* 800256D4 00022614 81 8C 00 B0 */ lwz r12, 0xb0(r12)
/* 800256D8 00022618 7D 89 03 A6 */ mtctr r12
/* 800256DC 0002261C 4E 80 04 21 */ bctrl
/* 800256E0 00022620 2C 1F 00 00 */ cmpwi r31, 0
/* 800256E4 00022624 40 82 00 20 */ bne lbl_80025704
/* 800256E8 00022628 7F A3 EB 78 */ mr r3, r29
/* 800256EC 0002262C 38 80 00 00 */ li r4, 0
/* 800256F0 00022630 81 9D 00 00 */ lwz r12, 0(r29)
/* 800256F4 00022634 81 8C 00 A8 */ lwz r12, 0xa8(r12)
/* 800256F8 00022638 7D 89 03 A6 */ mtctr r12
/* 800256FC 0002263C 4E 80 04 21 */ bctrl
/* 80025700 00022640 48 00 00 1C */ b lbl_8002571C
lbl_80025704:
/* 80025704 00022644 7F A3 EB 78 */ mr r3, r29
/* 80025708 00022648 80 9E 00 08 */ lwz r4, 8(r30)
/* 8002570C 0002264C 81 9D 00 00 */ lwz r12, 0(r29)
/* 80025710 00022650 81 8C 00 A8 */ lwz r12, 0xa8(r12)
/* 80025714 00022654 7D 89 03 A6 */ mtctr r12
/* 80025718 00022658 4E 80 04 21 */ bctrl
lbl_8002571C:
/* 8002571C 0002265C 38 60 00 01 */ li r3, 1
/* 80025720 00022660 39 61 00 20 */ addi r11, r1, 0x20
/* 80025724 00022664 48 33 CB 05 */ bl _restgpr_29
/* 80025728 00022668 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8002572C 0002266C 7C 08 03 A6 */ mtlr r0
/* 80025730 00022670 38 21 00 20 */ addi r1, r1, 0x20
/* 80025734 00022674 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025738.s
+3
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@@ -0,0 +1,3 @@
/* 80025738 00022678 7C 63 22 14 */ add r3, r3, r4
/* 8002573C 0002267C 88 63 00 2C */ lbz r3, 0x2c(r3)
/* 80025740 00022680 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025744.s
+59
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@@ -0,0 +1,59 @@
/* 80025744 00022684 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025748 00022688 7C 08 02 A6 */ mflr r0
/* 8002574C 0002268C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025750 00022690 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80025754 00022694 93 C1 00 08 */ stw r30, 8(r1)
/* 80025758 00022698 7C 7E 1B 78 */ mr r30, r3
/* 8002575C 0002269C 80 84 00 08 */ lwz r4, 8(r4)
/* 80025760 000226A0 81 83 00 00 */ lwz r12, 0(r3)
/* 80025764 000226A4 81 8C 00 B8 */ lwz r12, 0xb8(r12)
/* 80025768 000226A8 7D 89 03 A6 */ mtctr r12
/* 8002576C 000226AC 4E 80 04 21 */ bctrl
/* 80025770 000226B0 7F C3 F3 78 */ mr r3, r30
/* 80025774 000226B4 4B FF E7 8D */ bl dStage_isBossStage
/* 80025778 000226B8 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 8002577C 000226BC 40 82 00 40 */ bne lbl_800257BC
/* 80025780 000226C0 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 80025784 000226C4 38 63 8A 50 */ addi r3, r3, lbl_80378A50@l
/* 80025788 000226C8 38 63 00 E3 */ addi r3, r3, 0xe3
/* 8002578C 000226CC 3C 80 80 40 */ lis r4, g_dComIfG_gameInfo@ha
/* 80025790 000226D0 38 84 61 C0 */ addi r4, r4, g_dComIfG_gameInfo@l
/* 80025794 000226D4 3C 84 00 02 */ addis r4, r4, 2
/* 80025798 000226D8 38 84 D4 F8 */ addi r4, r4, -11016
/* 8002579C 000226DC 38 A0 00 40 */ li r5, 0x40
/* 800257A0 000226E0 48 01 69 F5 */ bl dRes_control_c_NS_deleteRes
/* 800257A4 000226E4 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800257A8 000226E8 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 800257AC 000226EC 85 83 4E 20 */ lwzu r12, 0x4e20(r3)
/* 800257B0 000226F0 81 8C 01 34 */ lwz r12, 0x134(r12)
/* 800257B4 000226F4 7D 89 03 A6 */ mtctr r12
/* 800257B8 000226F8 4E 80 04 21 */ bctrl
lbl_800257BC:
/* 800257BC 000226FC 7F C3 F3 78 */ mr r3, r30
/* 800257C0 00022700 81 9E 00 00 */ lwz r12, 0(r30)
/* 800257C4 00022704 81 8C 00 BC */ lwz r12, 0xbc(r12)
/* 800257C8 00022708 7D 89 03 A6 */ mtctr r12
/* 800257CC 0002270C 4E 80 04 21 */ bctrl
/* 800257D0 00022710 88 03 00 09 */ lbz r0, 9(r3)
/* 800257D4 00022714 54 1F FE FE */ rlwinm r31, r0, 0x1f, 0x1b, 0x1f
/* 800257D8 00022718 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800257DC 0002271C 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 800257E0 00022720 7F E4 FB 78 */ mr r4, r31
/* 800257E4 00022724 48 00 F8 D9 */ bl getSave__10dSv_info_cFi
/* 800257E8 00022728 3C 60 80 43 */ lis r3, lbl_804307EC@ha
/* 800257EC 0002272C 38 63 07 EC */ addi r3, r3, lbl_804307EC@l
/* 800257F0 00022730 48 23 6A 09 */ bl dSvBit_HIO_c_NS_init
/* 800257F4 00022734 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 800257F8 00022738 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 800257FC 0002273C 38 63 09 78 */ addi r3, r3, 0x978
/* 80025800 00022740 7F E4 07 74 */ extsb r4, r31
/* 80025804 00022744 48 00 F3 11 */ bl init__12dSv_danBit_cFSc
/* 80025808 00022748 7F C3 F3 78 */ mr r3, r30
/* 8002580C 0002274C 4B FF E7 45 */ bl dStage_KeepDoorInfoInit
/* 80025810 00022750 38 60 00 01 */ li r3, 1
/* 80025814 00022754 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80025818 00022758 83 C1 00 08 */ lwz r30, 8(r1)
/* 8002581C 0002275C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025820 00022760 7C 08 03 A6 */ mtlr r0
/* 80025824 00022764 38 21 00 10 */ addi r1, r1, 0x10
/* 80025828 00022768 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002582C.s
+3
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@@ -0,0 +1,3 @@
/* 8002582C 0002276C 38 00 00 00 */ li r0, 0
/* 80025830 00022770 90 03 00 8C */ stw r0, 0x8c(r3)
/* 80025834 00022774 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025838.s
+13
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/* 80025838 00022778 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002583C 0002277C 7C 08 02 A6 */ mflr r0
/* 80025840 00022780 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025844 00022784 81 83 00 00 */ lwz r12, 0(r3)
/* 80025848 00022788 81 8C 00 C0 */ lwz r12, 0xc0(r12)
/* 8002584C 0002278C 7D 89 03 A6 */ mtctr r12
/* 80025850 00022790 38 84 00 04 */ addi r4, r4, 4
/* 80025854 00022794 4E 80 04 21 */ bctrl
/* 80025858 00022798 38 60 00 01 */ li r3, 1
/* 8002585C 0002279C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025860 000227A0 7C 08 03 A6 */ mtlr r0
/* 80025864 000227A4 38 21 00 10 */ addi r1, r1, 0x10
/* 80025868 000227A8 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002586C.s
+62
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/* 8002586C 000227AC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025870 000227B0 7C 08 02 A6 */ mflr r0
/* 80025874 000227B4 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025878 000227B8 39 61 00 20 */ addi r11, r1, 0x20
/* 8002587C 000227BC 48 33 C9 59 */ bl _savegpr_27
/* 80025880 000227C0 7C 7B 1B 78 */ mr r27, r3
/* 80025884 000227C4 7C 9C 23 78 */ mr r28, r4
/* 80025888 000227C8 83 C4 00 08 */ lwz r30, 8(r4)
/* 8002588C 000227CC 3B A0 00 00 */ li r29, 0
/* 80025890 000227D0 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80025894 000227D4 3B E3 61 C0 */ addi r31, r3, g_dComIfG_gameInfo@l
/* 80025898 000227D8 48 00 00 98 */ b lbl_80025930
lbl_8002589C:
/* 8002589C 000227DC 7F E3 FB 78 */ mr r3, r31
/* 800258A0 000227E0 A0 9E 00 1E */ lhz r4, 0x1e(r30)
/* 800258A4 000227E4 88 BB 00 04 */ lbz r5, 4(r27)
/* 800258A8 000227E8 7C A5 07 74 */ extsb r5, r5
/* 800258AC 000227EC 48 00 FE 79 */ bl isActor__10dSv_info_cCFii
/* 800258B0 000227F0 2C 03 00 00 */ cmpwi r3, 0
/* 800258B4 000227F4 40 82 00 74 */ bne lbl_80025928
/* 800258B8 000227F8 88 7B 00 04 */ lbz r3, 4(r27)
/* 800258BC 000227FC 38 9E 00 0C */ addi r4, r30, 0xc
/* 800258C0 00022800 48 00 BB 75 */ bl daSus_c_NS_check
/* 800258C4 00022804 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 800258C8 00022808 40 82 00 60 */ bne lbl_80025928
/* 800258CC 0002280C 4B FF 41 DD */ bl fopAcM_CreateAppend
/* 800258D0 00022810 7C 64 1B 79 */ or. r4, r3, r3
/* 800258D4 00022814 41 82 00 54 */ beq lbl_80025928
/* 800258D8 00022818 80 1E 00 08 */ lwz r0, 8(r30)
/* 800258DC 0002281C 90 04 00 00 */ stw r0, 0(r4)
/* 800258E0 00022820 C0 1E 00 0C */ lfs f0, 0xc(r30)
/* 800258E4 00022824 D0 04 00 04 */ stfs f0, 4(r4)
/* 800258E8 00022828 C0 1E 00 10 */ lfs f0, 0x10(r30)
/* 800258EC 0002282C D0 04 00 08 */ stfs f0, 8(r4)
/* 800258F0 00022830 C0 1E 00 14 */ lfs f0, 0x14(r30)
/* 800258F4 00022834 D0 04 00 0C */ stfs f0, 0xc(r4)
/* 800258F8 00022838 A8 1E 00 18 */ lha r0, 0x18(r30)
/* 800258FC 0002283C B0 04 00 10 */ sth r0, 0x10(r4)
/* 80025900 00022840 A8 1E 00 1A */ lha r0, 0x1a(r30)
/* 80025904 00022844 B0 04 00 12 */ sth r0, 0x12(r4)
/* 80025908 00022848 A8 1E 00 1C */ lha r0, 0x1c(r30)
/* 8002590C 0002284C B0 04 00 14 */ sth r0, 0x14(r4)
/* 80025910 00022850 A0 1E 00 1E */ lhz r0, 0x1e(r30)
/* 80025914 00022854 B0 04 00 16 */ sth r0, 0x16(r4)
/* 80025918 00022858 88 1B 00 04 */ lbz r0, 4(r27)
/* 8002591C 0002285C 98 04 00 21 */ stb r0, 0x21(r4)
/* 80025920 00022860 7F C3 F3 78 */ mr r3, r30
/* 80025924 00022864 4B FF F5 D9 */ bl dStage_actorCreate
lbl_80025928:
/* 80025928 00022868 3B DE 00 20 */ addi r30, r30, 0x20
/* 8002592C 0002286C 3B BD 00 01 */ addi r29, r29, 1
lbl_80025930:
/* 80025930 00022870 80 1C 00 04 */ lwz r0, 4(r28)
/* 80025934 00022874 7C 1D 00 00 */ cmpw r29, r0
/* 80025938 00022878 41 80 FF 64 */ blt lbl_8002589C
/* 8002593C 0002287C 38 60 00 01 */ li r3, 1
/* 80025940 00022880 39 61 00 20 */ addi r11, r1, 0x20
/* 80025944 00022884 48 33 C8 DD */ bl _restgpr_27
/* 80025948 00022888 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8002594C 0002288C 7C 08 03 A6 */ mtlr r0
/* 80025950 00022890 38 21 00 20 */ addi r1, r1, 0x20
/* 80025954 00022894 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025958.s
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/* 80025958 00022898 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8002595C 0002289C 7C 08 02 A6 */ mflr r0
/* 80025960 000228A0 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025964 000228A4 39 61 00 20 */ addi r11, r1, 0x20
/* 80025968 000228A8 48 33 C8 71 */ bl _savegpr_28
/* 8002596C 000228AC 7C 7C 1B 78 */ mr r28, r3
/* 80025970 000228B0 7C 9D 23 78 */ mr r29, r4
/* 80025974 000228B4 83 E4 00 08 */ lwz r31, 8(r4)
/* 80025978 000228B8 3B C0 00 00 */ li r30, 0
/* 8002597C 000228BC 48 00 00 94 */ b lbl_80025A10
lbl_80025980:
/* 80025980 000228C0 88 7C 00 04 */ lbz r3, 4(r28)
/* 80025984 000228C4 38 9F 00 0C */ addi r4, r31, 0xc
/* 80025988 000228C8 48 00 BA AD */ bl daSus_c_NS_check
/* 8002598C 000228CC 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 80025990 000228D0 40 82 00 78 */ bne lbl_80025A08
/* 80025994 000228D4 4B FF 41 15 */ bl fopAcM_CreateAppend
/* 80025998 000228D8 7C 64 1B 79 */ or. r4, r3, r3
/* 8002599C 000228DC 41 82 00 6C */ beq lbl_80025A08
/* 800259A0 000228E0 80 1F 00 08 */ lwz r0, 8(r31)
/* 800259A4 000228E4 90 04 00 00 */ stw r0, 0(r4)
/* 800259A8 000228E8 C0 1F 00 0C */ lfs f0, 0xc(r31)
/* 800259AC 000228EC D0 04 00 04 */ stfs f0, 4(r4)
/* 800259B0 000228F0 C0 1F 00 10 */ lfs f0, 0x10(r31)
/* 800259B4 000228F4 D0 04 00 08 */ stfs f0, 8(r4)
/* 800259B8 000228F8 C0 1F 00 14 */ lfs f0, 0x14(r31)
/* 800259BC 000228FC D0 04 00 0C */ stfs f0, 0xc(r4)
/* 800259C0 00022900 A8 1F 00 18 */ lha r0, 0x18(r31)
/* 800259C4 00022904 B0 04 00 10 */ sth r0, 0x10(r4)
/* 800259C8 00022908 A8 1F 00 1A */ lha r0, 0x1a(r31)
/* 800259CC 0002290C B0 04 00 12 */ sth r0, 0x12(r4)
/* 800259D0 00022910 A8 1F 00 1C */ lha r0, 0x1c(r31)
/* 800259D4 00022914 B0 04 00 14 */ sth r0, 0x14(r4)
/* 800259D8 00022918 A0 1F 00 1E */ lhz r0, 0x1e(r31)
/* 800259DC 0002291C B0 04 00 16 */ sth r0, 0x16(r4)
/* 800259E0 00022920 88 1C 00 04 */ lbz r0, 4(r28)
/* 800259E4 00022924 98 04 00 21 */ stb r0, 0x21(r4)
/* 800259E8 00022928 88 1F 00 20 */ lbz r0, 0x20(r31)
/* 800259EC 0002292C 98 04 00 18 */ stb r0, 0x18(r4)
/* 800259F0 00022930 88 1F 00 21 */ lbz r0, 0x21(r31)
/* 800259F4 00022934 98 04 00 19 */ stb r0, 0x19(r4)
/* 800259F8 00022938 88 1F 00 22 */ lbz r0, 0x22(r31)
/* 800259FC 0002293C 98 04 00 1A */ stb r0, 0x1a(r4)
/* 80025A00 00022940 7F E3 FB 78 */ mr r3, r31
/* 80025A04 00022944 4B FF F4 F9 */ bl dStage_actorCreate
lbl_80025A08:
/* 80025A08 00022948 3B FF 00 24 */ addi r31, r31, 0x24
/* 80025A0C 0002294C 3B DE 00 01 */ addi r30, r30, 1
lbl_80025A10:
/* 80025A10 00022950 80 1D 00 04 */ lwz r0, 4(r29)
/* 80025A14 00022954 7C 1E 00 00 */ cmpw r30, r0
/* 80025A18 00022958 41 80 FF 68 */ blt lbl_80025980
/* 80025A1C 0002295C 38 60 00 01 */ li r3, 1
/* 80025A20 00022960 39 61 00 20 */ addi r11, r1, 0x20
/* 80025A24 00022964 48 33 C8 01 */ bl _restgpr_28
/* 80025A28 00022968 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80025A2C 0002296C 7C 08 03 A6 */ mtlr r0
/* 80025A30 00022970 38 21 00 20 */ addi r1, r1, 0x20
/* 80025A34 00022974 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025A38.s
+62
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/* 80025A38 00022978 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025A3C 0002297C 7C 08 02 A6 */ mflr r0
/* 80025A40 00022980 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025A44 00022984 39 61 00 20 */ addi r11, r1, 0x20
/* 80025A48 00022988 48 33 C7 8D */ bl _savegpr_27
/* 80025A4C 0002298C 7C 7B 1B 78 */ mr r27, r3
/* 80025A50 00022990 7C 9C 23 78 */ mr r28, r4
/* 80025A54 00022994 83 C4 00 08 */ lwz r30, 8(r4)
/* 80025A58 00022998 3B A0 00 00 */ li r29, 0
/* 80025A5C 0002299C 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80025A60 000229A0 3B E3 61 C0 */ addi r31, r3, g_dComIfG_gameInfo@l
/* 80025A64 000229A4 48 00 00 98 */ b lbl_80025AFC
lbl_80025A68:
/* 80025A68 000229A8 7F E3 FB 78 */ mr r3, r31
/* 80025A6C 000229AC A0 9E 00 1E */ lhz r4, 0x1e(r30)
/* 80025A70 000229B0 88 BB 00 04 */ lbz r5, 4(r27)
/* 80025A74 000229B4 7C A5 07 74 */ extsb r5, r5
/* 80025A78 000229B8 48 00 FC AD */ bl isActor__10dSv_info_cCFii
/* 80025A7C 000229BC 2C 03 00 00 */ cmpwi r3, 0
/* 80025A80 000229C0 40 82 00 74 */ bne lbl_80025AF4
/* 80025A84 000229C4 88 7B 00 04 */ lbz r3, 4(r27)
/* 80025A88 000229C8 38 9E 00 0C */ addi r4, r30, 0xc
/* 80025A8C 000229CC 48 00 B9 A9 */ bl daSus_c_NS_check
/* 80025A90 000229D0 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 80025A94 000229D4 40 82 00 60 */ bne lbl_80025AF4
/* 80025A98 000229D8 4B FF 40 11 */ bl fopAcM_CreateAppend
/* 80025A9C 000229DC 7C 64 1B 79 */ or. r4, r3, r3
/* 80025AA0 000229E0 41 82 00 54 */ beq lbl_80025AF4
/* 80025AA4 000229E4 80 1E 00 08 */ lwz r0, 8(r30)
/* 80025AA8 000229E8 90 04 00 00 */ stw r0, 0(r4)
/* 80025AAC 000229EC C0 1E 00 0C */ lfs f0, 0xc(r30)
/* 80025AB0 000229F0 D0 04 00 04 */ stfs f0, 4(r4)
/* 80025AB4 000229F4 C0 1E 00 10 */ lfs f0, 0x10(r30)
/* 80025AB8 000229F8 D0 04 00 08 */ stfs f0, 8(r4)
/* 80025ABC 000229FC C0 1E 00 14 */ lfs f0, 0x14(r30)
/* 80025AC0 00022A00 D0 04 00 0C */ stfs f0, 0xc(r4)
/* 80025AC4 00022A04 A8 1E 00 18 */ lha r0, 0x18(r30)
/* 80025AC8 00022A08 B0 04 00 10 */ sth r0, 0x10(r4)
/* 80025ACC 00022A0C A8 1E 00 1A */ lha r0, 0x1a(r30)
/* 80025AD0 00022A10 B0 04 00 12 */ sth r0, 0x12(r4)
/* 80025AD4 00022A14 A8 1E 00 1C */ lha r0, 0x1c(r30)
/* 80025AD8 00022A18 B0 04 00 14 */ sth r0, 0x14(r4)
/* 80025ADC 00022A1C A0 1E 00 1E */ lhz r0, 0x1e(r30)
/* 80025AE0 00022A20 B0 04 00 16 */ sth r0, 0x16(r4)
/* 80025AE4 00022A24 88 1B 00 04 */ lbz r0, 4(r27)
/* 80025AE8 00022A28 98 04 00 21 */ stb r0, 0x21(r4)
/* 80025AEC 00022A2C 7F C3 F3 78 */ mr r3, r30
/* 80025AF0 00022A30 4B FF F4 0D */ bl dStage_actorCreate
lbl_80025AF4:
/* 80025AF4 00022A34 3B DE 00 20 */ addi r30, r30, 0x20
/* 80025AF8 00022A38 3B BD 00 01 */ addi r29, r29, 1
lbl_80025AFC:
/* 80025AFC 00022A3C 80 1C 00 04 */ lwz r0, 4(r28)
/* 80025B00 00022A40 7C 1D 00 00 */ cmpw r29, r0
/* 80025B04 00022A44 41 80 FF 64 */ blt lbl_80025A68
/* 80025B08 00022A48 38 60 00 01 */ li r3, 1
/* 80025B0C 00022A4C 39 61 00 20 */ addi r11, r1, 0x20
/* 80025B10 00022A50 48 33 C7 11 */ bl _restgpr_27
/* 80025B14 00022A54 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80025B18 00022A58 7C 08 03 A6 */ mtlr r0
/* 80025B1C 00022A5C 38 21 00 20 */ addi r1, r1, 0x20
/* 80025B20 00022A60 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025B24.s
+57
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/* 80025B24 00022A64 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025B28 00022A68 7C 08 02 A6 */ mflr r0
/* 80025B2C 00022A6C 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025B30 00022A70 39 61 00 20 */ addi r11, r1, 0x20
/* 80025B34 00022A74 48 33 C6 A1 */ bl _savegpr_27
/* 80025B38 00022A78 7C 7B 1B 78 */ mr r27, r3
/* 80025B3C 00022A7C 7C 9C 23 78 */ mr r28, r4
/* 80025B40 00022A80 83 C4 00 08 */ lwz r30, 8(r4)
/* 80025B44 00022A84 3B A0 00 00 */ li r29, 0
/* 80025B48 00022A88 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80025B4C 00022A8C 3B E3 61 C0 */ addi r31, r3, g_dComIfG_gameInfo@l
/* 80025B50 00022A90 48 00 00 84 */ b lbl_80025BD4
lbl_80025B54:
/* 80025B54 00022A94 7F E3 FB 78 */ mr r3, r31
/* 80025B58 00022A98 A0 9E 00 1E */ lhz r4, 0x1e(r30)
/* 80025B5C 00022A9C 88 BB 00 04 */ lbz r5, 4(r27)
/* 80025B60 00022AA0 7C A5 07 74 */ extsb r5, r5
/* 80025B64 00022AA4 48 00 FB C1 */ bl isActor__10dSv_info_cCFii
/* 80025B68 00022AA8 2C 03 00 00 */ cmpwi r3, 0
/* 80025B6C 00022AAC 40 82 00 60 */ bne lbl_80025BCC
/* 80025B70 00022AB0 4B FF 3F 39 */ bl fopAcM_CreateAppend
/* 80025B74 00022AB4 7C 64 1B 79 */ or. r4, r3, r3
/* 80025B78 00022AB8 41 82 00 54 */ beq lbl_80025BCC
/* 80025B7C 00022ABC 80 1E 00 08 */ lwz r0, 8(r30)
/* 80025B80 00022AC0 90 04 00 00 */ stw r0, 0(r4)
/* 80025B84 00022AC4 C0 1E 00 0C */ lfs f0, 0xc(r30)
/* 80025B88 00022AC8 D0 04 00 04 */ stfs f0, 4(r4)
/* 80025B8C 00022ACC C0 1E 00 10 */ lfs f0, 0x10(r30)
/* 80025B90 00022AD0 D0 04 00 08 */ stfs f0, 8(r4)
/* 80025B94 00022AD4 C0 1E 00 14 */ lfs f0, 0x14(r30)
/* 80025B98 00022AD8 D0 04 00 0C */ stfs f0, 0xc(r4)
/* 80025B9C 00022ADC A8 1E 00 18 */ lha r0, 0x18(r30)
/* 80025BA0 00022AE0 B0 04 00 10 */ sth r0, 0x10(r4)
/* 80025BA4 00022AE4 A8 1E 00 1A */ lha r0, 0x1a(r30)
/* 80025BA8 00022AE8 B0 04 00 12 */ sth r0, 0x12(r4)
/* 80025BAC 00022AEC A8 1E 00 1C */ lha r0, 0x1c(r30)
/* 80025BB0 00022AF0 B0 04 00 14 */ sth r0, 0x14(r4)
/* 80025BB4 00022AF4 A0 1E 00 1E */ lhz r0, 0x1e(r30)
/* 80025BB8 00022AF8 B0 04 00 16 */ sth r0, 0x16(r4)
/* 80025BBC 00022AFC 88 1B 00 04 */ lbz r0, 4(r27)
/* 80025BC0 00022B00 98 04 00 21 */ stb r0, 0x21(r4)
/* 80025BC4 00022B04 7F C3 F3 78 */ mr r3, r30
/* 80025BC8 00022B08 4B FF F3 35 */ bl dStage_actorCreate
lbl_80025BCC:
/* 80025BCC 00022B0C 3B DE 00 20 */ addi r30, r30, 0x20
/* 80025BD0 00022B10 3B BD 00 01 */ addi r29, r29, 1
lbl_80025BD4:
/* 80025BD4 00022B14 80 1C 00 04 */ lwz r0, 4(r28)
/* 80025BD8 00022B18 7C 1D 00 00 */ cmpw r29, r0
/* 80025BDC 00022B1C 41 80 FF 78 */ blt lbl_80025B54
/* 80025BE0 00022B20 38 60 00 01 */ li r3, 1
/* 80025BE4 00022B24 39 61 00 20 */ addi r11, r1, 0x20
/* 80025BE8 00022B28 48 33 C6 39 */ bl _restgpr_27
/* 80025BEC 00022B2C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80025BF0 00022B30 7C 08 03 A6 */ mtlr r0
/* 80025BF4 00022B34 38 21 00 20 */ addi r1, r1, 0x20
/* 80025BF8 00022B38 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025BFC.s
+59
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/* 80025BFC 00022B3C 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025C00 00022B40 7C 08 02 A6 */ mflr r0
/* 80025C04 00022B44 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025C08 00022B48 39 61 00 20 */ addi r11, r1, 0x20
/* 80025C0C 00022B4C 48 33 C5 CD */ bl _savegpr_28
/* 80025C10 00022B50 7C 7C 1B 78 */ mr r28, r3
/* 80025C14 00022B54 7C 9D 23 78 */ mr r29, r4
/* 80025C18 00022B58 83 E4 00 08 */ lwz r31, 8(r4)
/* 80025C1C 00022B5C 3B C0 00 00 */ li r30, 0
/* 80025C20 00022B60 48 00 00 94 */ b lbl_80025CB4
lbl_80025C24:
/* 80025C24 00022B64 88 7C 00 04 */ lbz r3, 4(r28)
/* 80025C28 00022B68 38 9F 00 0C */ addi r4, r31, 0xc
/* 80025C2C 00022B6C 48 00 B8 09 */ bl daSus_c_NS_check
/* 80025C30 00022B70 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 80025C34 00022B74 40 82 00 78 */ bne lbl_80025CAC
/* 80025C38 00022B78 4B FF 3E 71 */ bl fopAcM_CreateAppend
/* 80025C3C 00022B7C 7C 64 1B 79 */ or. r4, r3, r3
/* 80025C40 00022B80 41 82 00 6C */ beq lbl_80025CAC
/* 80025C44 00022B84 80 1F 00 08 */ lwz r0, 8(r31)
/* 80025C48 00022B88 90 04 00 00 */ stw r0, 0(r4)
/* 80025C4C 00022B8C C0 1F 00 0C */ lfs f0, 0xc(r31)
/* 80025C50 00022B90 D0 04 00 04 */ stfs f0, 4(r4)
/* 80025C54 00022B94 C0 1F 00 10 */ lfs f0, 0x10(r31)
/* 80025C58 00022B98 D0 04 00 08 */ stfs f0, 8(r4)
/* 80025C5C 00022B9C C0 1F 00 14 */ lfs f0, 0x14(r31)
/* 80025C60 00022BA0 D0 04 00 0C */ stfs f0, 0xc(r4)
/* 80025C64 00022BA4 A8 1F 00 18 */ lha r0, 0x18(r31)
/* 80025C68 00022BA8 B0 04 00 10 */ sth r0, 0x10(r4)
/* 80025C6C 00022BAC A8 1F 00 1A */ lha r0, 0x1a(r31)
/* 80025C70 00022BB0 B0 04 00 12 */ sth r0, 0x12(r4)
/* 80025C74 00022BB4 A8 1F 00 1C */ lha r0, 0x1c(r31)
/* 80025C78 00022BB8 B0 04 00 14 */ sth r0, 0x14(r4)
/* 80025C7C 00022BBC A0 1F 00 1E */ lhz r0, 0x1e(r31)
/* 80025C80 00022BC0 B0 04 00 16 */ sth r0, 0x16(r4)
/* 80025C84 00022BC4 88 1C 00 04 */ lbz r0, 4(r28)
/* 80025C88 00022BC8 98 04 00 21 */ stb r0, 0x21(r4)
/* 80025C8C 00022BCC 88 1F 00 20 */ lbz r0, 0x20(r31)
/* 80025C90 00022BD0 98 04 00 18 */ stb r0, 0x18(r4)
/* 80025C94 00022BD4 88 1F 00 21 */ lbz r0, 0x21(r31)
/* 80025C98 00022BD8 98 04 00 19 */ stb r0, 0x19(r4)
/* 80025C9C 00022BDC 88 1F 00 22 */ lbz r0, 0x22(r31)
/* 80025CA0 00022BE0 98 04 00 1A */ stb r0, 0x1a(r4)
/* 80025CA4 00022BE4 7F E3 FB 78 */ mr r3, r31
/* 80025CA8 00022BE8 4B FF F2 55 */ bl dStage_actorCreate
lbl_80025CAC:
/* 80025CAC 00022BEC 3B FF 00 24 */ addi r31, r31, 0x24
/* 80025CB0 00022BF0 3B DE 00 01 */ addi r30, r30, 1
lbl_80025CB4:
/* 80025CB4 00022BF4 80 1D 00 04 */ lwz r0, 4(r29)
/* 80025CB8 00022BF8 7C 1E 00 00 */ cmpw r30, r0
/* 80025CBC 00022BFC 41 80 FF 68 */ blt lbl_80025C24
/* 80025CC0 00022C00 38 60 00 01 */ li r3, 1
/* 80025CC4 00022C04 39 61 00 20 */ addi r11, r1, 0x20
/* 80025CC8 00022C08 48 33 C5 5D */ bl _restgpr_28
/* 80025CCC 00022C0C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80025CD0 00022C10 7C 08 03 A6 */ mtlr r0
/* 80025CD4 00022C14 38 21 00 20 */ addi r1, r1, 0x20
/* 80025CD8 00022C18 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025CDC.s
+54
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/* 80025CDC 00022C1C 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025CE0 00022C20 7C 08 02 A6 */ mflr r0
/* 80025CE4 00022C24 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025CE8 00022C28 39 61 00 20 */ addi r11, r1, 0x20
/* 80025CEC 00022C2C 48 33 C4 ED */ bl _savegpr_28
/* 80025CF0 00022C30 7C 7C 1B 78 */ mr r28, r3
/* 80025CF4 00022C34 7C 9D 23 78 */ mr r29, r4
/* 80025CF8 00022C38 83 E4 00 08 */ lwz r31, 8(r4)
/* 80025CFC 00022C3C 3B C0 00 00 */ li r30, 0
/* 80025D00 00022C40 48 00 00 80 */ b lbl_80025D80
lbl_80025D04:
/* 80025D04 00022C44 4B FF 3D A5 */ bl fopAcM_CreateAppend
/* 80025D08 00022C48 7C 64 1B 79 */ or. r4, r3, r3
/* 80025D0C 00022C4C 41 82 00 6C */ beq lbl_80025D78
/* 80025D10 00022C50 80 1F 00 08 */ lwz r0, 8(r31)
/* 80025D14 00022C54 90 04 00 00 */ stw r0, 0(r4)
/* 80025D18 00022C58 C0 1F 00 0C */ lfs f0, 0xc(r31)
/* 80025D1C 00022C5C D0 04 00 04 */ stfs f0, 4(r4)
/* 80025D20 00022C60 C0 1F 00 10 */ lfs f0, 0x10(r31)
/* 80025D24 00022C64 D0 04 00 08 */ stfs f0, 8(r4)
/* 80025D28 00022C68 C0 1F 00 14 */ lfs f0, 0x14(r31)
/* 80025D2C 00022C6C D0 04 00 0C */ stfs f0, 0xc(r4)
/* 80025D30 00022C70 A8 1F 00 18 */ lha r0, 0x18(r31)
/* 80025D34 00022C74 B0 04 00 10 */ sth r0, 0x10(r4)
/* 80025D38 00022C78 A8 1F 00 1A */ lha r0, 0x1a(r31)
/* 80025D3C 00022C7C B0 04 00 12 */ sth r0, 0x12(r4)
/* 80025D40 00022C80 A8 1F 00 1C */ lha r0, 0x1c(r31)
/* 80025D44 00022C84 B0 04 00 14 */ sth r0, 0x14(r4)
/* 80025D48 00022C88 A0 1F 00 1E */ lhz r0, 0x1e(r31)
/* 80025D4C 00022C8C B0 04 00 16 */ sth r0, 0x16(r4)
/* 80025D50 00022C90 88 1C 00 04 */ lbz r0, 4(r28)
/* 80025D54 00022C94 98 04 00 21 */ stb r0, 0x21(r4)
/* 80025D58 00022C98 88 1F 00 20 */ lbz r0, 0x20(r31)
/* 80025D5C 00022C9C 98 04 00 18 */ stb r0, 0x18(r4)
/* 80025D60 00022CA0 88 1F 00 21 */ lbz r0, 0x21(r31)
/* 80025D64 00022CA4 98 04 00 19 */ stb r0, 0x19(r4)
/* 80025D68 00022CA8 88 1F 00 22 */ lbz r0, 0x22(r31)
/* 80025D6C 00022CAC 98 04 00 1A */ stb r0, 0x1a(r4)
/* 80025D70 00022CB0 7F E3 FB 78 */ mr r3, r31
/* 80025D74 00022CB4 4B FF F1 89 */ bl dStage_actorCreate
lbl_80025D78:
/* 80025D78 00022CB8 3B FF 00 24 */ addi r31, r31, 0x24
/* 80025D7C 00022CBC 3B DE 00 01 */ addi r30, r30, 1
lbl_80025D80:
/* 80025D80 00022CC0 80 1D 00 04 */ lwz r0, 4(r29)
/* 80025D84 00022CC4 7C 1E 00 00 */ cmpw r30, r0
/* 80025D88 00022CC8 41 80 FF 7C */ blt lbl_80025D04
/* 80025D8C 00022CCC 38 60 00 01 */ li r3, 1
/* 80025D90 00022CD0 39 61 00 20 */ addi r11, r1, 0x20
/* 80025D94 00022CD4 48 33 C4 91 */ bl _restgpr_28
/* 80025D98 00022CD8 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80025D9C 00022CDC 7C 08 03 A6 */ mtlr r0
/* 80025DA0 00022CE0 38 21 00 20 */ addi r1, r1, 0x20
/* 80025DA4 00022CE4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025DA8.s
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/* 80025DA8 00022CE8 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025DAC 00022CEC 7C 08 02 A6 */ mflr r0
/* 80025DB0 00022CF0 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025DB4 00022CF4 39 61 00 20 */ addi r11, r1, 0x20
/* 80025DB8 00022CF8 48 33 C4 25 */ bl _savegpr_29
/* 80025DBC 00022CFC 7C DD 33 78 */ mr r29, r6
/* 80025DC0 00022D00 3B E4 00 04 */ addi r31, r4, 4
/* 80025DC4 00022D04 83 C4 00 08 */ lwz r30, 8(r4)
/* 80025DC8 00022D08 7F E4 FB 78 */ mr r4, r31
/* 80025DCC 00022D0C 81 83 00 00 */ lwz r12, 0(r3)
/* 80025DD0 00022D10 81 8C 00 2C */ lwz r12, 0x2c(r12)
/* 80025DD4 00022D14 7D 89 03 A6 */ mtctr r12
/* 80025DD8 00022D18 4E 80 04 21 */ bctrl
/* 80025DDC 00022D1C 38 C0 00 00 */ li r6, 0
/* 80025DE0 00022D20 38 60 00 00 */ li r3, 0
/* 80025DE4 00022D24 3C A0 80 00 */ lis r5, 0x8000
/* 80025DE8 00022D28 48 00 00 30 */ b lbl_80025E18
lbl_80025DEC:
/* 80025DEC 00022D2C 7C 1E 18 2E */ lwzx r0, r30, r3
/* 80025DF0 00022D30 7C 00 28 40 */ cmplw r0, r5
/* 80025DF4 00022D34 40 80 00 1C */ bge lbl_80025E10
/* 80025DF8 00022D38 7C 1D 02 14 */ add r0, r29, r0
/* 80025DFC 00022D3C 7C 1E 19 2E */ stwx r0, r30, r3
/* 80025E00 00022D40 7C 9E 18 2E */ lwzx r4, r30, r3
/* 80025E04 00022D44 80 04 00 04 */ lwz r0, 4(r4)
/* 80025E08 00022D48 7C 1D 02 14 */ add r0, r29, r0
/* 80025E0C 00022D4C 90 04 00 04 */ stw r0, 4(r4)
lbl_80025E10:
/* 80025E10 00022D50 38 C6 00 01 */ addi r6, r6, 1
/* 80025E14 00022D54 38 63 00 04 */ addi r3, r3, 4
lbl_80025E18:
/* 80025E18 00022D58 80 1F 00 00 */ lwz r0, 0(r31)
/* 80025E1C 00022D5C 7C 06 00 00 */ cmpw r6, r0
/* 80025E20 00022D60 41 80 FF CC */ blt lbl_80025DEC
/* 80025E24 00022D64 38 60 00 01 */ li r3, 1
/* 80025E28 00022D68 39 61 00 20 */ addi r11, r1, 0x20
/* 80025E2C 00022D6C 48 33 C3 FD */ bl _restgpr_29
/* 80025E30 00022D70 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80025E34 00022D74 7C 08 03 A6 */ mtlr r0
/* 80025E38 00022D78 38 21 00 20 */ addi r1, r1, 0x20
/* 80025E3C 00022D7C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025E40.s
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/* 80025E40 00022D80 2C 04 00 00 */ cmpwi r4, 0
/* 80025E44 00022D84 41 80 00 10 */ blt lbl_80025E54
/* 80025E48 00022D88 80 03 00 00 */ lwz r0, 0(r3)
/* 80025E4C 00022D8C 7C 04 00 00 */ cmpw r4, r0
/* 80025E50 00022D90 41 80 00 08 */ blt lbl_80025E58
lbl_80025E54:
/* 80025E54 00022D94 38 80 00 00 */ li r4, 0
lbl_80025E58:
/* 80025E58 00022D98 80 63 00 04 */ lwz r3, 4(r3)
/* 80025E5C 00022D9C 54 80 10 3A */ slwi r0, r4, 2
/* 80025E60 00022DA0 7C 63 00 2E */ lwzx r3, r3, r0
/* 80025E64 00022DA4 88 03 00 01 */ lbz r0, 1(r3)
/* 80025E68 00022DA8 54 03 06 7E */ clrlwi r3, r0, 0x19
/* 80025E6C 00022DAC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025E70.s
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/* 80025E70 00022DB0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025E74 00022DB4 7C 08 02 A6 */ mflr r0
/* 80025E78 00022DB8 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025E7C 00022DBC 81 83 00 00 */ lwz r12, 0(r3)
/* 80025E80 00022DC0 81 8C 00 C8 */ lwz r12, 0xc8(r12)
/* 80025E84 00022DC4 7D 89 03 A6 */ mtctr r12
/* 80025E88 00022DC8 38 84 00 04 */ addi r4, r4, 4
/* 80025E8C 00022DCC 4E 80 04 21 */ bctrl
/* 80025E90 00022DD0 38 60 00 01 */ li r3, 1
/* 80025E94 00022DD4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025E98 00022DD8 7C 08 03 A6 */ mtlr r0
/* 80025E9C 00022DDC 38 21 00 10 */ addi r1, r1, 0x10
/* 80025EA0 00022DE0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025EA4.s
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/* 80025EA4 00022DE4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025EA8 00022DE8 7C 08 02 A6 */ mflr r0
/* 80025EAC 00022DEC 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025EB0 00022DF0 39 61 00 20 */ addi r11, r1, 0x20
/* 80025EB4 00022DF4 48 33 C3 21 */ bl _savegpr_27
/* 80025EB8 00022DF8 7C 7B 1B 78 */ mr r27, r3
/* 80025EBC 00022DFC 3B C4 00 04 */ addi r30, r4, 4
/* 80025EC0 00022E00 83 A4 00 08 */ lwz r29, 8(r4)
/* 80025EC4 00022E04 7F C4 F3 78 */ mr r4, r30
/* 80025EC8 00022E08 81 83 00 00 */ lwz r12, 0(r3)
/* 80025ECC 00022E0C 81 8C 00 D0 */ lwz r12, 0xd0(r12)
/* 80025ED0 00022E10 7D 89 03 A6 */ mtctr r12
/* 80025ED4 00022E14 4E 80 04 21 */ bctrl
/* 80025ED8 00022E18 3B 80 00 00 */ li r28, 0
/* 80025EDC 00022E1C 3F E0 80 00 */ lis r31, 0x8000
/* 80025EE0 00022E20 48 00 00 3C */ b lbl_80025F1C
lbl_80025EE4:
/* 80025EE4 00022E24 80 1D 00 08 */ lwz r0, 8(r29)
/* 80025EE8 00022E28 7C 00 F8 40 */ cmplw r0, r31
/* 80025EEC 00022E2C 40 80 00 28 */ bge lbl_80025F14
/* 80025EF0 00022E30 7F 63 DB 78 */ mr r3, r27
/* 80025EF4 00022E34 81 9B 00 00 */ lwz r12, 0(r27)
/* 80025EF8 00022E38 81 8C 00 CC */ lwz r12, 0xcc(r12)
/* 80025EFC 00022E3C 7D 89 03 A6 */ mtctr r12
/* 80025F00 00022E40 4E 80 04 21 */ bctrl
/* 80025F04 00022E44 80 63 00 04 */ lwz r3, 4(r3)
/* 80025F08 00022E48 80 1D 00 08 */ lwz r0, 8(r29)
/* 80025F0C 00022E4C 7C 00 1A 14 */ add r0, r0, r3
/* 80025F10 00022E50 90 1D 00 08 */ stw r0, 8(r29)
lbl_80025F14:
/* 80025F14 00022E54 3B BD 00 0C */ addi r29, r29, 0xc
/* 80025F18 00022E58 3B 9C 00 01 */ addi r28, r28, 1
lbl_80025F1C:
/* 80025F1C 00022E5C 80 1E 00 00 */ lwz r0, 0(r30)
/* 80025F20 00022E60 7C 1C 00 00 */ cmpw r28, r0
/* 80025F24 00022E64 41 80 FF C0 */ blt lbl_80025EE4
/* 80025F28 00022E68 38 60 00 01 */ li r3, 1
/* 80025F2C 00022E6C 39 61 00 20 */ addi r11, r1, 0x20
/* 80025F30 00022E70 48 33 C2 F1 */ bl _restgpr_27
/* 80025F34 00022E74 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80025F38 00022E78 7C 08 03 A6 */ mtlr r0
/* 80025F3C 00022E7C 38 21 00 20 */ addi r1, r1, 0x20
/* 80025F40 00022E80 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025F44.s
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/* 80025F44 00022E84 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80025F48 00022E88 7C 08 02 A6 */ mflr r0
/* 80025F4C 00022E8C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80025F50 00022E90 81 83 00 00 */ lwz r12, 0(r3)
/* 80025F54 00022E94 81 8C 00 D8 */ lwz r12, 0xd8(r12)
/* 80025F58 00022E98 7D 89 03 A6 */ mtctr r12
/* 80025F5C 00022E9C 38 84 00 04 */ addi r4, r4, 4
/* 80025F60 00022EA0 4E 80 04 21 */ bctrl
/* 80025F64 00022EA4 38 60 00 01 */ li r3, 1
/* 80025F68 00022EA8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80025F6C 00022EAC 7C 08 03 A6 */ mtlr r0
/* 80025F70 00022EB0 38 21 00 10 */ addi r1, r1, 0x10
/* 80025F74 00022EB4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80025F78.s
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/* 80025F78 00022EB8 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80025F7C 00022EBC 7C 08 02 A6 */ mflr r0
/* 80025F80 00022EC0 90 01 00 24 */ stw r0, 0x24(r1)
/* 80025F84 00022EC4 39 61 00 20 */ addi r11, r1, 0x20
/* 80025F88 00022EC8 48 33 C2 4D */ bl _savegpr_27
/* 80025F8C 00022ECC 7C 7B 1B 78 */ mr r27, r3
/* 80025F90 00022ED0 3B C4 00 04 */ addi r30, r4, 4
/* 80025F94 00022ED4 83 A4 00 08 */ lwz r29, 8(r4)
/* 80025F98 00022ED8 7F C4 F3 78 */ mr r4, r30
/* 80025F9C 00022EDC 81 83 00 00 */ lwz r12, 0(r3)
/* 80025FA0 00022EE0 81 8C 00 E0 */ lwz r12, 0xe0(r12)
/* 80025FA4 00022EE4 7D 89 03 A6 */ mtctr r12
/* 80025FA8 00022EE8 4E 80 04 21 */ bctrl
/* 80025FAC 00022EEC 3B 80 00 00 */ li r28, 0
/* 80025FB0 00022EF0 3F E0 80 00 */ lis r31, 0x8000
/* 80025FB4 00022EF4 48 00 00 3C */ b lbl_80025FF0
lbl_80025FB8:
/* 80025FB8 00022EF8 80 1D 00 08 */ lwz r0, 8(r29)
/* 80025FBC 00022EFC 7C 00 F8 40 */ cmplw r0, r31
/* 80025FC0 00022F00 40 80 00 28 */ bge lbl_80025FE8
/* 80025FC4 00022F04 7F 63 DB 78 */ mr r3, r27
/* 80025FC8 00022F08 81 9B 00 00 */ lwz r12, 0(r27)
/* 80025FCC 00022F0C 81 8C 00 DC */ lwz r12, 0xdc(r12)
/* 80025FD0 00022F10 7D 89 03 A6 */ mtctr r12
/* 80025FD4 00022F14 4E 80 04 21 */ bctrl
/* 80025FD8 00022F18 80 63 00 04 */ lwz r3, 4(r3)
/* 80025FDC 00022F1C 80 1D 00 08 */ lwz r0, 8(r29)
/* 80025FE0 00022F20 7C 00 1A 14 */ add r0, r0, r3
/* 80025FE4 00022F24 90 1D 00 08 */ stw r0, 8(r29)
lbl_80025FE8:
/* 80025FE8 00022F28 3B BD 00 0C */ addi r29, r29, 0xc
/* 80025FEC 00022F2C 3B 9C 00 01 */ addi r28, r28, 1
lbl_80025FF0:
/* 80025FF0 00022F30 80 1E 00 00 */ lwz r0, 0(r30)
/* 80025FF4 00022F34 7C 1C 00 00 */ cmpw r28, r0
/* 80025FF8 00022F38 41 80 FF C0 */ blt lbl_80025FB8
/* 80025FFC 00022F3C 38 60 00 01 */ li r3, 1
/* 80026000 00022F40 39 61 00 20 */ addi r11, r1, 0x20
/* 80026004 00022F44 48 33 C2 1D */ bl _restgpr_27
/* 80026008 00022F48 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8002600C 00022F4C 7C 08 03 A6 */ mtlr r0
/* 80026010 00022F50 38 21 00 20 */ addi r1, r1, 0x20
/* 80026014 00022F54 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80026018.s
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/* 80026018 00022F58 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002601C 00022F5C 7C 08 02 A6 */ mflr r0
/* 80026020 00022F60 90 01 00 14 */ stw r0, 0x14(r1)
/* 80026024 00022F64 81 83 00 00 */ lwz r12, 0(r3)
/* 80026028 00022F68 81 8C 00 E8 */ lwz r12, 0xe8(r12)
/* 8002602C 00022F6C 7D 89 03 A6 */ mtctr r12
/* 80026030 00022F70 38 84 00 04 */ addi r4, r4, 4
/* 80026034 00022F74 4E 80 04 21 */ bctrl
/* 80026038 00022F78 38 60 00 01 */ li r3, 1
/* 8002603C 00022F7C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80026040 00022F80 7C 08 03 A6 */ mtlr r0
/* 80026044 00022F84 38 21 00 10 */ addi r1, r1, 0x10
/* 80026048 00022F88 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002604C.s
+13
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/* 8002604C 00022F8C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80026050 00022F90 7C 08 02 A6 */ mflr r0
/* 80026054 00022F94 90 01 00 14 */ stw r0, 0x14(r1)
/* 80026058 00022F98 81 83 00 00 */ lwz r12, 0(r3)
/* 8002605C 00022F9C 81 8C 00 F0 */ lwz r12, 0xf0(r12)
/* 80026060 00022FA0 7D 89 03 A6 */ mtctr r12
/* 80026064 00022FA4 38 84 00 04 */ addi r4, r4, 4
/* 80026068 00022FA8 4E 80 04 21 */ bctrl
/* 8002606C 00022FAC 38 60 00 01 */ li r3, 1
/* 80026070 00022FB0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80026074 00022FB4 7C 08 03 A6 */ mtlr r0
/* 80026078 00022FB8 38 21 00 10 */ addi r1, r1, 0x10
/* 8002607C 00022FBC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80026080.s
+15
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/* 80026080 00022FC0 2C 05 00 0A */ cmpwi r5, 0xa
/* 80026084 00022FC4 38 00 00 57 */ li r0, 0x57
/* 80026088 00022FC8 40 80 00 08 */ bge lbl_80026090
/* 8002608C 00022FCC 38 00 00 30 */ li r0, 0x30
lbl_80026090:
/* 80026090 00022FD0 7C 05 02 14 */ add r0, r5, r0
/* 80026094 00022FD4 7C 00 07 74 */ extsb r0, r0
/* 80026098 00022FD8 7C 89 03 A6 */ mtctr r4
/* 8002609C 00022FDC 2C 04 00 00 */ cmpwi r4, 0
/* 800260A0 00022FE0 4C 81 00 20 */ blelr
lbl_800260A4:
/* 800260A4 00022FE4 98 03 00 03 */ stb r0, 3(r3)
/* 800260A8 00022FE8 38 63 00 0C */ addi r3, r3, 0xc
/* 800260AC 00022FEC 42 00 FF F8 */ bdnz lbl_800260A4
/* 800260B0 00022FF0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800260B4.s
+57
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/* 800260B4 00022FF4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800260B8 00022FF8 7C 08 02 A6 */ mflr r0
/* 800260BC 00022FFC 90 01 00 24 */ stw r0, 0x24(r1)
/* 800260C0 00023000 39 61 00 20 */ addi r11, r1, 0x20
/* 800260C4 00023004 48 33 C1 0D */ bl _savegpr_26
/* 800260C8 00023008 7C 7A 1B 79 */ or. r26, r3, r3
/* 800260CC 0002300C 7C 9B 23 78 */ mr r27, r4
/* 800260D0 00023010 7C BC 2B 78 */ mr r28, r5
/* 800260D4 00023014 7C DD 33 78 */ mr r29, r6
/* 800260D8 00023018 41 82 00 78 */ beq lbl_80026150
/* 800260DC 0002301C 3B C0 00 00 */ li r30, 0
/* 800260E0 00023020 3B E0 00 00 */ li r31, 0
/* 800260E4 00023024 48 00 00 60 */ b lbl_80026144
lbl_800260E8:
/* 800260E8 00023028 38 9A 00 04 */ addi r4, r26, 4
/* 800260EC 0002302C 7C BC FA 14 */ add r5, r28, r31
/* 800260F0 00023030 80 1A 00 00 */ lwz r0, 0(r26)
/* 800260F4 00023034 7C 09 03 A6 */ mtctr r0
/* 800260F8 00023038 2C 00 00 00 */ cmpwi r0, 0
/* 800260FC 0002303C 40 81 00 40 */ ble lbl_8002613C
lbl_80026100:
/* 80026100 00023040 80 64 00 00 */ lwz r3, 0(r4)
/* 80026104 00023044 80 05 00 00 */ lwz r0, 0(r5)
/* 80026108 00023048 7C 03 00 00 */ cmpw r3, r0
/* 8002610C 0002304C 40 82 00 28 */ bne lbl_80026134
/* 80026110 00023050 81 85 00 08 */ lwz r12, 8(r5)
/* 80026114 00023054 28 0C 00 00 */ cmplwi r12, 0
/* 80026118 00023058 41 82 00 24 */ beq lbl_8002613C
/* 8002611C 0002305C 7F 63 DB 78 */ mr r3, r27
/* 80026120 00023060 80 A4 00 04 */ lwz r5, 4(r4)
/* 80026124 00023064 7F 46 D3 78 */ mr r6, r26
/* 80026128 00023068 7D 89 03 A6 */ mtctr r12
/* 8002612C 0002306C 4E 80 04 21 */ bctrl
/* 80026130 00023070 48 00 00 0C */ b lbl_8002613C
lbl_80026134:
/* 80026134 00023074 38 84 00 0C */ addi r4, r4, 0xc
/* 80026138 00023078 42 00 FF C8 */ bdnz lbl_80026100
lbl_8002613C:
/* 8002613C 0002307C 3B DE 00 01 */ addi r30, r30, 1
/* 80026140 00023080 3B FF 00 0C */ addi r31, r31, 0xc
lbl_80026144:
/* 80026144 00023084 7C 1E E8 00 */ cmpw r30, r29
/* 80026148 00023088 41 80 FF A0 */ blt lbl_800260E8
/* 8002614C 0002308C 48 00 00 18 */ b lbl_80026164
lbl_80026150:
/* 80026150 00023090 3C 60 80 38 */ lis r3, lbl_80378A50@ha
/* 80026154 00023094 38 63 8A 50 */ addi r3, r3, lbl_80378A50@l
/* 80026158 00023098 38 63 00 EA */ addi r3, r3, 0xea
/* 8002615C 0002309C 4C C6 31 82 */ crclr 6
/* 80026160 000230A0 4B FE 0A AD */ bl OSReport_Error
lbl_80026164:
/* 80026164 000230A4 39 61 00 20 */ addi r11, r1, 0x20
/* 80026168 000230A8 48 33 C0 B5 */ bl _restgpr_26
/* 8002616C 000230AC 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80026170 000230B0 7C 08 03 A6 */ mtlr r0
/* 80026174 000230B4 38 21 00 20 */ addi r1, r1, 0x20
/* 80026178 000230B8 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002617C.s
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/* 8002617C 000230BC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80026180 000230C0 7C 08 02 A6 */ mflr r0
/* 80026184 000230C4 90 01 00 14 */ stw r0, 0x14(r1)
/* 80026188 000230C8 81 83 00 00 */ lwz r12, 0(r3)
/* 8002618C 000230CC 81 8C 00 F8 */ lwz r12, 0xf8(r12)
/* 80026190 000230D0 7D 89 03 A6 */ mtctr r12
/* 80026194 000230D4 38 84 00 04 */ addi r4, r4, 4
/* 80026198 000230D8 4E 80 04 21 */ bctrl
/* 8002619C 000230DC 38 60 00 01 */ li r3, 1
/* 800261A0 000230E0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800261A4 000230E4 7C 08 03 A6 */ mtlr r0
/* 800261A8 000230E8 38 21 00 10 */ addi r1, r1, 0x10
/* 800261AC 000230EC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800261B0.s
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/* 800261B0 000230F0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800261B4 000230F4 7C 08 02 A6 */ mflr r0
/* 800261B8 000230F8 90 01 00 14 */ stw r0, 0x14(r1)
/* 800261BC 000230FC 81 83 00 00 */ lwz r12, 0(r3)
/* 800261C0 00023100 81 8C 00 F8 */ lwz r12, 0xf8(r12)
/* 800261C4 00023104 7D 89 03 A6 */ mtctr r12
/* 800261C8 00023108 38 84 00 04 */ addi r4, r4, 4
/* 800261CC 0002310C 4E 80 04 21 */ bctrl
/* 800261D0 00023110 38 60 00 01 */ li r3, 1
/* 800261D4 00023114 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800261D8 00023118 7C 08 03 A6 */ mtlr r0
/* 800261DC 0002311C 38 21 00 10 */ addi r1, r1, 0x10
/* 800261E0 00023120 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800261E4.s
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/* 800261E4 00023124 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800261E8 00023128 7C 08 02 A6 */ mflr r0
/* 800261EC 0002312C 90 01 00 14 */ stw r0, 0x14(r1)
/* 800261F0 00023130 81 83 00 00 */ lwz r12, 0(r3)
/* 800261F4 00023134 81 8C 01 10 */ lwz r12, 0x110(r12)
/* 800261F8 00023138 7D 89 03 A6 */ mtctr r12
/* 800261FC 0002313C 38 84 00 04 */ addi r4, r4, 4
/* 80026200 00023140 4E 80 04 21 */ bctrl
/* 80026204 00023144 38 60 00 01 */ li r3, 1
/* 80026208 00023148 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8002620C 0002314C 7C 08 03 A6 */ mtlr r0
/* 80026210 00023150 38 21 00 10 */ addi r1, r1, 0x10
/* 80026214 00023154 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80026218.s
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/* 80026218 00023158 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8002621C 0002315C 7C 08 02 A6 */ mflr r0
/* 80026220 00023160 90 01 00 24 */ stw r0, 0x24(r1)
/* 80026224 00023164 39 61 00 20 */ addi r11, r1, 0x20
/* 80026228 00023168 48 33 BF B5 */ bl _savegpr_29
/* 8002622C 0002316C 3B E4 00 04 */ addi r31, r4, 4
/* 80026230 00023170 7F E4 FB 78 */ mr r4, r31
/* 80026234 00023174 81 83 00 00 */ lwz r12, 0(r3)
/* 80026238 00023178 81 8C 01 20 */ lwz r12, 0x120(r12)
/* 8002623C 0002317C 7D 89 03 A6 */ mtctr r12
/* 80026240 00023180 4E 80 04 21 */ bctrl
/* 80026244 00023184 28 1F 00 00 */ cmplwi r31, 0
/* 80026248 00023188 41 82 00 34 */ beq lbl_8002627C
/* 8002624C 0002318C 83 DF 00 04 */ lwz r30, 4(r31)
/* 80026250 00023190 3B A0 00 00 */ li r29, 0
/* 80026254 00023194 48 00 00 1C */ b lbl_80026270
lbl_80026258:
/* 80026258 00023198 7F A3 EB 78 */ mr r3, r29
/* 8002625C 0002319C 80 9E 00 00 */ lwz r4, 0(r30)
/* 80026260 000231A0 38 84 03 80 */ addi r4, r4, 0x380
/* 80026264 000231A4 4B FF E5 E1 */ bl dStage_roomControl_c_NS_createMemoryBlock
/* 80026268 000231A8 3B DE 00 04 */ addi r30, r30, 4
/* 8002626C 000231AC 3B BD 00 01 */ addi r29, r29, 1
lbl_80026270:
/* 80026270 000231B0 80 1F 00 00 */ lwz r0, 0(r31)
/* 80026274 000231B4 7C 1D 00 00 */ cmpw r29, r0
/* 80026278 000231B8 41 80 FF E0 */ blt lbl_80026258
lbl_8002627C:
/* 8002627C 000231BC 38 60 00 01 */ li r3, 1
/* 80026280 000231C0 39 61 00 20 */ addi r11, r1, 0x20
/* 80026284 000231C4 48 33 BF A5 */ bl _restgpr_29
/* 80026288 000231C8 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8002628C 000231CC 7C 08 03 A6 */ mtlr r0
/* 80026290 000231D0 38 21 00 20 */ addi r1, r1, 0x20
/* 80026294 000231D4 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80026298.s
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/* 80026298 000231D8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002629C 000231DC 7C 08 02 A6 */ mflr r0
/* 800262A0 000231E0 90 01 00 14 */ stw r0, 0x14(r1)
/* 800262A4 000231E4 93 E1 00 0C */ stw r31, 0xc(r1)
/* 800262A8 000231E8 3B E4 00 04 */ addi r31, r4, 4
/* 800262AC 000231EC 7F E4 FB 78 */ mr r4, r31
/* 800262B0 000231F0 81 83 00 00 */ lwz r12, 0(r3)
/* 800262B4 000231F4 81 8C 01 18 */ lwz r12, 0x118(r12)
/* 800262B8 000231F8 7D 89 03 A6 */ mtctr r12
/* 800262BC 000231FC 4E 80 04 21 */ bctrl
/* 800262C0 00023200 28 1F 00 00 */ cmplwi r31, 0
/* 800262C4 00023204 41 82 00 40 */ beq lbl_80026304
/* 800262C8 00023208 80 DF 00 04 */ lwz r6, 4(r31)
/* 800262CC 0002320C 38 E0 00 00 */ li r7, 0
/* 800262D0 00023210 3C 60 80 3F */ lis r3, lbl_803F6094@ha
/* 800262D4 00023214 38 83 60 94 */ addi r4, r3, lbl_803F6094@l
/* 800262D8 00023218 48 00 00 20 */ b lbl_800262F8
lbl_800262DC:
/* 800262DC 0002321C 88 A6 00 01 */ lbz r5, 1(r6)
/* 800262E0 00023220 88 06 00 00 */ lbz r0, 0(r6)
/* 800262E4 00023224 1C 00 04 04 */ mulli r0, r0, 0x404
/* 800262E8 00023228 7C 64 02 14 */ add r3, r4, r0
/* 800262EC 0002322C 98 A3 03 F8 */ stb r5, 0x3f8(r3)
/* 800262F0 00023230 38 C6 00 02 */ addi r6, r6, 2
/* 800262F4 00023234 38 E7 00 01 */ addi r7, r7, 1
lbl_800262F8:
/* 800262F8 00023238 80 1F 00 00 */ lwz r0, 0(r31)
/* 800262FC 0002323C 7C 07 00 00 */ cmpw r7, r0
/* 80026300 00023240 41 80 FF DC */ blt lbl_800262DC
lbl_80026304:
/* 80026304 00023244 38 60 00 01 */ li r3, 1
/* 80026308 00023248 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8002630C 0002324C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80026310 00023250 7C 08 03 A6 */ mtlr r0
/* 80026314 00023254 38 21 00 10 */ addi r1, r1, 0x10
/* 80026318 00023258 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002631C.s
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/* 8002631C 0002325C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80026320 00023260 7C 08 02 A6 */ mflr r0
/* 80026324 00023264 90 01 00 14 */ stw r0, 0x14(r1)
/* 80026328 00023268 7C 65 1B 78 */ mr r5, r3
/* 8002632C 0002326C 38 64 00 04 */ addi r3, r4, 4
/* 80026330 00023270 88 85 00 04 */ lbz r4, 4(r5)
/* 80026334 00023274 48 07 59 81 */ bl dTres_c_NS_addData
/* 80026338 00023278 38 60 00 01 */ li r3, 1
/* 8002633C 0002327C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80026340 00023280 7C 08 03 A6 */ mtlr r0
/* 80026344 00023284 38 21 00 10 */ addi r1, r1, 0x10
/* 80026348 00023288 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002634C.s
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/* 8002634C 0002328C 38 04 00 04 */ addi r0, r4, 4
/* 80026350 00023290 90 03 00 00 */ stw r0, 0(r3)
/* 80026354 00023294 38 60 00 01 */ li r3, 1
/* 80026358 00023298 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002635C.s
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/* 8002635C 0002329C 38 A3 00 04 */ addi r5, r3, 4
/* 80026360 000232A0 38 C0 00 00 */ li r6, 0
/* 80026364 000232A4 3C 80 80 00 */ lis r4, 0x8000
/* 80026368 000232A8 48 00 00 28 */ b lbl_80026390
lbl_8002636C:
/* 8002636C 000232AC 80 05 00 08 */ lwz r0, 8(r5)
/* 80026370 000232B0 28 00 00 00 */ cmplwi r0, 0
/* 80026374 000232B4 41 82 00 14 */ beq lbl_80026388
/* 80026378 000232B8 7C 00 20 40 */ cmplw r0, r4
/* 8002637C 000232BC 40 80 00 0C */ bge lbl_80026388
/* 80026380 000232C0 7C 00 1A 14 */ add r0, r0, r3
/* 80026384 000232C4 90 05 00 08 */ stw r0, 8(r5)
lbl_80026388:
/* 80026388 000232C8 38 A5 00 0C */ addi r5, r5, 0xc
/* 8002638C 000232CC 38 C6 00 01 */ addi r6, r6, 1
lbl_80026390:
/* 80026390 000232D0 80 03 00 00 */ lwz r0, 0(r3)
/* 80026394 000232D4 7C 06 00 00 */ cmpw r6, r0
/* 80026398 000232D8 41 80 FF D4 */ blt lbl_8002636C
/* 8002639C 000232DC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800263A0.s
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/* 800263A0 000232E0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800263A4 000232E4 7C 08 02 A6 */ mflr r0
/* 800263A8 000232E8 90 01 00 14 */ stw r0, 0x14(r1)
/* 800263AC 000232EC 88 63 00 04 */ lbz r3, 4(r3)
/* 800263B0 000232F0 38 A0 00 00 */ li r5, 0
/* 800263B4 000232F4 38 84 00 04 */ addi r4, r4, 4
/* 800263B8 000232F8 48 01 96 89 */ bl dMpath_c_NS_setPointer_X1_
/* 800263BC 000232FC 38 60 00 01 */ li r3, 1
/* 800263C0 00023300 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800263C4 00023304 7C 08 03 A6 */ mtlr r0
/* 800263C8 00023308 38 21 00 10 */ addi r1, r1, 0x10
/* 800263CC 0002330C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800263D0.s
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/* 800263D0 00023310 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800263D4 00023314 7C 08 02 A6 */ mflr r0
/* 800263D8 00023318 90 01 00 14 */ stw r0, 0x14(r1)
/* 800263DC 0002331C 88 63 00 04 */ lbz r3, 4(r3)
/* 800263E0 00023320 38 A0 00 01 */ li r5, 1
/* 800263E4 00023324 38 84 00 04 */ addi r4, r4, 4
/* 800263E8 00023328 48 01 96 59 */ bl dMpath_c_NS_setPointer_X1_
/* 800263EC 0002332C 38 60 00 01 */ li r3, 1
/* 800263F0 00023330 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800263F4 00023334 7C 08 03 A6 */ mtlr r0
/* 800263F8 00023338 38 21 00 10 */ addi r1, r1, 0x10
/* 800263FC 0002333C 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80026400.s
+25
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/* 80026400 00023340 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80026404 00023344 7C 08 02 A6 */ mflr r0
/* 80026408 00023348 90 01 00 24 */ stw r0, 0x24(r1)
/* 8002640C 0002334C 93 E1 00 1C */ stw r31, 0x1c(r1)
/* 80026410 00023350 93 C1 00 18 */ stw r30, 0x18(r1)
/* 80026414 00023354 7C 7E 1B 78 */ mr r30, r3
/* 80026418 00023358 83 E4 00 08 */ lwz r31, 8(r4)
/* 8002641C 0002335C 28 1F 00 00 */ cmplwi r31, 0
/* 80026420 00023360 40 82 00 0C */ bne lbl_8002642C
/* 80026424 00023364 38 60 00 01 */ li r3, 1
/* 80026428 00023368 48 00 00 1C */ b lbl_80026444
lbl_8002642C:
/* 8002642C 0002336C 7F E3 FB 78 */ mr r3, r31
/* 80026430 00023370 38 81 00 09 */ addi r4, r1, 9
/* 80026434 00023374 38 A1 00 08 */ addi r5, r1, 8
/* 80026438 00023378 48 01 93 D9 */ bl dMpath_c_NS_setPointer
/* 8002643C 0002337C 93 FE 00 08 */ stw r31, 8(r30)
/* 80026440 00023380 38 60 00 01 */ li r3, 1
lbl_80026444:
/* 80026444 00023384 83 E1 00 1C */ lwz r31, 0x1c(r1)
/* 80026448 00023388 83 C1 00 18 */ lwz r30, 0x18(r1)
/* 8002644C 0002338C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80026450 00023390 7C 08 03 A6 */ mtlr r0
/* 80026454 00023394 38 21 00 20 */ addi r1, r1, 0x20
/* 80026458 00023398 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002645C.s
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/* 8002645C 0002339C 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 80026460 000233A0 7C 08 02 A6 */ mflr r0
/* 80026464 000233A4 90 01 00 34 */ stw r0, 0x34(r1)
/* 80026468 000233A8 39 61 00 30 */ addi r11, r1, 0x30
/* 8002646C 000233AC 48 33 BD 65 */ bl _savegpr_26
/* 80026470 000233B0 7C 7B 1B 78 */ mr r27, r3
/* 80026474 000233B4 7C 9C 23 79 */ or. r28, r4, r4
/* 80026478 000233B8 7C BD 2B 78 */ mr r29, r5
/* 8002647C 000233BC 41 82 01 48 */ beq lbl_800265C4
/* 80026480 000233C0 83 FC 00 04 */ lwz r31, 4(r28)
/* 80026484 000233C4 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
/* 80026488 000233C8 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
/* 8002648C 000233CC 3B C3 4E 20 */ addi r30, r3, 0x4e20
/* 80026490 000233D0 7F C3 F3 78 */ mr r3, r30
/* 80026494 000233D4 81 9E 00 00 */ lwz r12, 0(r30)
/* 80026498 000233D8 81 8C 00 BC */ lwz r12, 0xbc(r12)
/* 8002649C 000233DC 7D 89 03 A6 */ mtctr r12
/* 800264A0 000233E0 4E 80 04 21 */ bctrl
/* 800264A4 000233E4 A0 03 00 0A */ lhz r0, 0xa(r3)
/* 800264A8 000233E8 54 00 07 7F */ clrlwi. r0, r0, 0x1d
/* 800264AC 000233EC 41 82 00 28 */ beq lbl_800264D4
/* 800264B0 000233F0 7F C3 F3 78 */ mr r3, r30
/* 800264B4 000233F4 81 9E 00 00 */ lwz r12, 0(r30)
/* 800264B8 000233F8 81 8C 00 BC */ lwz r12, 0xbc(r12)
/* 800264BC 000233FC 7D 89 03 A6 */ mtctr r12
/* 800264C0 00023400 4E 80 04 21 */ bctrl
/* 800264C4 00023404 A0 03 00 0A */ lhz r0, 0xa(r3)
/* 800264C8 00023408 54 00 07 7E */ clrlwi r0, r0, 0x1d
/* 800264CC 0002340C 2C 00 00 06 */ cmpwi r0, 6
/* 800264D0 00023410 40 82 00 14 */ bne lbl_800264E4
lbl_800264D4:
/* 800264D4 00023414 38 6D 87 F4 */ addi r3, r13, 0x80450D74 - 0x80458580 /*SDA HACK; original: lbl_80450D74-_SDA_BASE_*/
/* 800264D8 00023418 80 1C 00 00 */ lwz r0, 0(r28)
/* 800264DC 0002341C 54 04 06 3E */ clrlwi r4, r0, 0x18
/* 800264E0 00023420 4B FF E5 55 */ bl dStage_roomControl_c_NS_roomDzs_c_NS_create
lbl_800264E4:
/* 800264E4 00023424 3B C0 00 00 */ li r30, 0
/* 800264E8 00023428 48 00 00 CC */ b lbl_800265B4
lbl_800264EC:
/* 800264EC 0002342C 38 6D 87 F4 */ addi r3, r13, 0x80450D74 - 0x80458580 /*SDA HACK; original: lbl_80450D74-_SDA_BASE_*/
/* 800264F0 00023430 57 C4 06 3E */ clrlwi r4, r30, 0x18
/* 800264F4 00023434 88 BF 00 0A */ lbz r5, 0xa(r31)
/* 800264F8 00023438 4B FF E6 4D */ bl dStage_roomControl_c_NS_roomDzs_c_NS_add
/* 800264FC 0002343C 7C 7A 1B 78 */ mr r26, r3
/* 80026500 00023440 28 03 00 00 */ cmplwi r3, 0
/* 80026504 00023444 40 82 00 44 */ bne lbl_80026548
/* 80026508 00023448 38 61 00 08 */ addi r3, r1, 8
/* 8002650C 0002344C 3C 80 80 38 */ lis r4, lbl_80378A50@ha
/* 80026510 00023450 38 84 8A 50 */ addi r4, r4, lbl_80378A50@l
/* 80026514 00023454 38 84 01 0E */ addi r4, r4, 0x10e
/* 80026518 00023458 88 BF 00 0A */ lbz r5, 0xa(r31)
/* 8002651C 0002345C 4C C6 31 82 */ crclr 6
/* 80026520 00023460 48 33 FF BD */ bl func_803664DC
/* 80026524 00023464 57 A0 06 3F */ clrlwi. r0, r29, 0x18
/* 80026528 00023468 41 82 00 14 */ beq lbl_8002653C
/* 8002652C 0002346C 38 61 00 08 */ addi r3, r1, 8
/* 80026530 00023470 48 00 8F 49 */ bl dComIfG_getOldStageRes
/* 80026534 00023474 7C 7A 1B 78 */ mr r26, r3
/* 80026538 00023478 48 00 00 10 */ b lbl_80026548
lbl_8002653C:
/* 8002653C 0002347C 38 61 00 08 */ addi r3, r1, 8
/* 80026540 00023480 48 00 8E F5 */ bl dComIfG_getStageRes
/* 80026544 00023484 7C 7A 1B 78 */ mr r26, r3
lbl_80026548:
/* 80026548 00023488 28 1A 00 00 */ cmplwi r26, 0
/* 8002654C 0002348C 41 82 00 60 */ beq lbl_800265AC
/* 80026550 00023490 7F 43 D3 78 */ mr r3, r26
/* 80026554 00023494 4B FF FE 09 */ bl dStage_dt_c_offsetToPtr
/* 80026558 00023498 88 1F 00 0A */ lbz r0, 0xa(r31)
/* 8002655C 0002349C 98 1B 00 04 */ stb r0, 4(r27)
/* 80026560 000234A0 7F 43 D3 78 */ mr r3, r26
/* 80026564 000234A4 7F 64 DB 78 */ mr r4, r27
/* 80026568 000234A8 3C A0 80 3A */ lis r5, lbl_803A65CC@ha
/* 8002656C 000234AC 38 A5 65 CC */ addi r5, r5, lbl_803A65CC@l
/* 80026570 000234B0 38 C0 00 04 */ li r6, 4
/* 80026574 000234B4 4B FF FB 41 */ bl dStage_dt_c_decode
/* 80026578 000234B8 38 60 00 00 */ li r3, 0
/* 8002657C 000234BC 48 00 64 01 */ bl dComIfG_play_c_NS_getLayerNo
/* 80026580 000234C0 7C 65 1B 78 */ mr r5, r3
/* 80026584 000234C4 3C 60 80 3A */ lis r3, lbl_803A65FC@ha
/* 80026588 000234C8 38 63 65 FC */ addi r3, r3, lbl_803A65FC@l
/* 8002658C 000234CC 38 80 00 03 */ li r4, 3
/* 80026590 000234D0 4B FF FA F1 */ bl dStage_setLayerTagName
/* 80026594 000234D4 7F 43 D3 78 */ mr r3, r26
/* 80026598 000234D8 7F 64 DB 78 */ mr r4, r27
/* 8002659C 000234DC 3C A0 80 3A */ lis r5, lbl_803A65FC@ha
/* 800265A0 000234E0 38 A5 65 FC */ addi r5, r5, lbl_803A65FC@l
/* 800265A4 000234E4 38 C0 00 03 */ li r6, 3
/* 800265A8 000234E8 4B FF FB 0D */ bl dStage_dt_c_decode
lbl_800265AC:
/* 800265AC 000234EC 3B FF 00 0C */ addi r31, r31, 0xc
/* 800265B0 000234F0 3B DE 00 01 */ addi r30, r30, 1
lbl_800265B4:
/* 800265B4 000234F4 7F C3 07 74 */ extsb r3, r30
/* 800265B8 000234F8 80 1C 00 00 */ lwz r0, 0(r28)
/* 800265BC 000234FC 7C 03 00 00 */ cmpw r3, r0
/* 800265C0 00023500 41 80 FF 2C */ blt lbl_800264EC
lbl_800265C4:
/* 800265C4 00023504 39 61 00 30 */ addi r11, r1, 0x30
/* 800265C8 00023508 48 33 BC 55 */ bl _restgpr_26
/* 800265CC 0002350C 80 01 00 34 */ lwz r0, 0x34(r1)
/* 800265D0 00023510 7C 08 03 A6 */ mtlr r0
/* 800265D4 00023514 38 21 00 30 */ addi r1, r1, 0x30
/* 800265D8 00023518 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800265DC.s
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/* 800265DC 0002351C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800265E0 00023520 7C 08 02 A6 */ mflr r0
/* 800265E4 00023524 90 01 00 14 */ stw r0, 0x14(r1)
/* 800265E8 00023528 93 E1 00 0C */ stw r31, 0xc(r1)
/* 800265EC 0002352C 7C 7F 1B 78 */ mr r31, r3
/* 800265F0 00023530 81 83 00 00 */ lwz r12, 0(r3)
/* 800265F4 00023534 81 8C 01 28 */ lwz r12, 0x128(r12)
/* 800265F8 00023538 7D 89 03 A6 */ mtctr r12
/* 800265FC 0002353C 38 84 00 04 */ addi r4, r4, 4
/* 80026600 00023540 4E 80 04 21 */ bctrl
/* 80026604 00023544 4B FF DA 65 */ bl dStage_initRoomKeepDoorInfo
/* 80026608 00023548 7F E3 FB 78 */ mr r3, r31
/* 8002660C 0002354C 81 9F 00 00 */ lwz r12, 0(r31)
/* 80026610 00023550 81 8C 01 2C */ lwz r12, 0x12c(r12)
/* 80026614 00023554 7D 89 03 A6 */ mtctr r12
/* 80026618 00023558 4E 80 04 21 */ bctrl
/* 8002661C 0002355C 7C 64 1B 78 */ mr r4, r3
/* 80026620 00023560 7F E3 FB 78 */ mr r3, r31
/* 80026624 00023564 38 A0 00 00 */ li r5, 0
/* 80026628 00023568 4B FF FE 35 */ bl readMult
/* 8002662C 0002356C 7F E3 FB 78 */ mr r3, r31
/* 80026630 00023570 81 9F 00 00 */ lwz r12, 0(r31)
/* 80026634 00023574 81 8C 01 38 */ lwz r12, 0x138(r12)
/* 80026638 00023578 7D 89 03 A6 */ mtctr r12
/* 8002663C 0002357C 4E 80 04 21 */ bctrl
/* 80026640 00023580 7C 64 1B 78 */ mr r4, r3
/* 80026644 00023584 7F E3 FB 78 */ mr r3, r31
/* 80026648 00023588 38 A0 00 01 */ li r5, 1
/* 8002664C 0002358C 4B FF FE 11 */ bl readMult
/* 80026650 00023590 38 00 FF FF */ li r0, -1
/* 80026654 00023594 98 1F 00 04 */ stb r0, 4(r31)
/* 80026658 00023598 38 60 00 01 */ li r3, 1
/* 8002665C 0002359C 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80026660 000235A0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80026664 000235A4 7C 08 03 A6 */ mtlr r0
/* 80026668 000235A8 38 21 00 10 */ addi r1, r1, 0x10
/* 8002666C 000235AC 4E 80 00 20 */ blr
include/d/d_stage/asm/func_80026670.s
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/* 80026670 000235B0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80026674 000235B4 7C 08 02 A6 */ mflr r0
/* 80026678 000235B8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8002667C 000235BC 81 83 00 00 */ lwz r12, 0(r3)
/* 80026680 000235C0 81 8C 01 3C */ lwz r12, 0x13c(r12)
/* 80026684 000235C4 7D 89 03 A6 */ mtctr r12
/* 80026688 000235C8 38 84 00 04 */ addi r4, r4, 4
/* 8002668C 000235CC 4E 80 04 21 */ bctrl
/* 80026690 000235D0 38 60 00 01 */ li r3, 1
/* 80026694 000235D4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80026698 000235D8 7C 08 03 A6 */ mtlr r0
/* 8002669C 000235DC 38 21 00 10 */ addi r1, r1, 0x10
/* 800266A0 000235E0 4E 80 00 20 */ blr
include/d/d_stage/asm/func_800266A4.s
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/* 800266A4 000235E4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800266A8 000235E8 7C 08 02 A6 */ mflr r0
/* 800266AC 000235EC 90 01 00 24 */ stw r0, 0x24(r1)
/* 800266B0 000235F0 39 61 00 20 */ addi r11, r1, 0x20
/* 800266B4 000235F4 48 33 BB 25 */ bl _savegpr_28
/* 800266B8 000235F8 7C 7C 1B 78 */ mr r28, r3
/* 800266BC 000235FC 7C 9D 23 78 */ mr r29, r4
/* 800266C0 00023600 7C BE 2B 78 */ mr r30, r5
/* 800266C4 00023604 7C DF 33 78 */ mr r31, r6
/* 800266C8 00023608 38 9D 00 04 */ addi r4, r29, 4
/* 800266CC 0002360C 81 83 00 00 */ lwz r12, 0(r3)
/* 800266D0 00023610 81 8C 01 44 */ lwz r12, 0x144(r12)
/* 800266D4 00023614 7D 89 03 A6 */ mtctr r12
/* 800266D8 00023618 4E 80 04 21 */ bctrl
/* 800266DC 0002361C 7F 83 E3 78 */ mr r3, r28
/* 800266E0 00023620 7F A4 EB 78 */ mr r4, r29
/* 800266E4 00023624 7F C5 F3 78 */ mr r5, r30
/* 800266E8 00023628 7F E6 FB 78 */ mr r6, r31
/* 800266EC 0002362C 4B FF F3 4D */ bl dStage_actorInit
/* 800266F0 00023630 38 60 00 01 */ li r3, 1
/* 800266F4 00023634 39 61 00 20 */ addi r11, r1, 0x20
/* 800266F8 00023638 48 33 BB 2D */ bl _restgpr_28
/* 800266FC 0002363C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80026700 00023640 7C 08 03 A6 */ mtlr r0
/* 80026704 00023644 38 21 00 20 */ addi r1, r1, 0x20
/* 80026708 00023648 4E 80 00 20 */ blr
include/d/d_stage/asm/func_8002670C.s
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/* 8002670C 0002364C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80026710 00023650 7C 08 02 A6 */ mflr r0
/* 80026714 00023654 90 01 00 14 */ stw r0, 0x14(r1)
/* 80026718 00023658 4B FF F3 21 */ bl dStage_actorInit
/* 8002671C 0002365C 38 60 00 01 */ li r3, 1
/* 80026720 00023660 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80026724 00023664 7C 08 03 A6 */ mtlr r0
/* 80026728 00023668 38 21 00 10 */ addi r1, r1, 0x10
/* 8002672C 0002366C 4E 80 00 20 */ blr

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