mirror of
https://github.com/zeldaret/tp
synced 2026-08-30 17:29:39 -04:00
Improving compatibility with standard cpp compiler (#2920)
* Improving compatibility with standard cpp compiler * Add __REGISTER macro for non mwcc compatibility * Fix for PR comments * fix missing define for revolution * Simplifying cSAngle conversion
This commit is contained in:
+1
-1
@@ -317,7 +317,7 @@ static void __AIDHandler(__OSInterrupt interrupt, OSContext* context) {
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OSSetCurrentContext(context);
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}
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static asm void __AICallbackStackSwitch(register void* cb) {
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static asm void __AICallbackStackSwitch(__REGISTER void* cb) {
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nofralloc
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mflr r0
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stw r0, 0x4(r1)
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@@ -116,7 +116,7 @@ const static double i2fMagic = 4503601774854144.0;
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static void do_src1(AXFX_CHORUS_SRCINFO* src);
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static void do_src2(AXFX_CHORUS_SRCINFO* src);
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asm static void do_src1(register AXFX_CHORUS_SRCINFO* src) {
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asm static void do_src1(__REGISTER AXFX_CHORUS_SRCINFO* src) {
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nofralloc
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stwu r1, -64(r1)
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stmw r26, 40(r1)
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@@ -227,7 +227,7 @@ L_00000160:
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blr
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}
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asm static void do_src2(register AXFX_CHORUS_SRCINFO* src) {
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asm static void do_src2(__REGISTER AXFX_CHORUS_SRCINFO* src) {
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nofralloc
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stwu r1, -64(r1)
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stmw r26, 40(r1)
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@@ -186,7 +186,7 @@ const static f32 value1_0 = 1.0f;
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const static f32 value0_3 = 0.3f;
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const static f32 value0_6 = 0.6f;
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asm static void DoCrossTalk(register s32* l, register s32* r, register f32 cross, register f32 invcross) {
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asm static void DoCrossTalk(__REGISTER s32* l, __REGISTER s32* r, __REGISTER f32 cross, __REGISTER f32 invcross) {
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nofralloc
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stwu r1, -48(r1)
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stfd f14, 40(r1)
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@@ -291,7 +291,7 @@ loop:
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blr
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}
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asm static void HandleReverb(register s32* sptr, register AXFX_REVHI_WORK* rv, register s32 k) {
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asm static void HandleReverb(__REGISTER s32* sptr, __REGISTER AXFX_REVHI_WORK* rv, __REGISTER s32 k) {
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nofralloc
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stwu r1, -0xc0(r1)
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stmw r14, 0x8(r1)
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@@ -176,7 +176,7 @@ const static f32 value0_6 = 0.6f;
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const static f32 value0_3 = 0.3f;
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const static double i2fMagic = 4503601774854144.0;
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asm static void HandleReverbDpl2(register s32* sptr, register AXFX_REVHI_WORK_DPL2* rv, register s32 k) {
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asm static void HandleReverbDpl2(__REGISTER s32* sptr, __REGISTER AXFX_REVHI_WORK_DPL2* rv, __REGISTER s32 k) {
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nofralloc
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stwu r1, -0xc0(r1)
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stmw r14, 0x8(r1)
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@@ -170,7 +170,7 @@ const static f32 value0_3 = 0.3f;
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const static f32 value0_6 = 0.6f;
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const static double i2fMagic = 4503601774854144.0;
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asm static void HandleReverb(register s32* sptr, register AXFX_REVSTD_WORK* rv) {
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asm static void HandleReverb(__REGISTER s32* sptr, __REGISTER AXFX_REVSTD_WORK* rv) {
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nofralloc
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stwu r1, -144(r1)
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stmw r17, 8(r1)
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+19
-19
@@ -7,27 +7,27 @@ asm u32 PPCMfmsr() {
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blr
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}
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asm void PPCMtmsr(register u32 newMSR) {
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asm void PPCMtmsr(__REGISTER u32 newMSR) {
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nofralloc
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mtmsr newMSR
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blr
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}
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asm u32 PPCOrMsr(register u32 value) {
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asm u32 PPCOrMsr(__REGISTER u32 value) {
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nofralloc
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mfmsr r4
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or value, r4, value
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blr
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}
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asm u32 PPCAndMsr(register u32 value) {
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asm u32 PPCAndMsr(__REGISTER u32 value) {
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nofralloc
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mfmsr r4
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and value, r4, value
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blr
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}
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asm u32 PPCAndCMsr(register u32 value) {
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asm u32 PPCAndCMsr(__REGISTER u32 value) {
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nofralloc
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mfmsr r4
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andc value, r4, value
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@@ -40,7 +40,7 @@ asm u32 PPCMfhid0() {
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blr
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}
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asm void PPCMthid0(register u32 newHID0) {
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asm void PPCMthid0(__REGISTER u32 newHID0) {
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nofralloc
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mtspr HID0, newHID0
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blr
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@@ -58,13 +58,13 @@ asm u32 PPCMfl2cr() {
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blr
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}
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asm void PPCMtl2cr(register u32 newL2cr) {
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asm void PPCMtl2cr(__REGISTER u32 newL2cr) {
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nofralloc
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mtspr L2CR, newL2cr
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blr
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}
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asm void PPCMtdec(register u32 newDec) {
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asm void PPCMtdec(__REGISTER u32 newDec) {
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nofralloc
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mtdec newDec
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blr
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@@ -115,7 +115,7 @@ asm u32 PPCMfmmcr0() {
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blr
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}
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asm void PPCMtmmcr0(register u32 newMmcr0) {
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asm void PPCMtmmcr0(__REGISTER u32 newMmcr0) {
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nofralloc
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mtspr MMCR0, newMmcr0
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blr
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@@ -127,7 +127,7 @@ asm u32 PPCMfmmcr1() {
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blr
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}
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asm void PPCMtmmcr1(register u32 newMmcr1) {
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asm void PPCMtmmcr1(__REGISTER u32 newMmcr1) {
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nofralloc
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mtspr MMCR1, newMmcr1
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blr
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@@ -139,7 +139,7 @@ asm u32 PPCMfpmc1() {
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blr
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}
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asm void PPCMtpmc1(register u32 newPmc1) {
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asm void PPCMtpmc1(__REGISTER u32 newPmc1) {
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nofralloc
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mtspr PMC1, newPmc1
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blr
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@@ -151,7 +151,7 @@ asm u32 PPCMfpmc2() {
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blr
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}
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asm void PPCMtpmc2(register u32 newPmc2) {
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asm void PPCMtpmc2(__REGISTER u32 newPmc2) {
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nofralloc
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mtspr PMC2, newPmc2
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blr
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@@ -163,7 +163,7 @@ asm u32 PPCMfpmc3() {
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blr
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}
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asm void PPCMtpmc3(register u32 newPmc3) {
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asm void PPCMtpmc3(__REGISTER u32 newPmc3) {
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nofralloc
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mtspr PMC3, newPmc3
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blr
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@@ -175,7 +175,7 @@ asm u32 PPCMfpmc4() {
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blr
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}
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asm void PPCMtpmc4(register u32 newPmc4) {
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asm void PPCMtpmc4(__REGISTER u32 newPmc4) {
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nofralloc
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mtspr PMC4, newPmc4
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blr
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@@ -187,7 +187,7 @@ asm u32 PPCMfsia() {
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blr
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}
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asm void PPCMtsia(register u32 newSia) {
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asm void PPCMtsia(__REGISTER u32 newSia) {
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nofralloc
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mtspr SIA, newSia
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blr
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@@ -204,7 +204,7 @@ u32 PPCMffpscr() {
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return m.u.fpscr;
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}
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void PPCMtfpscr(register u32 newFPSCR) {
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void PPCMtfpscr(__REGISTER u32 newFPSCR) {
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union FpscrUnion m;
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asm {
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@@ -222,7 +222,7 @@ asm u32 PPCMfhid2() {
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blr
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}
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asm void PPCMthid2(register u32 newhid2) {
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asm void PPCMthid2(__REGISTER u32 newhid2) {
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nofralloc
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mtspr HID2, newhid2
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blr
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@@ -235,7 +235,7 @@ asm u32 PPCMfwpar() {
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blr
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}
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asm void PPCMtwpar(register u32 newwpar) {
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asm void PPCMtwpar(__REGISTER u32 newwpar) {
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nofralloc
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mtspr WPAR, newwpar
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blr
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@@ -253,13 +253,13 @@ asm u32 PPCMfdmaL() {
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blr
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}
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asm void PPCMtdmaU(register u32 newdmau) {
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asm void PPCMtdmaU(__REGISTER u32 newdmau) {
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nofralloc
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mtspr DMA_U, newdmau
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blr
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}
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asm void PPCMtdmaL(register u32 newdmal) {
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asm void PPCMtdmaL(__REGISTER u32 newdmal) {
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nofralloc
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mtspr DMA_L, newdmal
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blr
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@@ -319,10 +319,10 @@ static inline u32 ConvLightID2Num(GXLightID id) {
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}
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}
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static inline void PushLight(const register GXLightObj* lt_obj, register void* dest) {
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register u32 zero, color;
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register f32 a0_a1, a2_k0, k1_k2;
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register f32 px_py, pz_dx, dy_dz;
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static inline void PushLight(const __REGISTER GXLightObj* lt_obj, __REGISTER void* dest) {
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__REGISTER u32 zero, color;
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__REGISTER f32 a0_a1, a2_k0, k1_k2;
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__REGISTER f32 px_py, pz_dx, dy_dz;
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#ifdef __MWERKS__ // clang-format off
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asm {
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lwz color, 12(lt_obj)
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@@ -32,9 +32,10 @@ void GXProject(f32 x, f32 y, f32 z, const Mtx mtx, const f32* pm, const f32* vp,
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*sz = vp[5] + (wc * (zc * (vp[5] - vp[4])));
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}
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static void WriteProjPS(const register f32 proj[6], register volatile void* dest) {
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register f32 p01, p23, p45;
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static void WriteProjPS(const __REGISTER f32 proj[6], __REGISTER volatile void* dest) {
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__REGISTER f32 p01, p23, p45;
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#ifdef __MWERKS__
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asm {
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psq_l p01, 0(proj), 0, 0
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psq_l p23, 8(proj), 0, 0
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@@ -43,10 +44,11 @@ static void WriteProjPS(const register f32 proj[6], register volatile void* dest
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psq_st p23, 0(dest), 0, 0
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psq_st p45, 0(dest), 0, 0
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}
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#endif
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}
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static void Copy6Floats(const register f32 src[6], register volatile f32* dest) {
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register f32 ps01, ps23, ps45;
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static void Copy6Floats(const __REGISTER f32 src[6], __REGISTER volatile f32* dest) {
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__REGISTER f32 ps01, ps23, ps45;
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asm {
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psq_l ps01, 0(src), 0, 0
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@@ -135,13 +137,13 @@ void GXGetProjectionv(f32* ptr) {
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#endif
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}
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static void WriteMTXPS4x3(const register f32 mtx[3][4], register volatile f32* dest) {
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register f32 a00_a01;
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register f32 a02_a03;
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register f32 a10_a11;
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register f32 a12_a13;
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register f32 a20_a21;
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register f32 a22_a23;
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static void WriteMTXPS4x3(const __REGISTER f32 mtx[3][4], __REGISTER volatile f32* dest) {
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__REGISTER f32 a00_a01;
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__REGISTER f32 a02_a03;
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__REGISTER f32 a10_a11;
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__REGISTER f32 a12_a13;
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__REGISTER f32 a20_a21;
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__REGISTER f32 a22_a23;
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asm {
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psq_l a00_a01, 0x00(mtx), 0, qr0
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@@ -159,13 +161,13 @@ static void WriteMTXPS4x3(const register f32 mtx[3][4], register volatile f32* d
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}
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}
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static void WriteMTXPS3x3from3x4(register f32 mtx[3][4], register volatile f32* dest) {
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register f32 a00_a01;
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register f32 a02_a03;
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register f32 a10_a11;
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register f32 a12_a13;
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register f32 a20_a21;
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register f32 a22_a23;
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static void WriteMTXPS3x3from3x4(__REGISTER f32 mtx[3][4], __REGISTER volatile f32* dest) {
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__REGISTER f32 a00_a01;
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__REGISTER f32 a02_a03;
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__REGISTER f32 a10_a11;
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__REGISTER f32 a12_a13;
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__REGISTER f32 a20_a21;
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__REGISTER f32 a22_a23;
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asm {
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psq_l a00_a01, 0x00(mtx), 0, qr0
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@@ -183,12 +185,12 @@ static void WriteMTXPS3x3from3x4(register f32 mtx[3][4], register volatile f32*
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}
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}
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static void WriteMTXPS3x3(register f32 mtx[3][3], register volatile f32* dest) {
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register f32 a00_a01;
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register f32 a02_a10;
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register f32 a11_a12;
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register f32 a20_a21;
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register f32 a22_nnn;
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static void WriteMTXPS3x3(__REGISTER f32 mtx[3][3], __REGISTER volatile f32* dest) {
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__REGISTER f32 a00_a01;
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__REGISTER f32 a02_a10;
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__REGISTER f32 a11_a12;
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__REGISTER f32 a20_a21;
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__REGISTER f32 a22_nnn;
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asm {
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psq_l a00_a01, 0x00(mtx), 0, qr0
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@@ -204,11 +206,11 @@ static void WriteMTXPS3x3(register f32 mtx[3][3], register volatile f32* dest) {
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}
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}
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static void WriteMTXPS4x2(const register f32 mtx[2][4], register volatile f32* dest) {
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register f32 a00_a01;
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register f32 a02_a03;
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register f32 a10_a11;
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register f32 a12_a13;
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static void WriteMTXPS4x2(const __REGISTER f32 mtx[2][4], __REGISTER volatile f32* dest) {
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__REGISTER f32 a00_a01;
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__REGISTER f32 a02_a03;
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__REGISTER f32 a10_a11;
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__REGISTER f32 a12_a13;
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asm {
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psq_l a00_a01, 0x00(mtx), 0, qr0
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@@ -1205,7 +1205,7 @@ exit:;
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}
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static int fioPacketResultWrite(void* buffer, u32 dataSize) {
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register int nResult = 0;
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__REGISTER int nResult = 0;
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MCC_CHANNEL nChID;
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u8 nChannelBlocks = 0;
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u32 dataBlockSize;
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+49
-49
@@ -23,11 +23,11 @@ void C_MTXIdentity(Mtx m) {
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m[2][3] = 0;
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}
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void PSMTXIdentity(register Mtx m) {
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register f32 c_zero = 0.0f;
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register f32 c_one = 1.0f;
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register f32 c_01;
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register f32 c_10;
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void PSMTXIdentity(__REGISTER Mtx m) {
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__REGISTER f32 c_zero = 0.0f;
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__REGISTER f32 c_one = 1.0f;
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__REGISTER f32 c_01;
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__REGISTER f32 c_10;
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asm {
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psq_st c_zero, 8(m), 0, 0
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@@ -60,7 +60,7 @@ void C_MTXCopy(const Mtx src, Mtx dst) {
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}
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}
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asm void PSMTXCopy(const register Mtx src, register Mtx dst) {
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asm void PSMTXCopy(const __REGISTER Mtx src, __REGISTER Mtx dst) {
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psq_l f0, 0(src), 0, 0
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psq_st f0, 0(dst), 0, 0
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psq_l f1, 8(src), 0, 0
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@@ -109,7 +109,7 @@ void C_MTXConcat(const Mtx a, const Mtx b, Mtx ab) {
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}
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}
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asm void PSMTXConcat(const register Mtx a, const register Mtx b, register Mtx ab) {
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asm void PSMTXConcat(const __REGISTER Mtx a, const __REGISTER Mtx b, __REGISTER Mtx ab) {
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nofralloc
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stwu r1, -64(r1)
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psq_l f0, 0(a), 0, 0
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@@ -184,12 +184,12 @@ void C_MTXConcatArray(const Mtx a, const Mtx* srcBase, Mtx* dstBase, u32 count)
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#pragma optimization_level 1
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// This function will not compile at optimization level 0
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#endif
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void PSMTXConcatArray(const register Mtx a, const register Mtx* srcBase, register Mtx* dstBase, register u32 count) {
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register f32 va0, va1, va2, va3, va4, va5;
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register f32 vb0, vb1, vb2, vb3, vb4, vb5;
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register f32 vd0, vd1, vd2, vd3, vd4, vd5;
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register f32 u01;
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register f32* u01Ptr = Unit01;
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void PSMTXConcatArray(const __REGISTER Mtx a, const __REGISTER Mtx* srcBase, __REGISTER Mtx* dstBase, __REGISTER u32 count) {
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__REGISTER f32 va0, va1, va2, va3, va4, va5;
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__REGISTER f32 vb0, vb1, vb2, vb3, vb4, vb5;
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__REGISTER f32 vd0, vd1, vd2, vd3, vd4, vd5;
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__REGISTER f32 u01;
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__REGISTER f32* u01Ptr = Unit01;
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asm {
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psq_l va0, 0(a), 0, 0;
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@@ -307,15 +307,15 @@ void C_MTXTranspose(const Mtx src, Mtx xPose) {
|
||||
}
|
||||
}
|
||||
|
||||
void PSMTXTranspose(const register Mtx src, register Mtx xPose) {
|
||||
register f32 c_zero = 0;
|
||||
register f32 row0a;
|
||||
register f32 row1a;
|
||||
register f32 row0b;
|
||||
register f32 row1b;
|
||||
register f32 trns0;
|
||||
register f32 trns1;
|
||||
register f32 trns2;
|
||||
void PSMTXTranspose(const __REGISTER Mtx src, __REGISTER Mtx xPose) {
|
||||
__REGISTER f32 c_zero = 0;
|
||||
__REGISTER f32 row0a;
|
||||
__REGISTER f32 row1a;
|
||||
__REGISTER f32 row0b;
|
||||
__REGISTER f32 row1b;
|
||||
__REGISTER f32 trns0;
|
||||
__REGISTER f32 trns1;
|
||||
__REGISTER f32 trns2;
|
||||
|
||||
asm {
|
||||
psq_l row0a, 0(src), 0, 0
|
||||
@@ -388,7 +388,7 @@ u32 C_MTXInverse(const Mtx src, Mtx inv) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
asm u32 PSMTXInverse(const register Mtx src, register Mtx inv) {
|
||||
asm u32 PSMTXInverse(const __REGISTER Mtx src, __REGISTER Mtx inv) {
|
||||
psq_l f0, 0(src), 1, 0
|
||||
psq_l f1, 4(src), 0, 0
|
||||
psq_l f2, 16(src), 1, 0
|
||||
@@ -498,7 +498,7 @@ u32 C_MTXInvXpose(const Mtx src, Mtx invX) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
asm u32 PSMTXInvXpose(const register Mtx src, register Mtx invX) {
|
||||
asm u32 PSMTXInvXpose(const __REGISTER Mtx src, __REGISTER Mtx invX) {
|
||||
psq_l f0, 0(src), 1, 0
|
||||
psq_l f1, 4(src), 0, 0
|
||||
psq_l f2, 16(src), 1, 0
|
||||
@@ -622,9 +622,9 @@ void C_MTXRotTrig(Mtx m, char axis, f32 sinA, f32 cosA) {
|
||||
}
|
||||
}
|
||||
|
||||
void PSMTXRotTrig(register Mtx m, register char axis, register f32 sinA, register f32 cosA) {
|
||||
register f32 fc0, fc1, nsinA;
|
||||
register f32 fw0, fw1, fw2, fw3;
|
||||
void PSMTXRotTrig(__REGISTER Mtx m, __REGISTER char axis, __REGISTER f32 sinA, __REGISTER f32 cosA) {
|
||||
__REGISTER f32 fc0, fc1, nsinA;
|
||||
__REGISTER f32 fw0, fw1, fw2, fw3;
|
||||
|
||||
asm {
|
||||
frsp sinA, sinA
|
||||
@@ -685,10 +685,10 @@ void PSMTXRotTrig(register Mtx m, register char axis, register f32 sinA, registe
|
||||
}
|
||||
}
|
||||
|
||||
static void __PSMTXRotAxisRadInternal(register Mtx m, const register Vec* axis, register f32 sT, register f32 cT) {
|
||||
register f32 tT, fc0;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
register f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
static void __PSMTXRotAxisRadInternal(__REGISTER Mtx m, const __REGISTER Vec* axis, __REGISTER f32 sT, __REGISTER f32 cT) {
|
||||
__REGISTER f32 tT, fc0;
|
||||
__REGISTER f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
__REGISTER f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
tmp9 = 0.5f;
|
||||
tmp8 = 3.0f;
|
||||
|
||||
@@ -801,9 +801,9 @@ void C_MTXTrans(Mtx m, f32 xT, f32 yT, f32 zT) {
|
||||
m[2][3] = zT;
|
||||
}
|
||||
|
||||
void PSMTXTrans(register Mtx m, register f32 xT, register f32 yT, register f32 zT) {
|
||||
register f32 c0 = 0.0f;
|
||||
register f32 c1 = 1.0f;
|
||||
void PSMTXTrans(__REGISTER Mtx m, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
__REGISTER f32 c0 = 0.0f;
|
||||
__REGISTER f32 c1 = 1.0f;
|
||||
|
||||
asm {
|
||||
stfs xT, 12(m)
|
||||
@@ -840,7 +840,7 @@ void C_MTXTransApply(const Mtx src, Mtx dst, f32 xT, f32 yT, f32 zT) {
|
||||
dst[2][3] = (src[2][3] + zT);
|
||||
}
|
||||
|
||||
asm void PSMTXTransApply(const register Mtx src, register Mtx dst, register f32 xT, register f32 yT, register f32 zT) {
|
||||
asm void PSMTXTransApply(const __REGISTER Mtx src, __REGISTER Mtx dst, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
nofralloc
|
||||
psq_l fp4, 0(src), 0, 0
|
||||
frsp xT, xT
|
||||
@@ -879,8 +879,8 @@ void C_MTXScale(Mtx m, f32 xS, f32 yS, f32 zS) {
|
||||
m[2][3] = 0;
|
||||
}
|
||||
|
||||
void PSMTXScale(register Mtx m, register f32 xS, register f32 yS, register f32 zS) {
|
||||
register f32 c0 = 0.0f;
|
||||
void PSMTXScale(__REGISTER Mtx m, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
__REGISTER f32 c0 = 0.0f;
|
||||
|
||||
asm {
|
||||
stfs xS, 0(m)
|
||||
@@ -911,7 +911,7 @@ void C_MTXScaleApply(const Mtx src, Mtx dst, f32 xS, f32 yS, f32 zS) {
|
||||
dst[2][3] = (src[2][3] * zS);
|
||||
}
|
||||
|
||||
asm void PSMTXScaleApply(const register Mtx src, register Mtx dst, register f32 xS, register f32 yS, register f32 zS) {
|
||||
asm void PSMTXScaleApply(const __REGISTER Mtx src, __REGISTER Mtx dst, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
nofralloc
|
||||
frsp xS, xS
|
||||
psq_l fp4, 0(src), 0, 0
|
||||
@@ -982,10 +982,10 @@ void C_MTXQuat(Mtx m, const Quaternion* q) {
|
||||
m[2][3] = 0;
|
||||
}
|
||||
|
||||
void PSMTXQuat(register Mtx m, const register Quaternion* q) {
|
||||
register f32 c_zero, c_one, c_two, scale;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
register f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
void PSMTXQuat(__REGISTER Mtx m, const __REGISTER Quaternion* q) {
|
||||
__REGISTER f32 c_zero, c_one, c_two, scale;
|
||||
__REGISTER f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
__REGISTER f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
@@ -1055,13 +1055,13 @@ void C_MTXReflect(Mtx m, const Vec* p, const Vec* n) {
|
||||
m[2][3] = (pdotn * n->z);
|
||||
}
|
||||
|
||||
void PSMTXReflect(register Mtx m, const register Vec* p, const register Vec* n) {
|
||||
register f32 c_one;
|
||||
register f32 vn_xy, vn_z1;
|
||||
register f32 n2vn_xy, n2vn_z1;
|
||||
register f32 pdotn;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3;
|
||||
register f32 tmp4, tmp5, tmp6, tmp7;
|
||||
void PSMTXReflect(__REGISTER Mtx m, const __REGISTER Vec* p, const __REGISTER Vec* n) {
|
||||
__REGISTER f32 c_one;
|
||||
__REGISTER f32 vn_xy, vn_z1;
|
||||
__REGISTER f32 n2vn_xy, n2vn_z1;
|
||||
__REGISTER f32 pdotn;
|
||||
__REGISTER f32 tmp0, tmp1, tmp2, tmp3;
|
||||
__REGISTER f32 tmp4, tmp5, tmp6, tmp7;
|
||||
|
||||
c_one = 1.0f;
|
||||
|
||||
|
||||
+36
-36
@@ -112,9 +112,9 @@ void C_MTX44Identity(Mtx44 m) {
|
||||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
void PSMTX44Identity(register Mtx44 m) {
|
||||
register f32 c1 = 1.0f;
|
||||
register f32 c0 = 0.0f;
|
||||
void PSMTX44Identity(__REGISTER Mtx44 m) {
|
||||
__REGISTER f32 c1 = 1.0f;
|
||||
__REGISTER f32 c0 = 0.0f;
|
||||
|
||||
asm {
|
||||
stfs c1, 0x0(m)
|
||||
@@ -154,7 +154,7 @@ void C_MTX44Copy(const Mtx44 src, Mtx44 dst) {
|
||||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44Copy(const register Mtx44 src, register Mtx44 dst) {
|
||||
asm void PSMTX44Copy(const __REGISTER Mtx44 src, __REGISTER Mtx44 dst) {
|
||||
nofralloc
|
||||
psq_l f1, 0x0(src), 0, 0
|
||||
psq_st f1, 0x0(dst), 0, 0
|
||||
@@ -214,7 +214,7 @@ void C_MTX44Concat(const Mtx44 a, const Mtx44 b, Mtx44 ab) {
|
||||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44Concat(const register Mtx44 a, const register Mtx44 b, register Mtx44 ab) {
|
||||
asm void PSMTX44Concat(const __REGISTER Mtx44 a, const __REGISTER Mtx44 b, __REGISTER Mtx44 ab) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(a), 0, 0
|
||||
psq_l f2, 0x0(b), 0, 0
|
||||
@@ -318,7 +318,7 @@ void C_MTX44Transpose(const Mtx44 src, Mtx44 xPose) {
|
||||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44Transpose(const register Mtx44 src, register Mtx44 xPose) {
|
||||
asm void PSMTX44Transpose(const __REGISTER Mtx44 src, __REGISTER Mtx44 xPose) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(src), 0, 0
|
||||
psq_l f1, 0x10(src), 0, 0
|
||||
@@ -438,10 +438,10 @@ void C_MTX44Trans(Mtx44 m, f32 xT, f32 yT, f32 zT) {
|
||||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
void PSMTX44Trans(register Mtx44 m, register f32 xT, register f32 yT, register f32 zT) {
|
||||
register f32 c_zero = 0.0f;
|
||||
register f32 c_one = 1.0f;
|
||||
register f32 c_01;
|
||||
void PSMTX44Trans(__REGISTER Mtx44 m, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
__REGISTER f32 c_zero = 0.0f;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
__REGISTER f32 c_01;
|
||||
|
||||
asm {
|
||||
stfs xT, 0xc(m)
|
||||
@@ -488,7 +488,7 @@ void C_MTX44TransApply(const Mtx44 src, Mtx44 dst, f32 xT, f32 yT, f32 zT) {
|
||||
dst[2][3] = (src[2][3] + zT);
|
||||
}
|
||||
|
||||
asm void PSMTX44TransApply(const register Mtx44 src, register Mtx44 dst, register f32 xT, register f32 yT, register f32 zT) {
|
||||
asm void PSMTX44TransApply(const __REGISTER Mtx44 src, __REGISTER Mtx44 dst, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
nofralloc
|
||||
psq_l f4, 0x0(src), 0, 0
|
||||
frsp xT, xT
|
||||
@@ -538,9 +538,9 @@ void C_MTX44Scale(Mtx44 m, f32 xS, f32 yS, f32 zS) {
|
||||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
void PSMTX44Scale(register Mtx44 m, register f32 xS, register f32 yS, register f32 zS) {
|
||||
register f32 c_zero = 0.0f;
|
||||
register f32 c_one = 1.0f;
|
||||
void PSMTX44Scale(__REGISTER Mtx44 m, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
__REGISTER f32 c_zero = 0.0f;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
stfs xS, 0x0(m)
|
||||
@@ -581,7 +581,7 @@ void C_MTX44ScaleApply(const Mtx44 src, Mtx44 dst, f32 xS, f32 yS, f32 zS) {
|
||||
dst[3][3] = src[3][3];
|
||||
}
|
||||
|
||||
asm void PSMTX44ScaleApply(const register Mtx44 src, register Mtx44 dst, register f32 xS, register f32 yS, register f32 zS) {
|
||||
asm void PSMTX44ScaleApply(const __REGISTER Mtx44 src, __REGISTER Mtx44 dst, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
nofralloc
|
||||
psq_l f4, 0x0(src), 0, 0
|
||||
frsp xS, xS
|
||||
@@ -695,15 +695,15 @@ void C_MTX44RotTrig(Mtx44 m, char axis, f32 sinA, f32 cosA) {
|
||||
}
|
||||
}
|
||||
|
||||
void PSMTX44RotTrig(register Mtx44 m, register char axis, register f32 sinA, register f32 cosA) {
|
||||
register f32 ftmp0;
|
||||
register f32 ftmp1;
|
||||
register f32 ftmp2;
|
||||
register f32 ftmp3;
|
||||
register f32 ftmp4;
|
||||
void PSMTX44RotTrig(__REGISTER Mtx44 m, __REGISTER char axis, __REGISTER f32 sinA, __REGISTER f32 cosA) {
|
||||
__REGISTER f32 ftmp0;
|
||||
__REGISTER f32 ftmp1;
|
||||
__REGISTER f32 ftmp2;
|
||||
__REGISTER f32 ftmp3;
|
||||
__REGISTER f32 ftmp4;
|
||||
|
||||
register f32 c_zero = 0.0f;
|
||||
register f32 c_one = 1.0f;
|
||||
__REGISTER f32 c_zero = 0.0f;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
frsp sinA, sinA
|
||||
@@ -813,19 +813,19 @@ void C_MTX44RotAxisRad(Mtx44 m, const Vec* axis, f32 rad) {
|
||||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
static void __PSMTX44RotAxisRadInternal(register Mtx44 m, const register Vec* axis, register f32 sT, register f32 cT) {
|
||||
register f32 tT;
|
||||
register f32 fc0;
|
||||
register f32 tmp0;
|
||||
register f32 tmp1;
|
||||
register f32 tmp2;
|
||||
register f32 tmp3;
|
||||
register f32 tmp4;
|
||||
register f32 tmp5;
|
||||
register f32 tmp6;
|
||||
register f32 tmp7;
|
||||
register f32 tmp8;
|
||||
register f32 tmp9;
|
||||
static void __PSMTX44RotAxisRadInternal(__REGISTER Mtx44 m, const __REGISTER Vec* axis, __REGISTER f32 sT, __REGISTER f32 cT) {
|
||||
__REGISTER f32 tT;
|
||||
__REGISTER f32 fc0;
|
||||
__REGISTER f32 tmp0;
|
||||
__REGISTER f32 tmp1;
|
||||
__REGISTER f32 tmp2;
|
||||
__REGISTER f32 tmp3;
|
||||
__REGISTER f32 tmp4;
|
||||
__REGISTER f32 tmp5;
|
||||
__REGISTER f32 tmp6;
|
||||
__REGISTER f32 tmp7;
|
||||
__REGISTER f32 tmp8;
|
||||
__REGISTER f32 tmp9;
|
||||
|
||||
tmp9 = 0.5f;
|
||||
tmp8 = 3.0f;
|
||||
|
||||
@@ -21,7 +21,7 @@ void C_MTX44MultVec(const Mtx44 m, const Vec* src, Vec* dst) {
|
||||
dst->z = vTmp.z * w;
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVec(const register Mtx44 m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTX44MultVec(const __REGISTER Mtx44 m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(src), 0, 0
|
||||
psq_l f2, 0x30(m), 0, 0
|
||||
@@ -78,7 +78,7 @@ void C_MTX44MultVecArray(const Mtx44 m, const Vec* srcBase, Vec* dstBase, u32 co
|
||||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVecArray(const register Mtx44 m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTX44MultVecArray(const __REGISTER Mtx44 m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -0x10(r1)
|
||||
subi count, count, 0x1
|
||||
@@ -157,7 +157,7 @@ void C_MTX44MultVecSR(const Mtx44 m, const Vec* src, Vec* dst) {
|
||||
dst->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVecSR(const register Mtx m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTX44MultVecSR(const __REGISTER Mtx m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(m), 0, 0
|
||||
psq_l f6, 0x0(src), 0, 0
|
||||
@@ -202,7 +202,7 @@ void C_MTX44MultVecArraySR(const Mtx44 m, const Vec* srcBase, Vec* dstBase, u32
|
||||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVecArraySR(const register Mtx44 m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTX44MultVecArraySR(const __REGISTER Mtx44 m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(m), 0, 0
|
||||
subi count, count, 0x1
|
||||
|
||||
@@ -17,7 +17,7 @@ void C_MTXMultVec(const Mtx m, const Vec* src, Vec* dst) {
|
||||
dst->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSMTXMultVec(const register Mtx m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTXMultVec(const __REGISTER Mtx m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, Vec.x(src), 0, 0
|
||||
psq_l f2, 0(m), 0, 0
|
||||
@@ -63,7 +63,7 @@ void C_MTXMultVecArray(const Mtx m, const Vec* srcBase, Vec* dstBase, u32 count)
|
||||
}
|
||||
}
|
||||
|
||||
asm void PSMTXMultVecArray(const register Mtx m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXMultVecArray(const __REGISTER Mtx m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
psq_l f13, 0x0(m), 0, 0
|
||||
psq_l f12, 0x10(m), 0, 0
|
||||
@@ -118,7 +118,7 @@ void C_MTXMultVecSR(const Mtx m, const Vec* src, Vec* dst) {
|
||||
dst->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSMTXMultVecSR(const register Mtx m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTXMultVecSR(const __REGISTER Mtx m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(m), 0, 0
|
||||
psq_l f6, 0x0(src), 0, 0
|
||||
@@ -164,7 +164,7 @@ void C_MTXMultVecArraySR(const Mtx m, const Vec* srcBase, Vec* dstBase, u32 coun
|
||||
}
|
||||
}
|
||||
|
||||
asm void PSMTXMultVecArraySR(const register Mtx m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXMultVecArraySR(const __REGISTER Mtx m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
psq_l f13, 0x0(m), 0, 0
|
||||
psq_l f12, 0x10(m), 0, 0
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
#include <dolphin/mtx.h>
|
||||
#include "fake_tgmath.h"
|
||||
|
||||
asm void PSMTXReorder(const register Mtx src, register ROMtx dest) {
|
||||
asm void PSMTXReorder(const __REGISTER Mtx src, __REGISTER ROMtx dest) {
|
||||
psq_l f0, 0(src), 0, 0
|
||||
psq_l f2, 16(src), 0, 0
|
||||
psq_l f4, 32(src), 0, 0
|
||||
@@ -23,7 +23,7 @@ asm void PSMTXReorder(const register Mtx src, register ROMtx dest) {
|
||||
psq_st f10, 40(dest), 0, 0
|
||||
}
|
||||
|
||||
asm void PSMTXROMultVecArray(const register ROMtx m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXROMultVecArray(const __REGISTER ROMtx m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -64(r1)
|
||||
stfd f14, 8(r1)
|
||||
@@ -99,7 +99,7 @@ exit:
|
||||
blr
|
||||
}
|
||||
|
||||
asm void PSMTXROSkin2VecArray(const register ROMtx m0, const register ROMtx m1, const register f32* wtBase, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXROSkin2VecArray(const __REGISTER ROMtx m0, const __REGISTER ROMtx m1, const __REGISTER f32* wtBase, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -160(r1)
|
||||
stfd f14, 8(r1)
|
||||
@@ -210,7 +210,7 @@ loop:
|
||||
blr
|
||||
}
|
||||
|
||||
asm void PSMTXROMultS16VecArray(const register Mtx m, const register S16Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXROMultS16VecArray(const __REGISTER Mtx m, const __REGISTER S16Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -64(r1)
|
||||
stfd f14, 8(r1)
|
||||
@@ -288,7 +288,7 @@ exit:
|
||||
blr
|
||||
}
|
||||
|
||||
asm void PSMTXMultS16VecArray(const register ROMtx* m, const register S16Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXMultS16VecArray(const __REGISTER ROMtx* m, const __REGISTER S16Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
psq_l f0, 0(m), 0, 0
|
||||
lis r7, 7
|
||||
mtspr GQR6, r7
|
||||
|
||||
+32
-32
@@ -13,8 +13,8 @@ void C_QUATAdd(const Quaternion* p, const Quaternion* q, Quaternion* r) {
|
||||
r->w = p->w + q->w;
|
||||
}
|
||||
|
||||
void PSQUATAdd(const register Quaternion* p, const register Quaternion* q, register Quaternion* r) {
|
||||
register f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
void PSQUATAdd(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q, __REGISTER Quaternion* r) {
|
||||
__REGISTER f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0(p), 0, 0
|
||||
@@ -39,8 +39,8 @@ void C_QUATSubtract(const Quaternion* p, const Quaternion* q, Quaternion* r) {
|
||||
r->w = p->w - q->w;
|
||||
}
|
||||
|
||||
void PSQUATSubtract(const register Quaternion* p, const register Quaternion* q, register Quaternion* r) {
|
||||
register f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
void PSQUATSubtract(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q, __REGISTER Quaternion* r) {
|
||||
__REGISTER f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0(p), 0, 0
|
||||
@@ -78,12 +78,12 @@ void C_QUATMultiply(const Quaternion* p, const Quaternion* q, Quaternion* pq) {
|
||||
}
|
||||
}
|
||||
|
||||
void PSQUATMultiply(const register Quaternion* p, const register Quaternion* q, register Quaternion* pq) {
|
||||
register f32 pxy, pzw;
|
||||
register f32 qxy, qzw;
|
||||
register f32 pnxy, pnzw, pnxny, pnznw;
|
||||
register f32 rxy, rzw;
|
||||
register f32 sxy, szw;
|
||||
void PSQUATMultiply(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q, __REGISTER Quaternion* pq) {
|
||||
__REGISTER f32 pxy, pzw;
|
||||
__REGISTER f32 qxy, qzw;
|
||||
__REGISTER f32 pnxy, pnzw, pnxny, pnznw;
|
||||
__REGISTER f32 rxy, rzw;
|
||||
__REGISTER f32 sxy, szw;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0x0(p), 0, 0
|
||||
@@ -121,8 +121,8 @@ void C_QUATScale(const Quaternion* q, Quaternion* r, f32 scale) {
|
||||
r->w = q->w * scale;
|
||||
}
|
||||
|
||||
void PSQUATScale(const register Quaternion* q, register Quaternion* r, register f32 scale) {
|
||||
register f32 rxy, rzw;
|
||||
void PSQUATScale(const __REGISTER Quaternion* q, __REGISTER Quaternion* r, __REGISTER f32 scale) {
|
||||
__REGISTER f32 rxy, rzw;
|
||||
|
||||
asm {
|
||||
psq_l rxy, 0(q), 0, 0
|
||||
@@ -141,8 +141,8 @@ f32 C_QUATDotProduct(const Quaternion* p, const Quaternion* q) {
|
||||
return (q->x * p->x) + (q->y * p->y) + (q->z * p->z) + (q->w * p->w);
|
||||
}
|
||||
|
||||
f32 PSQUATDotProduct(const register Quaternion* p, const register Quaternion* q) {
|
||||
register f32 pxy, pzw, qxy, qzw, dp;
|
||||
f32 PSQUATDotProduct(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q) {
|
||||
__REGISTER f32 pxy, pzw, qxy, qzw, dp;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0(p), 0, 0
|
||||
@@ -175,16 +175,16 @@ void C_QUATNormalize(const Quaternion* src, Quaternion* unit) {
|
||||
}
|
||||
}
|
||||
|
||||
void PSQUATNormalize(const register Quaternion* src, register Quaternion* unit) {
|
||||
register f32 sxy, szw;
|
||||
register f32 mag, rsqmag;
|
||||
register f32 diff;
|
||||
register f32 c_zero;
|
||||
register f32 nwork0, nwork1;
|
||||
void PSQUATNormalize(const __REGISTER Quaternion* src, __REGISTER Quaternion* unit) {
|
||||
__REGISTER f32 sxy, szw;
|
||||
__REGISTER f32 mag, rsqmag;
|
||||
__REGISTER f32 diff;
|
||||
__REGISTER f32 c_zero;
|
||||
__REGISTER f32 nwork0, nwork1;
|
||||
|
||||
register f32 epsilon = 0.00001f;
|
||||
register f32 c_half = 0.5f;
|
||||
register f32 c_three = 3.0f;
|
||||
__REGISTER f32 epsilon = 0.00001f;
|
||||
__REGISTER f32 c_half = 0.5f;
|
||||
__REGISTER f32 c_three = 3.0f;
|
||||
|
||||
asm {
|
||||
psq_l sxy, 0x0(src), 0, 0
|
||||
@@ -224,15 +224,15 @@ void C_QUATInverse(const Quaternion* src, Quaternion* inv) {
|
||||
inv->w = src->w * norminv;
|
||||
}
|
||||
|
||||
void PSQUATInverse(const register Quaternion* src, register Quaternion* inv) {
|
||||
register f32 sxy, szw;
|
||||
register f32 izz, iww;
|
||||
register f32 mag, nmag;
|
||||
register f32 norminv, nninv;
|
||||
register f32 nwork0;
|
||||
register f32 c_two;
|
||||
register f32 c_zero;
|
||||
register f32 c_one = 1.0f;
|
||||
void PSQUATInverse(const __REGISTER Quaternion* src, __REGISTER Quaternion* inv) {
|
||||
__REGISTER f32 sxy, szw;
|
||||
__REGISTER f32 izz, iww;
|
||||
__REGISTER f32 mag, nmag;
|
||||
__REGISTER f32 norminv, nninv;
|
||||
__REGISTER f32 nwork0;
|
||||
__REGISTER f32 c_two;
|
||||
__REGISTER f32 c_zero;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
psq_l sxy, 0x0(src), 0, 0
|
||||
|
||||
+32
-32
@@ -11,7 +11,7 @@ void C_VECAdd(const Vec* a, const Vec* b, Vec* ab) {
|
||||
ab->z = a->z + b->z;
|
||||
}
|
||||
|
||||
asm void PSVECAdd(const register Vec* a, const register Vec* b, register Vec* ab) {
|
||||
asm void PSVECAdd(const __REGISTER Vec* a, const __REGISTER Vec* b, __REGISTER Vec* ab) {
|
||||
psq_l f2, Vec.x(a), 0, 0
|
||||
psq_l f4, Vec.x(b), 0, 0
|
||||
ps_add f6, f2, f4
|
||||
@@ -31,7 +31,7 @@ void C_VECSubtract(const Vec* a, const Vec* b, Vec* a_b) {
|
||||
a_b->z = a->z - b->z;
|
||||
}
|
||||
|
||||
asm void PSVECSubtract(const register Vec* a, const register Vec* b, register Vec* a_b) {
|
||||
asm void PSVECSubtract(const __REGISTER Vec* a, const __REGISTER Vec* b, __REGISTER Vec* a_b) {
|
||||
psq_l f2, Vec.x(a), 0, 0
|
||||
psq_l f4, Vec.x(b), 0, 0
|
||||
ps_sub f6, f2, f4
|
||||
@@ -50,8 +50,8 @@ void C_VECScale(const Vec* src, Vec* dst, f32 scale) {
|
||||
dst->z = (src->z * scale);
|
||||
}
|
||||
|
||||
void PSVECScale(const register Vec* src, register Vec* dst, register f32 scale) {
|
||||
register f32 vxy, vz, rxy, rz;
|
||||
void PSVECScale(const __REGISTER Vec* src, __REGISTER Vec* dst, __REGISTER f32 scale) {
|
||||
__REGISTER f32 vxy, vz, rxy, rz;
|
||||
|
||||
asm {
|
||||
psq_l vxy, 0x0(src), 0, 0
|
||||
@@ -78,17 +78,17 @@ void C_VECNormalize(const Vec* src, Vec* unit) {
|
||||
unit->z = src->z * mag;
|
||||
}
|
||||
|
||||
void PSVECNormalize(const register Vec* src, register Vec* unit) {
|
||||
register float c_half = 0.5f;
|
||||
register float c_three = 3.0f;
|
||||
register float v1_xy;
|
||||
register float v1_z;
|
||||
register float xx_zz;
|
||||
register float xx_yy;
|
||||
register float sqsum;
|
||||
register float rsqrt;
|
||||
register float nwork0;
|
||||
register float nwork1;
|
||||
void PSVECNormalize(const __REGISTER Vec* src, __REGISTER Vec* unit) {
|
||||
__REGISTER float c_half = 0.5f;
|
||||
__REGISTER float c_three = 3.0f;
|
||||
__REGISTER float v1_xy;
|
||||
__REGISTER float v1_z;
|
||||
__REGISTER float xx_zz;
|
||||
__REGISTER float xx_yy;
|
||||
__REGISTER float sqsum;
|
||||
__REGISTER float rsqrt;
|
||||
__REGISTER float nwork0;
|
||||
__REGISTER float nwork1;
|
||||
|
||||
asm {
|
||||
psq_l v1_xy, 0x0(src), 0, 0
|
||||
@@ -117,8 +117,8 @@ f32 C_VECSquareMag(const Vec* v) {
|
||||
return sqmag;
|
||||
}
|
||||
|
||||
f32 PSVECSquareMag(const register Vec* v) {
|
||||
register f32 vxy, vzz, sqmag;
|
||||
f32 PSVECSquareMag(const __REGISTER Vec* v) {
|
||||
__REGISTER f32 vxy, vzz, sqmag;
|
||||
|
||||
asm {
|
||||
psq_l vxy, 0x0(v), 0, 0
|
||||
@@ -135,11 +135,11 @@ f32 C_VECMag(const Vec* v) {
|
||||
return sqrtf(C_VECSquareMag(v));
|
||||
}
|
||||
|
||||
f32 PSVECMag(const register Vec* v) {
|
||||
register f32 vxy, vzz;
|
||||
register f32 sqmag, rmag;
|
||||
register f32 nwork0, nwork1;
|
||||
register f32 c_three, c_half, c_zero;
|
||||
f32 PSVECMag(const __REGISTER Vec* v) {
|
||||
__REGISTER f32 vxy, vzz;
|
||||
__REGISTER f32 sqmag, rmag;
|
||||
__REGISTER f32 nwork0, nwork1;
|
||||
__REGISTER f32 c_three, c_half, c_zero;
|
||||
|
||||
c_half = 0.5f;
|
||||
|
||||
@@ -178,7 +178,7 @@ f32 C_VECDotProduct(const Vec* a, const Vec* b) {
|
||||
return dot;
|
||||
}
|
||||
|
||||
asm f32 PSVECDotProduct(const register Vec* a, const register Vec* b) {
|
||||
asm f32 PSVECDotProduct(const __REGISTER Vec* a, const __REGISTER Vec* b) {
|
||||
psq_l f2, Vec.y(a), 0, 0
|
||||
psq_l f3, Vec.y(b), 0, 0
|
||||
ps_mul f2, f2, f3
|
||||
@@ -203,7 +203,7 @@ void C_VECCrossProduct(const Vec* a, const Vec* b, Vec* axb) {
|
||||
axb->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSVECCrossProduct(const register Vec* a, const register Vec* b, register Vec* axb) {
|
||||
asm void PSVECCrossProduct(const __REGISTER Vec* a, const __REGISTER Vec* b, __REGISTER Vec* axb) {
|
||||
psq_l f1, Vec.x(b), 0, 0
|
||||
lfs f2, Vec.z(a)
|
||||
psq_l f0, Vec.x(a), 0, 0
|
||||
@@ -279,9 +279,9 @@ f32 C_VECSquareDistance(const Vec* a, const Vec* b) {
|
||||
return (diff.z * diff.z) + ((diff.x * diff.x) + (diff.y * diff.y));
|
||||
}
|
||||
|
||||
f32 PSVECSquareDistance(const register Vec* a, const register Vec* b) {
|
||||
register f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
register f32 sqdist;
|
||||
f32 PSVECSquareDistance(const __REGISTER Vec* a, const __REGISTER Vec* b) {
|
||||
__REGISTER f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
__REGISTER f32 sqdist;
|
||||
|
||||
asm {
|
||||
psq_l v0yz, 0x4(a), 0, 0
|
||||
@@ -302,11 +302,11 @@ f32 C_VECDistance(const Vec* a, const Vec* b) {
|
||||
return sqrtf(C_VECSquareDistance(a, b));
|
||||
}
|
||||
|
||||
f32 PSVECDistance(const register Vec* a, const register Vec* b) {
|
||||
register f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
register f32 sqdist, rdist;
|
||||
register f32 nwork0, nwork1;
|
||||
register f32 c_half, c_three, c_zero;
|
||||
f32 PSVECDistance(const __REGISTER Vec* a, const __REGISTER Vec* b) {
|
||||
__REGISTER f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
__REGISTER f32 sqdist, rdist;
|
||||
__REGISTER f32 nwork0, nwork1;
|
||||
__REGISTER f32 c_half, c_three, c_zero;
|
||||
|
||||
asm {
|
||||
psq_l v0yz, 0x4(a), 0, 0
|
||||
|
||||
+1
-1
@@ -590,7 +590,7 @@ entry __OSEVEnd
|
||||
void __OSUnhandledException(__OSException exception, OSContext* context, u32 dsisr, u32 dar);
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSDefaultExceptionHandler(register __OSException exception, register OSContext* context) {
|
||||
asm void OSDefaultExceptionHandler(__REGISTER __OSException exception, __REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
mfdsisr r5
|
||||
|
||||
@@ -12,7 +12,7 @@ typedef struct {
|
||||
// prototypes
|
||||
static void SetTimer(OSAlarm * alarm);
|
||||
static void InsertAlarm(OSAlarm* alarm, OSTime fire, OSAlarmHandler handler);
|
||||
static void DecrementerExceptionCallback(register __OSException exception, register OSContext* context);
|
||||
static void DecrementerExceptionCallback(__REGISTER __OSException exception, __REGISTER OSContext* context);
|
||||
static void DecrementerExceptionHandler(__OSException exception, OSContext* context);
|
||||
static BOOL OnReset(BOOL final);
|
||||
|
||||
@@ -178,8 +178,8 @@ void OSCancelAlarm(OSAlarm* alarm) {
|
||||
OSRestoreInterrupts(enabled);
|
||||
}
|
||||
|
||||
static void DecrementerExceptionCallback(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static void DecrementerExceptionCallback(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
OSAlarm* alarm;
|
||||
OSAlarm* next;
|
||||
OSAlarmHandler handler;
|
||||
@@ -230,8 +230,8 @@ static void DecrementerExceptionCallback(register __OSException exception,
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void DecrementerExceptionHandler(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static asm void DecrementerExceptionHandler(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
stwu r1, -8(r1)
|
||||
|
||||
+19
-19
@@ -53,37 +53,37 @@ asm void DCUnfreeze(void) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCTouchLoad(register void* addr) {
|
||||
asm void DCTouchLoad(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbt r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockZero(register void* addr) {
|
||||
asm void DCBlockZero(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbz r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockStore(register void* addr) {
|
||||
asm void DCBlockStore(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbst r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockFlush(register void* addr) {
|
||||
asm void DCBlockFlush(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbf r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockInvalidate(register void* addr) {
|
||||
asm void DCBlockInvalidate(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbi r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCInvalidateRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -100,7 +100,7 @@ asm void DCInvalidateRange(register void* addr, register u32 nBytes) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCFlushRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCFlushRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -118,7 +118,7 @@ asm void DCFlushRange(register void* addr, register u32 nBytes) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCStoreRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCStoreRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -137,7 +137,7 @@ asm void DCStoreRange(register void* addr, register u32 nBytes) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCFlushRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
asm void DCFlushRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -154,7 +154,7 @@ asm void DCFlushRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCStoreRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
asm void DCStoreRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -172,7 +172,7 @@ asm void DCStoreRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCZeroRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCZeroRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -190,7 +190,7 @@ asm void DCZeroRange(register void* addr, register u32 nBytes) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCTouchRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCTouchRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -208,7 +208,7 @@ asm void DCTouchRange(register void* addr, register u32 nBytes) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void ICInvalidateRange(register void* addr, register u32 nBytes) {
|
||||
asm void ICInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
@@ -271,7 +271,7 @@ asm void ICUnfreeze(void) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void ICBlockInvalidate(register void* addr) {
|
||||
asm void ICBlockInvalidate(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
icbi r0, addr
|
||||
blr
|
||||
@@ -371,7 +371,7 @@ asm void LCDisable(void) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void LCAllocOneTag(register BOOL invalidate, register void* tag) {
|
||||
asm void LCAllocOneTag(__REGISTER BOOL invalidate, __REGISTER void* tag) {
|
||||
nofralloc
|
||||
cmpwi invalidate, 0
|
||||
beq @1
|
||||
@@ -381,7 +381,7 @@ asm void LCAllocOneTag(register BOOL invalidate, register void* tag) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void LCAllocTags(register BOOL invalidate, register void* startTag, register u32 numBlocks) {
|
||||
asm void LCAllocTags(__REGISTER BOOL invalidate, __REGISTER void* startTag, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
mflr r6
|
||||
cmplwi numBlocks, 0
|
||||
@@ -404,7 +404,7 @@ asm void LCAllocTags(register BOOL invalidate, register void* startTag, register
|
||||
blr
|
||||
}
|
||||
|
||||
asm void LCLoadBlocks(register void* destTag, register void* srcAddr, register u32 numBlocks) {
|
||||
asm void LCLoadBlocks(__REGISTER void* destTag, __REGISTER void* srcAddr, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm srcAddr, srcAddr, 0, 4, 31
|
||||
@@ -417,7 +417,7 @@ asm void LCLoadBlocks(register void* destTag, register void* srcAddr, register u
|
||||
blr
|
||||
}
|
||||
|
||||
asm void LCStoreBlocks(register void* destAddr, register void* srcTag, register u32 numBlocks) {
|
||||
asm void LCStoreBlocks(__REGISTER void* destAddr, __REGISTER void* srcTag, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm destAddr, destAddr, 0, 4, 31
|
||||
@@ -509,7 +509,7 @@ asm u32 LCQueueLength(void) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void LCQueueWait(register u32 len) {
|
||||
asm void LCQueueWait(__REGISTER u32 len) {
|
||||
nofralloc
|
||||
@1
|
||||
mfspr r4, HID2
|
||||
|
||||
+13
-13
@@ -14,7 +14,7 @@ volatile OSContext* __OSCurrentContext AT_ADDRESS(OS_BASE_CACHED | 0x00D4);
|
||||
volatile OSContext* __OSFPUContext AT_ADDRESS(OS_BASE_CACHED | 0x00D8);
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void __OSLoadFPUContext(register u32 dummy, register OSContext* fpucontext) {
|
||||
static asm void __OSLoadFPUContext(__REGISTER u32 dummy, __REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
lhz r5, fpucontext->state;
|
||||
clrlwi. r5, r5, 31
|
||||
@@ -96,7 +96,7 @@ _return:
|
||||
blr
|
||||
}
|
||||
|
||||
static asm void __OSSaveFPUContext(register u32 dummy1, register u32 dummy2, register OSContext* fpucontext) {
|
||||
static asm void __OSSaveFPUContext(__REGISTER u32 dummy1, __REGISTER u32 dummy2, __REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
|
||||
lhz r3, fpucontext->state
|
||||
@@ -182,19 +182,19 @@ _return:
|
||||
blr
|
||||
}
|
||||
|
||||
asm void OSLoadFPUContext(register OSContext* fpucontext) {
|
||||
asm void OSLoadFPUContext(__REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
addi r4, fpucontext, 0
|
||||
b __OSLoadFPUContext
|
||||
}
|
||||
|
||||
asm void OSSaveFPUContext(register OSContext* fpucontext) {
|
||||
asm void OSSaveFPUContext(__REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
addi r5, fpucontext, 0
|
||||
b __OSSaveFPUContext
|
||||
}
|
||||
|
||||
asm void OSSetCurrentContext(register OSContext* context){
|
||||
asm void OSSetCurrentContext(__REGISTER OSContext* context){
|
||||
nofralloc
|
||||
|
||||
addis r4, r0, OS_CACHED_REGION_PREFIX
|
||||
@@ -234,7 +234,7 @@ OSContext* OSGetCurrentContext(void) {
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm u32 OSSaveContext(register OSContext* context) {
|
||||
asm u32 OSSaveContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
stmw r13, context->gpr[13]
|
||||
mfspr r0, GQR1
|
||||
@@ -270,7 +270,7 @@ asm u32 OSSaveContext(register OSContext* context) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm void OSLoadContext(register OSContext* context) {
|
||||
asm void OSLoadContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
|
||||
lis r4,__RAS_OSDisableInterrupts_begin@ha
|
||||
@@ -347,7 +347,7 @@ asm u32 OSGetStackPointer() {
|
||||
blr
|
||||
}
|
||||
|
||||
asm u32 OSSwitchStack(register u32 newsp) {
|
||||
asm u32 OSSwitchStack(__REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
mr r5, r1
|
||||
mr r1, newsp
|
||||
@@ -355,7 +355,7 @@ asm u32 OSSwitchStack(register u32 newsp) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm int OSSwitchFiber(register u32 pc, register u32 newsp) {
|
||||
asm int OSSwitchFiber(__REGISTER u32 pc, __REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
mflr r0
|
||||
mr r5, r1
|
||||
@@ -372,7 +372,7 @@ asm int OSSwitchFiber(register u32 pc, register u32 newsp) {
|
||||
}
|
||||
#endif
|
||||
|
||||
void OSClearContext(register OSContext* context) {
|
||||
void OSClearContext(__REGISTER OSContext* context) {
|
||||
context->mode = 0;
|
||||
context->state = 0;
|
||||
if (context == __OSFPUContext)
|
||||
@@ -380,7 +380,7 @@ void OSClearContext(register OSContext* context) {
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSInitContext(register OSContext* context, register u32 pc, register u32 newsp) {
|
||||
asm void OSInitContext(__REGISTER OSContext* context, __REGISTER u32 pc, __REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
|
||||
stw pc, OS_CONTEXT_SRR0(context)
|
||||
@@ -491,7 +491,7 @@ void OSDumpContext(OSContext* context) {
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void OSSwitchFPUContext(register __OSException exception, register OSContext* context) {
|
||||
static asm void OSSwitchFPUContext(__REGISTER __OSException exception, __REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
mfmsr r5
|
||||
ori r5, r5, 0x2000
|
||||
@@ -538,7 +538,7 @@ void __OSContextInit(void) {
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSFillFPUContext(register OSContext* context) {
|
||||
asm void OSFillFPUContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
mfmsr r5
|
||||
ori r5, r5, 0x2000
|
||||
|
||||
@@ -51,7 +51,7 @@ static int PackArgs(void* addr, s32 argc, char** argv) {
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void Run(register void* entryPoint) {
|
||||
static asm void Run(__REGISTER void* entryPoint) {
|
||||
nofralloc
|
||||
|
||||
mflr r0
|
||||
|
||||
@@ -77,7 +77,7 @@ char* __OSPIErrors[8] = {
|
||||
#endif
|
||||
|
||||
// prototypes
|
||||
static void ExternalInterruptHandler(register __OSException exception, register OSContext* context);
|
||||
static void ExternalInterruptHandler(__REGISTER __OSException exception, __REGISTER OSContext* context);
|
||||
extern void __RAS_OSDisableInterrupts_begin(void);
|
||||
extern void __RAS_OSDisableInterrupts_end(void);
|
||||
|
||||
@@ -103,7 +103,7 @@ asm BOOL OSEnableInterrupts(void) {
|
||||
blr
|
||||
}
|
||||
|
||||
asm BOOL OSRestoreInterrupts(register BOOL level) {
|
||||
asm BOOL OSRestoreInterrupts(__REGISTER BOOL level) {
|
||||
nofralloc
|
||||
|
||||
cmpwi level, 0
|
||||
@@ -497,8 +497,8 @@ void __OSDispatchInterrupt(__OSException exception, OSContext* context) {
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void ExternalInterruptHandler(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static asm void ExternalInterruptHandler(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
#pragma unused(exception)
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
|
||||
@@ -179,7 +179,7 @@ static asm void Config48MB(void) {
|
||||
#endif
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void RealMode(register u32 addr) {
|
||||
static asm void RealMode(__REGISTER u32 addr) {
|
||||
nofralloc
|
||||
clrlwi addr, addr, 2
|
||||
mtsrr0 addr
|
||||
|
||||
@@ -208,7 +208,7 @@ static BOOL __OSIsThreadActive(OSThread* thread) {
|
||||
}
|
||||
|
||||
s32 OSDisableScheduler(void) {
|
||||
register BOOL enabled;
|
||||
__REGISTER BOOL enabled;
|
||||
s32 count;
|
||||
|
||||
enabled = OSDisableInterrupts();
|
||||
@@ -219,7 +219,7 @@ s32 OSDisableScheduler(void) {
|
||||
}
|
||||
|
||||
s32 OSEnableScheduler(void) {
|
||||
register BOOL enabled;
|
||||
__REGISTER BOOL enabled;
|
||||
s32 count;
|
||||
|
||||
enabled = OSDisableInterrupts();
|
||||
@@ -839,9 +839,9 @@ s32 OSCheckActiveThreads(void) {
|
||||
}
|
||||
|
||||
void OSClearStack(u8 val) {
|
||||
register u32 sp;
|
||||
register u32* p;
|
||||
register u32 pattern;
|
||||
__REGISTER u32 sp;
|
||||
__REGISTER u32* p;
|
||||
__REGISTER u32 pattern;
|
||||
|
||||
pattern = (val << 24) | (val << 16) | (val << 8) | val;
|
||||
sp = OSGetStackPointer();
|
||||
|
||||
@@ -81,7 +81,7 @@ OSTime __OSTimeToSystemTime(OSTime time) {
|
||||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void __OSSetTick(register OSTick newTicks) {
|
||||
asm void __OSSetTick(__REGISTER OSTick newTicks) {
|
||||
nofralloc
|
||||
mttbl newTicks
|
||||
blr
|
||||
|
||||
@@ -111,7 +111,7 @@ static void DecrementerExceptionCallback(__OSException exception, OSContext* con
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void DecrementerExceptionHandler(__OSException exception,
|
||||
register OSContext* context) {
|
||||
__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
|
||||
stw r0, context->gpr[0]
|
||||
|
||||
@@ -98,7 +98,7 @@ void __OSReschedule(void);
|
||||
// OSTime
|
||||
void __OSSetTime(OSTime time);
|
||||
OSTime __OSGetSystemTime();
|
||||
void __OSSetTick(register OSTick newTicks);
|
||||
void __OSSetTick(__REGISTER OSTick newTicks);
|
||||
OSTime __OSTimeToSystemTime(OSTime time);
|
||||
|
||||
// ppc_eabi_init
|
||||
|
||||
Reference in New Issue
Block a user