mirror of
https://github.com/pret/pokediamond.git
synced 2026-10-02 07:40:05 -04:00
Decompile GX_bgcnt.s
This commit is contained in:
Made
@@ -1,422 +0,0 @@
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.include "asm/macros.inc"
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.include "global.inc"
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.text
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arm_func_start G2S_GetBG3CharPtr
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G2S_GetBG3CharPtr: ; 0x020C6F60
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ldr r1, _020C6FA8 ; =0x04001000
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ldr r0, _020C6FAC ; =0x0400100E
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ldr r1, [r1, #0x0]
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ldrh r2, [r0, #0x0]
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and r0, r1, #0x7
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cmp r0, #0x3
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blt _020C6F8C
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cmp r0, #0x6
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bge _020C6FA0
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ands r0, r2, #0x80
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bne _020C6FA0
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_020C6F8C:
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and r0, r2, #0x3c
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mov r0, r0, lsr #0x2
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mov r0, r0, lsl #0xe
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add r0, r0, #0x6200000
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bx lr
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_020C6FA0:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C6FA8: .word 0x04001000
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_020C6FAC: .word 0x0400100E
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arm_func_start G2_GetBG3CharPtr
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G2_GetBG3CharPtr: ; 0x020C6FB0
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mov r0, #0x4000000
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ldr r1, [r0, #0x0]
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ldr r0, _020C700C ; =0x0400000E
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and r1, r1, #0x7
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cmp r1, #0x3
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ldrh r2, [r0, #0x0]
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blt _020C6FDC
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cmp r1, #0x6
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bge _020C7004
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ands r0, r2, #0x80
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bne _020C7004
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_020C6FDC:
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mov r0, #0x4000000
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ldr r1, [r0, #0x0]
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and r0, r2, #0x3c
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and r1, r1, #0x7000000
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mov r1, r1, lsr #0x18
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mov r1, r1, lsl #0x10
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add r1, r1, #0x6000000
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mov r0, r0, lsr #0x2
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add r0, r1, r0, lsl #0xe
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bx lr
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_020C7004:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C700C: .word 0x0400000E
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arm_func_start G2S_GetBG2CharPtr
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G2S_GetBG2CharPtr: ; 0x020C7010
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ldr r1, _020C7050 ; =0x04001000
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ldr r0, _020C7054 ; =0x0400100C
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ldr r1, [r1, #0x0]
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ldrh r2, [r0, #0x0]
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and r0, r1, #0x7
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cmp r0, #0x5
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blt _020C7034
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ands r0, r2, #0x80
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bne _020C7048
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_020C7034:
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and r0, r2, #0x3c
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mov r0, r0, lsr #0x2
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mov r0, r0, lsl #0xe
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add r0, r0, #0x6200000
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bx lr
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_020C7048:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C7050: .word 0x04001000
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_020C7054: .word 0x0400100C
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arm_func_start G2_GetBG2CharPtr
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G2_GetBG2CharPtr: ; 0x020C7058
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mov r0, #0x4000000
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ldr r1, [r0, #0x0]
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ldr r0, _020C70AC ; =0x0400000C
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and r1, r1, #0x7
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cmp r1, #0x5
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ldrh r2, [r0, #0x0]
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blt _020C707C
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ands r0, r2, #0x80
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bne _020C70A4
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_020C707C:
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mov r0, #0x4000000
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ldr r1, [r0, #0x0]
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and r0, r2, #0x3c
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and r1, r1, #0x7000000
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mov r1, r1, lsr #0x18
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mov r1, r1, lsl #0x10
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add r1, r1, #0x6000000
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mov r0, r0, lsr #0x2
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add r0, r1, r0, lsl #0xe
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bx lr
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_020C70A4:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C70AC: .word 0x0400000C
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arm_func_start G2S_GetBG1CharPtr
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G2S_GetBG1CharPtr: ; 0x020C70B0
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ldr r0, _020C70CC ; =0x0400100A
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ldrh r0, [r0, #0x0]
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and r0, r0, #0x3c
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mov r0, r0, asr #0x2
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mov r0, r0, lsl #0xe
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add r0, r0, #0x6200000
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bx lr
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.balign 4
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_020C70CC: .word 0x0400100A
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arm_func_start G2_GetBG1CharPtr
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G2_GetBG1CharPtr: ; 0x020C70D0
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ldr r1, _020C7100 ; =0x0400000A
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mov r0, #0x4000000
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ldrh r1, [r1, #0x0]
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ldr r0, [r0, #0x0]
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and r0, r0, #0x7000000
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mov r0, r0, lsr #0x18
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and r1, r1, #0x3c
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mov r0, r0, lsl #0x10
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mov r1, r1, asr #0x2
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add r0, r0, #0x6000000
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add r0, r0, r1, lsl #0xe
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bx lr
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.balign 4
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_020C7100: .word 0x0400000A
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arm_func_start G2S_GetBG0CharPtr
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G2S_GetBG0CharPtr: ; 0x020C7104
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ldr r0, _020C7120 ; =0x04001008
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ldrh r0, [r0, #0x0]
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and r0, r0, #0x3c
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mov r0, r0, asr #0x2
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mov r0, r0, lsl #0xe
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add r0, r0, #0x6200000
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bx lr
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.balign 4
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_020C7120: .word 0x04001008
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arm_func_start G2_GetBG0CharPtr
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G2_GetBG0CharPtr: ; 0x020C7124
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ldr r1, _020C7154 ; =0x04000008
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mov r0, #0x4000000
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ldrh r1, [r1, #0x0]
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ldr r0, [r0, #0x0]
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and r0, r0, #0x7000000
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mov r0, r0, lsr #0x18
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and r1, r1, #0x3c
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mov r0, r0, lsl #0x10
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mov r1, r1, asr #0x2
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add r0, r0, #0x6000000
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add r0, r0, r1, lsl #0xe
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bx lr
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.balign 4
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_020C7154: .word 0x04000008
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arm_func_start G2S_GetBG3ScrPtr
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G2S_GetBG3ScrPtr: ; 0x020C7158
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ldr r1, _020C71D0 ; =0x04001000
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ldr r0, _020C71D4 ; =0x0400100E
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ldr r1, [r1, #0x0]
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ldrh r2, [r0, #0x0]
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and r3, r1, #0x7
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cmp r3, #0x6
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and r0, r2, #0x1f00
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mov r1, r0, lsr #0x8
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addls pc, pc, r3, lsl #0x2
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b _020C71C8
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_020C7180: ; 0x020C7180
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b _020C719C
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_020C7184: ; 0x020C7184
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b _020C719C
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_020C7188: ; 0x020C7188
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b _020C719C
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_020C718C: ; 0x020C718C
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b _020C71A8
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_020C7190: ; 0x020C7190
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b _020C71A8
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_020C7194: ; 0x020C7194
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b _020C71A8
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_020C7198: ; 0x020C7198
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b _020C71C0
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_020C719C:
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mov r0, r1, lsl #0xb
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add r0, r0, #0x6200000
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bx lr
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_020C71A8:
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ands r0, r2, #0x80
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movne r0, r1, lsl #0xe
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addne r0, r0, #0x6200000
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moveq r0, r1, lsl #0xb
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addeq r0, r0, #0x6200000
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bx lr
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_020C71C0:
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mov r0, #0x0
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bx lr
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_020C71C8:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C71D0: .word 0x04001000
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_020C71D4: .word 0x0400100E
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arm_func_start G2_GetBG3ScrPtr
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G2_GetBG3ScrPtr: ; 0x020C71D8
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ldr r0, _020C7260 ; =0x0400000E
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mov r2, #0x4000000
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ldr r1, [r2, #0x0]
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ldrh r3, [r0, #0x0]
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ldr r0, [r2, #0x0]
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and r12, r1, #0x7
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and r0, r0, #0x38000000
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mov r1, r0, lsr #0x1b
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and r0, r3, #0x1f00
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mov r2, r1, lsl #0x10
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cmp r12, #0x6
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mov r1, r0, lsr #0x8
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addls pc, pc, r12, lsl #0x2
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b _020C7258
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_020C7210:
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b _020C722C
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_020C7214:
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b _020C722C
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_020C7218:
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b _020C722C
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_020C721C:
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b _020C7238
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_020C7220:
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b _020C7238
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_020C7224:
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b _020C7238
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_020C7228:
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b _020C7250
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_020C722C:
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add r0, r2, #0x6000000
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add r0, r0, r1, lsl #0xb
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bx lr
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_020C7238:
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ands r0, r3, #0x80
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movne r0, r1, lsl #0xe
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addne r0, r0, #0x6000000
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addeq r0, r2, #0x6000000
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addeq r0, r0, r1, lsl #0xb
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bx lr
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_020C7250:
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mov r0, #0x0
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bx lr
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_020C7258:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C7260: .word 0x0400000E
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arm_func_start G2S_GetBG2ScrPtr
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G2S_GetBG2ScrPtr: ; 0x020C7264
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ldr r1, _020C72DC ; =0x04001000
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ldr r0, _020C72E0 ; =0x0400100C
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ldr r1, [r1, #0x0]
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ldrh r2, [r0, #0x0]
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and r3, r1, #0x7
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cmp r3, #0x6
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and r0, r2, #0x1f00
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mov r1, r0, lsr #0x8
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addls pc, pc, r3, lsl #0x2
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b _020C72D4
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_020C728C: ; 0x020C728C
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b _020C72A8
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_020C7290: ; 0x020C7290
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b _020C72A8
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_020C7294: ; 0x020C7294
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b _020C72A8
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_020C7298: ; 0x020C7298
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b _020C72A8
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_020C729C: ; 0x020C729C
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b _020C72A8
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_020C72A0: ; 0x020C72A0
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b _020C72B4
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_020C72A4: ; 0x020C72A4
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b _020C72CC
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_020C72A8:
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mov r0, r1, lsl #0xb
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add r0, r0, #0x6200000
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bx lr
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_020C72B4:
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ands r0, r2, #0x80
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movne r0, r1, lsl #0xe
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addne r0, r0, #0x6200000
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moveq r0, r1, lsl #0xb
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addeq r0, r0, #0x6200000
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bx lr
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_020C72CC:
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mov r0, #0x0
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bx lr
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_020C72D4:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C72DC: .word 0x04001000
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_020C72E0: .word 0x0400100C
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arm_func_start G2_GetBG2ScrPtr
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G2_GetBG2ScrPtr: ; 0x020C72E4
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ldr r0, _020C736C ; =0x0400000C
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mov r2, #0x4000000
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ldr r1, [r2, #0x0]
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ldrh r3, [r0, #0x0]
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ldr r0, [r2, #0x0]
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and r12, r1, #0x7
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and r0, r0, #0x38000000
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mov r1, r0, lsr #0x1b
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and r0, r3, #0x1f00
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mov r2, r1, lsl #0x10
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cmp r12, #0x6
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mov r1, r0, lsr #0x8
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addls pc, pc, r12, lsl #0x2
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b _020C7364
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_020C731C:
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b _020C7338
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_020C7320:
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b _020C7338
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_020C7324:
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b _020C7338
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_020C7328:
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b _020C7338
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_020C732C:
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b _020C7338
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_020C7330:
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b _020C7344
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_020C7334:
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b _020C735C
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_020C7338:
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add r0, r2, #0x6000000
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add r0, r0, r1, lsl #0xb
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bx lr
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_020C7344:
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ands r0, r3, #0x80
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movne r0, r1, lsl #0xe
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addne r0, r0, #0x6000000
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addeq r0, r2, #0x6000000
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addeq r0, r0, r1, lsl #0xb
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bx lr
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_020C735C:
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mov r0, #0x6000000
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bx lr
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_020C7364:
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mov r0, #0x0
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bx lr
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.balign 4
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_020C736C: .word 0x0400000C
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arm_func_start G2S_GetBG1ScrPtr
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G2S_GetBG1ScrPtr: ; 0x020C7370
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ldr r0, _020C738C ; =0x0400100A
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ldrh r0, [r0, #0x0]
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and r0, r0, #0x1f00
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mov r0, r0, asr #0x8
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mov r0, r0, lsl #0xb
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add r0, r0, #0x6200000
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bx lr
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.balign 4
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_020C738C: .word 0x0400100A
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arm_func_start G2_GetBG1ScrPtr
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G2_GetBG1ScrPtr: ; 0x020C7390
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ldr r1, _020C73C0 ; =0x0400000A
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mov r0, #0x4000000
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ldrh r1, [r1, #0x0]
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ldr r0, [r0, #0x0]
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and r0, r0, #0x38000000
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mov r0, r0, lsr #0x1b
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and r1, r1, #0x1f00
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mov r0, r0, lsl #0x10
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mov r1, r1, asr #0x8
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add r0, r0, #0x6000000
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add r0, r0, r1, lsl #0xb
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bx lr
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.balign 4
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_020C73C0: .word 0x0400000A
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arm_func_start G2S_GetBG0ScrPtr
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G2S_GetBG0ScrPtr: ; 0x020C73C4
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ldr r0, _020C73E0 ; =0x04001008
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ldrh r0, [r0, #0x0]
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and r0, r0, #0x1f00
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mov r0, r0, asr #0x8
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mov r0, r0, lsl #0xb
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add r0, r0, #0x6200000
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bx lr
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.balign 4
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_020C73E0: .word 0x04001008
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arm_func_start G2_GetBG0ScrPtr
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G2_GetBG0ScrPtr: ; 0x020C73E4
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ldr r1, _020C7414 ; =0x04000008
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mov r0, #0x4000000
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ldrh r1, [r1, #0x0]
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ldr r0, [r0, #0x0]
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and r0, r0, #0x38000000
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mov r0, r0, lsr #0x1b
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and r1, r1, #0x1f00
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mov r0, r0, lsl #0x10
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||||
mov r1, r1, asr #0x8
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add r0, r0, #0x6000000
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add r0, r0, r1, lsl #0xb
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bx lr
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.balign 4
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_020C7414: .word 0x04000008
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+33
-1
@@ -51,6 +51,19 @@
|
||||
|
||||
#define HW_REG_DISP3DCNT 0x04000060
|
||||
|
||||
#define HW_REG_BG0CNT_A 0x04000008
|
||||
#define HW_REG_BG1CNT_A 0x0400000A
|
||||
#define HW_REG_BG2CNT_A 0x0400000C
|
||||
#define HW_REG_BG3CNT_A 0x0400000E
|
||||
|
||||
#define HW_REG_BG0CNT_B 0x04001008
|
||||
#define HW_REG_BG1CNT_B 0x0400100A
|
||||
#define HW_REG_BG2CNT_B 0x0400100C
|
||||
#define HW_REG_BG3CNT_B 0x0400100E
|
||||
|
||||
#define HW_REG_DISPCNT_A 0x04000000
|
||||
#define HW_REG_DISPCNT_B 0x04001000
|
||||
|
||||
//TODO: wait for register commit and replace these
|
||||
#define SETREG8(x, y) ((*(vu8 *)x) = y)
|
||||
#define SETREG16(x, y) ((*(vu16 *)x) = y)
|
||||
@@ -105,7 +118,7 @@ void G3_RotY(fx32 sinphi, fx32 cosphi);
|
||||
void G3_RotZ(fx32 sinphi, fx32 cosphi);
|
||||
|
||||
//GX_g3x
|
||||
asm void GXi_NopClearFifo128_(void *reg);
|
||||
void GXi_NopClearFifo128_(void *reg);
|
||||
void G3X_Init();
|
||||
void G3X_ResetMtxStack();
|
||||
void G3X_ClearFifo();
|
||||
@@ -197,6 +210,25 @@ u32 GX_GetBankForSubOBJ();
|
||||
u32 GX_GetBankForSubBGExtPltt();
|
||||
u32 GX_GetBankForSubOBJExtPltt();
|
||||
|
||||
//GX_bgcnt
|
||||
void *G2_GetBG0ScrPtr();
|
||||
void *G2S_GetBG0ScrPtr();
|
||||
void *G2_GetBG1ScrPtr();
|
||||
void *G2S_GetBG1ScrPtr();
|
||||
void *G2_GetBG2ScrPtr();
|
||||
void *G2S_GetBG2ScrPtr();
|
||||
void *G2_GetBG3ScrPtr();
|
||||
void *G2S_GetBG3ScrPtr();
|
||||
void *G2_GetBG0CharPtr();
|
||||
void *G2S_GetBG0CharPtr();
|
||||
void *G2_GetBG1CharPtr();
|
||||
void *G2S_GetBG1CharPtr();
|
||||
void *G2_GetBG2CharPtr();
|
||||
void *G2S_GetBG2CharPtr();
|
||||
void *G2_GetBG3CharPtr();
|
||||
void *G2S_GetBG3CharPtr();
|
||||
|
||||
|
||||
//GXi_NopClearFifo128_ probably asm
|
||||
|
||||
#endif //GUARD_GX_H
|
||||
|
||||
@@ -0,0 +1,195 @@
|
||||
#include "global.h"
|
||||
#include "main.h"
|
||||
#include "gx.h"
|
||||
|
||||
void *G2_GetBG0ScrPtr(){
|
||||
u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x1F00) >> 0x8) << 0xB);
|
||||
return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp);
|
||||
}
|
||||
|
||||
void *G2S_GetBG0ScrPtr(){
|
||||
return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x1F00) >> 0x8) << 0xB));
|
||||
}
|
||||
|
||||
void *G2_GetBG1ScrPtr(){
|
||||
u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x1F00) >> 0x8) << 0xB);
|
||||
return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp);
|
||||
}
|
||||
|
||||
void *G2S_GetBG1ScrPtr(){
|
||||
return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x1F00) >> 0x8) << 0xB));
|
||||
}
|
||||
|
||||
void *G2_GetBG2ScrPtr(){
|
||||
u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7);
|
||||
u32 temp3 = READREG16(HW_REG_BG2CNT_A);
|
||||
u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10);
|
||||
u32 temp1 = ((temp3 & 0x1F00) >> 0x8);
|
||||
switch (temp12)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
return (void *)(0x6000000 + temp2 + (temp1 << 0xB));
|
||||
case 5:
|
||||
if (temp3 & 0x80)
|
||||
return (void *)(0x6000000 + (temp1 << 0xE));
|
||||
else
|
||||
return (void *)(0x6000000 + temp2 + (temp1 << 0xB));
|
||||
case 6:
|
||||
return (void *)0x6000000;
|
||||
default:
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void *G2S_GetBG2ScrPtr(){
|
||||
u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7);
|
||||
u32 temp3 = READREG16(HW_REG_BG2CNT_B);
|
||||
u32 temp1 = ((temp3 & 0x1F00) >> 0x8);
|
||||
switch (temp12)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
return (void *)(0x6200000 + (temp1 << 0xB));
|
||||
case 5:
|
||||
if (temp3 & 0x80)
|
||||
return (void *)(0x6200000 + (temp1 << 0xE));
|
||||
else
|
||||
return (void *)(0x6200000 + (temp1 << 0xB));
|
||||
case 6:
|
||||
return NULL;
|
||||
default:
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void *G2_GetBG3ScrPtr(){
|
||||
u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7);
|
||||
u32 temp3 = READREG16(HW_REG_BG3CNT_A);
|
||||
u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10);
|
||||
u32 temp1 = ((temp3 & 0x1F00) >> 0x8);
|
||||
switch (temp12)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
return (void *)(0x6000000 + temp2 + (temp1 << 0xB));
|
||||
case 3:
|
||||
case 4:
|
||||
case 5:
|
||||
if (temp3 & 0x80)
|
||||
return (void *)(0x6000000 + (temp1 << 0xE));
|
||||
else
|
||||
return (void *)(0x6000000 + temp2 + (temp1 << 0xB));
|
||||
case 6:
|
||||
return NULL;
|
||||
default:
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void *G2S_GetBG3ScrPtr(){
|
||||
u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7);
|
||||
u32 temp3 = READREG16(HW_REG_BG3CNT_B);
|
||||
u32 temp1 = ((temp3 & 0x1F00) >> 0x8);
|
||||
switch (temp12)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
return (void *)(0x6200000 + (temp1 << 0xB));
|
||||
case 3:
|
||||
case 4:
|
||||
case 5:
|
||||
if (temp3 & 0x80)
|
||||
return (void *)(0x6200000 + (temp1 << 0xE));
|
||||
else
|
||||
return (void *)(0x6200000 + (temp1 << 0xB));
|
||||
case 6:
|
||||
return NULL;
|
||||
default:
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void *G2_GetBG0CharPtr(){
|
||||
u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x3C) >> 0x2) << 0xE);
|
||||
return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp);
|
||||
}
|
||||
|
||||
void *G2S_GetBG0CharPtr(){
|
||||
return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x3C) >> 0x2) << 0xE));
|
||||
}
|
||||
|
||||
void *G2_GetBG1CharPtr(){
|
||||
u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x3C) >> 0x2) << 0xE);
|
||||
return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp);
|
||||
}
|
||||
|
||||
void *G2S_GetBG1CharPtr(){
|
||||
return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x3C) >> 0x2) << 0xE));
|
||||
}
|
||||
|
||||
void *G2_GetBG2CharPtr(){
|
||||
s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7);
|
||||
u32 temp = READREG16(HW_REG_BG2CNT_A);
|
||||
if (temp1 < 5 || !(temp & 0x80))
|
||||
{
|
||||
u32 temp1 = (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10);
|
||||
u32 temp2 = (temp & 0x3C) >> 2;
|
||||
return (void *)(0x6000000 + temp1 + (temp2 << 0xE));
|
||||
}
|
||||
else
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void *G2S_GetBG2CharPtr(){
|
||||
s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7);
|
||||
u32 temp = READREG16(HW_REG_BG2CNT_B);
|
||||
if (temp1 < 5 || !(temp & 0x80))
|
||||
{
|
||||
u32 temp2 = ((temp & 0x3C) >> 2) << 0xE;
|
||||
return (void *)(0x6200000 + temp2);
|
||||
}
|
||||
else
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void *G2_GetBG3CharPtr(){
|
||||
s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7);
|
||||
u32 temp = READREG16(HW_REG_BG3CNT_A);
|
||||
if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80)))
|
||||
{
|
||||
u32 temp1 = (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10);
|
||||
u32 temp2 = (temp & 0x3C) >> 2;
|
||||
return (void *)(0x6000000 + temp1 + (temp2 << 0xE));
|
||||
}
|
||||
else
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void *G2S_GetBG3CharPtr(){
|
||||
s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7);
|
||||
u32 temp = READREG16(HW_REG_BG3CNT_B);
|
||||
if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80)))
|
||||
{
|
||||
u32 temp2 = ((temp & 0x3C) >> 2) << 0xE;
|
||||
return (void *)(0x6200000 + temp2);
|
||||
}
|
||||
else
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user