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LoadFragment 2 OK (#2)
* load_fragment2 * dma.h * og DoRelocation * comment format * A few more docs * symbol * remove _ from loadfragment2 * ptrdiff_t * z_std_dma.h * Format * load.h -> loadfragment.h * laodframgnet2 file optflags * Small notes * Per directory O2
This commit is contained in:
@@ -142,7 +142,7 @@ AS_DEFINES := -DMIPSEB -D_LANGUAGE_ASSEMBLY -D_ULTRA64
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C_DEFINES := -DLANGUAGE_C -D_LANGUAGE_C
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ENDIAN := -EB
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OPTFLAGS := -O2
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OPTFLAGS := -O2 -g3
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MIPS_VERSION := -mips2
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ICONV_FLAGS := --from-code=UTF-8 --to-code=EUC-JP
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@@ -188,6 +188,7 @@ $(shell mkdir -p $(BUILD_DIR)/linker_scripts/$(VERSION) $(BUILD_DIR)/linker_scri
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# directory flags
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build/src/boot/O2/%.o: OPTFLAGS := -O2
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# per-file flags
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@@ -0,0 +1,38 @@
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#ifndef LOADFRAGMENT_H
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#define LOADFRAGMENT_H
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#include "ultra64.h"
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extern s32 gOverlayLogSeverity;
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#define RELOC_SECTION(reloc) ((reloc) >> 30)
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#define RELOC_OFFSET(reloc) ((reloc) & 0xFFFFFF)
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#define RELOC_TYPE_MASK(reloc) ((reloc) & 0x3F000000)
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#define RELOC_TYPE_SHIFT 24
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/* MIPS Relocation Types, matches the MIPS ELF spec */
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#define R_MIPS_32 2
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#define R_MIPS_26 4
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#define R_MIPS_HI16 5
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#define R_MIPS_LO16 6
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typedef enum {
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/* 0 */ RELOC_SECTION_NULL,
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/* 1 */ RELOC_SECTION_TEXT,
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/* 2 */ RELOC_SECTION_DATA,
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/* 3 */ RELOC_SECTION_RODATA,
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/* 4 */ RELOC_SECTION_MAX
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} RelocSectionId;
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typedef struct OverlayRelocationSection {
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/* 0x00 */ u32 textSize;
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/* 0x04 */ u32 dataSize;
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/* 0x08 */ u32 rodataSize;
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/* 0x0C */ u32 bssSize;
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/* 0x10 */ u32 nRelocations;
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/* 0x14 */ u32 relocations[1]; // size is nRelocations
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} OverlayRelocationSection; // size >= 0x18
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s32 Overlay_Load(void *vromStart, void *vromEnd, void *ovlStart, void *ovlEnd, void *vramStart, void *vramEnd, void *allocatedRamAddr, OverlayRelocationSection *ovlRelocs);
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#endif
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+1
-1
@@ -23,7 +23,7 @@ extern DmaEntry gDmaDataTable[];
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// void func_80026828_jp();
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// void func_800269E4_jp();
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// void func_80026A64_jp();
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// void func_80026B44_jp();
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void DmaMgr_RequestSync(void* ram, void* vrom, size_t size);
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// void func_80026BC0_jp();
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// void func_80026C00_jp();
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// void func_80026C28_jp();
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@@ -27,7 +27,7 @@ func_80026814_jp = 0x80026814; // type:func
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func_80026828_jp = 0x80026828; // type:func
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func_800269E4_jp = 0x800269E4; // type:func
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func_80026A64_jp = 0x80026A64; // type:func
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func_80026B44_jp = 0x80026B44; // type:func
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DmaMgr_RequestSync = 0x80026B44; // type:func
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func_80026BC0_jp = 0x80026BC0; // type:func
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func_80026C00_jp = 0x80026C00; // type:func
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func_80026C28_jp = 0x80026C28; // type:func
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@@ -153,7 +153,7 @@ gfxprint_printf = 0x8002B770; // type:func
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MtxConv_F2L = 0x8002B7A0; // type:func
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MtxConv_L2F = 0x8002B8E8; // type:func
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func_8002B910_jp = 0x8002B910; // type:func
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Overlay_Load = 0x8002B910; // type:func
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DoRelocation = 0x8002B9C0; // type:func
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_dbg_hungup = 0x8002BC00; // type:func
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@@ -279,6 +279,8 @@ D_8003BC50_jp = 0x8003BC50; //
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D_8003BC90_jp = 0x8003BC90; //
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D_8003BC94_jp = 0x8003BC94; //
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gOverlayLogSeverity = 0x8003BCA0 // type:s32 size:0x4
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gfxprint_moji_tlut = 0x8003BCB0; // type:u8 size:0x80
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gfxprint_rainbow_tlut = 0x8003BD30; // type:u8 size:0x20
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gfxprint_rainbow_txtr = 0x8003BD50; // type:u8 size:0x8
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@@ -0,0 +1,182 @@
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/**
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* @file loadfragment2.c
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*
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* Functions used to process and relocate dynamically loadable code segments (overlays).
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*
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* @note:
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* These are for specific fragment overlays with the .ovl file extension
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*/
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#include "global.h"
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#include "loadfragment.h"
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#include "z_std_dma.h"
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void DoRelocation(void* allocatedRamAddr, OverlayRelocationSection* ovlRelocs, void* vramStart);
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// Unknown original name
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s32 Overlay_Load(void* vromStart, void* vromEnd, void* ovlStart, void* ovlEnd, void* vramStart, void* vramEnd,
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void* allocatedRamAddr, OverlayRelocationSection* ovlRelocs) {
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OverlayRelocationSection* ovl = ovlRelocs;
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s32 vromSize = (uintptr_t)vromEnd - (uintptr_t)vromStart;
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s32 ovlSize = (uintptr_t)ovlEnd - (uintptr_t)ovlStart;
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s32 vramSize = (uintptr_t)vramEnd - (uintptr_t)vramStart;
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void* end = (void*)((uintptr_t)allocatedRamAddr + vromSize);
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DmaMgr_RequestSync(allocatedRamAddr, vromStart, vromSize);
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DmaMgr_RequestSync(ovl, ovlStart, ovlSize);
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DoRelocation(allocatedRamAddr, ovl, vramStart);
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if (ovl->bssSize != 0) {
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bzero(end, ovl->bssSize);
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}
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osWritebackDCache(allocatedRamAddr, vramSize);
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osInvalICache(allocatedRamAddr, vramSize);
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return vramSize;
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}
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// Extract MIPS register rs from an instruction word
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#define MIPS_REG_RS(insn) (((insn) >> 0x15) & 0x1F)
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// Extract MIPS register rt from an instruction word
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#define MIPS_REG_RT(insn) (((insn) >> 0x10) & 0x1F)
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// Extract MIPS jump target from an instruction word
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#define MIPS_JUMP_TARGET(insn) (((insn)&0x03FFFFFF) << 2)
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/**
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* Performs runtime relocation of overlay files, loadable code segments.
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*
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* Overlays are expected to be loadable anywhere in direct-mapped cached (KSEG0) memory, with some appropriate
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* alignment requirements; memory addresses in such code must be updated once loaded in order to execute properly.
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* When compiled, overlays are given 'fake' KSEG0 RAM addresses larger than the total possible available main memory
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* (>= 0x80800000), such addresses are referred to as Virtual RAM (VRAM) to distinguish them. When loading the overlay
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* the relocation table produced at compile time is consulted to determine where and how to update these VRAM addresses
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* to correct RAM addresses based on the location the overlay was loaded at, enabling the code to execute at this
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* address as if it were compiled to run at this address.
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*
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* Each relocation is represented by a packed 32-bit value, formatted in the following way:
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* - [31:30] 2-bit section id, taking values from the `RelocSectionId` enum.
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* - [29:24] 6-bit relocation type describing which relocation operation should be performed. Same as ELF32 MIPS.
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* - [23: 0] 24-bit section-relative offset indicating where in the section to apply this relocation.
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*
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* @param allocatedRamAddr Memory address the binary was loaded at.
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* @param ovlRelocs Overlay relocation section containing overlay section layout and runtime relocations.
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* @param vramStart Virtual RAM address that the overlay was compiled at.
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*/
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void DoRelocation(void* allocatedRamAddr, OverlayRelocationSection* ovlRelocs, void* vramStart) {
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uintptr_t sections[RELOC_SECTION_MAX];
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u32* relocDataP;
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u32 reloc;
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u32 relocData;
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u32 isLoNeg;
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uintptr_t allocu32 = (uintptr_t)allocatedRamAddr;
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u32 i;
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u32* regValP;
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//! MIPS ELF relocation does not generally require tracking register values, so at first glance it appears this
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//! register tracking was an unnecessary complication. However there is a bug in the IDO compiler that can cause
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//! relocations to be emitted in the wrong order under rare circumstances when the compiler attempts to reuse a
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//! previous HI16 relocation for a different LO16 relocation as an optimization. This register tracking is likely
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//! a workaround to prevent improper matching of unrelated HI16 and LO16 relocations that would otherwise arise
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//! due to the incorrect ordering.
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u32* luiRefs[32];
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u32 luiVals[32];
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u32* luiInstRef;
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UNUSED u32 dbg;
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ptrdiff_t relocOffset = 0;
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u32 relocatedValue = 0;
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UNUSED uintptr_t unrelocatedAddress = 0;
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uintptr_t relocatedAddress = 0;
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UNUSED s32 pad;
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if (gOverlayLogSeverity >= 3) {}
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sections[RELOC_SECTION_NULL] = 0;
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sections[RELOC_SECTION_TEXT] = allocu32;
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sections[RELOC_SECTION_DATA] = ovlRelocs->textSize + allocu32;
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sections[RELOC_SECTION_RODATA] = ovlRelocs->dataSize + sections[RELOC_SECTION_DATA];
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for (i = 0; i < ovlRelocs->nRelocations; i++) {
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reloc = ovlRelocs->relocations[i];
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// This will always resolve to a 32-bit aligned address as each section
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// containing code or pointers must be aligned to at least 4 bytes and the
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// MIPS ABI defines the offset of both 16-bit and 32-bit relocations to be
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// the start of the 32-bit word containing the target.
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relocDataP = (u32*)(sections[RELOC_SECTION(reloc)] + RELOC_OFFSET(reloc));
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relocData = *relocDataP;
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switch (RELOC_TYPE_MASK(reloc)) {
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case R_MIPS_32 << RELOC_TYPE_SHIFT:
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// Handles 32-bit address relocation, used for things such as jump tables and pointers in data.
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// Just relocate the full address.
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// Check address is valid for relocation
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if ((*relocDataP & 0x0F000000) == 0) {
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relocOffset = *relocDataP - (uintptr_t)vramStart;
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relocatedValue = relocOffset + allocu32;
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unrelocatedAddress = relocData;
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relocatedAddress = relocatedValue;
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*relocDataP = relocatedAddress;
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}
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break;
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case R_MIPS_26 << RELOC_TYPE_SHIFT:
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// Handles 26-bit address relocation, used for jumps and jals.
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// Extract the address from the target field of the J-type MIPS instruction.
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// Relocate the address and update the instruction.
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if (1) {
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relocOffset = PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP)) - (uintptr_t)vramStart;
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unrelocatedAddress = PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP));
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relocatedValue = (*relocDataP & 0xFC000000) | (((allocu32 + relocOffset) & 0x0FFFFFFF) >> 2);
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relocatedAddress = PHYS_TO_K0(MIPS_JUMP_TARGET(relocatedValue));
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*relocDataP = relocatedValue;
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}
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break;
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case R_MIPS_HI16 << RELOC_TYPE_SHIFT:
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// Handles relocation for a hi/lo pair, part 1.
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// Store the reference to the LUI instruction (hi) using the `rt` register of the instruction.
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// This will be updated later in the `R_MIPS_LO16` section.
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luiRefs[MIPS_REG_RT(*relocDataP)] = relocDataP;
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luiVals[MIPS_REG_RT(*relocDataP)] = *relocDataP;
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break;
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case R_MIPS_LO16 << RELOC_TYPE_SHIFT:
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// Handles relocation for a hi/lo pair, part 2.
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// Grab the stored LUI (hi) from the `R_MIPS_HI16` section using the `rs` register of the instruction.
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// The full address is calculated, relocated, and then used to update both the LUI and lo instructions.
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// If the lo part is negative, add 1 to the LUI value.
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// Note: The lo instruction is assumed to have a signed immediate.
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luiInstRef = luiRefs[MIPS_REG_RS(*relocDataP)];
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regValP = &luiVals[MIPS_REG_RS(*relocDataP)];
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// Check address is valid for relocation
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if ((((*regValP << 0x10) + (s16)*relocDataP) & 0x0F000000) == 0) {
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relocOffset = ((*regValP << 0x10) + (s16)*relocDataP) - (uintptr_t)vramStart;
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isLoNeg = ((relocOffset + allocu32) & 0x8000) ? 1 : 0; // adjust for signed immediate
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unrelocatedAddress = (*luiInstRef << 0x10) + (s16)relocData;
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*luiInstRef =
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(*luiInstRef & 0xFFFF0000) | ((((relocOffset + allocu32) >> 0x10) & 0xFFFF) + isLoNeg);
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relocatedValue = (*relocDataP & 0xFFFF0000) | ((relocOffset + allocu32) & 0xFFFF);
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relocatedAddress = (*luiInstRef << 0x10) + (s16)relocatedValue;
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*relocDataP = relocatedValue;
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}
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break;
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}
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dbg = 16;
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switch (RELOC_TYPE_MASK(reloc)) {
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case R_MIPS_32 << RELOC_TYPE_SHIFT:
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dbg += 6;
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FALLTHROUGH;
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case R_MIPS_26 << RELOC_TYPE_SHIFT:
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dbg += 10;
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FALLTHROUGH;
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case R_MIPS_LO16 << RELOC_TYPE_SHIFT:
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if (gOverlayLogSeverity >= 3) {}
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// Adding a break prevents matching
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}
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}
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}
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@@ -0,0 +1,3 @@
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#include "global.h"
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s32 gOverlayLogSeverity = 2;
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+2
-1
@@ -20,7 +20,7 @@
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- [0x005BE0, asm, boot/stackcheck]
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- [0x005E30, asm, boot/gfxprint]
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- [0x006BA0, asm, boot/mtxuty-cvt]
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- [0x006D10, asm, boot/006D10]
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- [0x006D10, c, boot/O2/loadfragment2]
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- [0x007000, asm, boot/debug]
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- [0x007060, asm, boot/007060]
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- [0x0073A0, asm, boot/0073A0]
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@@ -202,6 +202,7 @@
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- [0x016EF0, data, libultra/rsp/rspboot]
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- [0x016FC0, data, boot/016FC0]
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- [0x0170A0, .data, boot/logseverity]
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- [0x0170B0, data, boot/gfxprint]
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- [0x017960, data, boot/017960] # boot/007060 starts around here, but no idea where it ends
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