chore(decomp): commit in-tree banked work before the next gate

Uncommitted src/ changes found at gate entry. These are banked functions from a lane that gates with commit=False, not residue — preserved, not reverted. Top-level src/*.c (main TUs) are excluded by construction (S59).
This commit is contained in:
Drew T
2026-08-24 22:51:46 -06:00
parent 65ef0ebae6
commit 5a80e15f91
12 changed files with 320 additions and 12 deletions
+17 -1
View File
@@ -281,7 +281,23 @@ void func_801EDED4(s32 param_1, s16 *param_2) {
}
INCLUDE_ASM("asm/md_SC05_024/nonmatchings/md_SC05_024", func_801EE0CC);
u8 func_801EE0CC(a0)
u32 a0;
{
if ((u32)(a0 - 0x460) < 0x32) {
return 0x89;
}
if ((u32)(a0 - 0x384) < 0x6E) {
return 0x65;
}
if ((u32)(a0 - 0x64) < 0x1E) {
return 0x28;
}
return 0xE;
}
+17 -1
View File
@@ -280,7 +280,23 @@ void func_801EDED4(s32 param_1, s16 *param_2) {
}
INCLUDE_ASM("asm/md_SC05_025/nonmatchings/md_SC05_025", func_801EE0CC);
u8 func_801EE0CC(a0)
u32 a0;
{
if ((u32)(a0 - 0x460) < 0x32) {
return 0x89;
}
if ((u32)(a0 - 0x384) < 0x6E) {
return 0x65;
}
if ((u32)(a0 - 0x64) < 0x1E) {
return 0x28;
}
return 0xE;
}
+17 -1
View File
@@ -852,7 +852,23 @@ void func_801F04DC(s32 param_1, s16 *param_2) {
}
INCLUDE_ASM("asm/md_SC05_026/nonmatchings/md_SC05_026", func_801F06D4);
u8 func_801F06D4(a0)
u32 a0;
{
if ((u32)(a0 - 0x460) < 0x32) {
return 0x89;
}
if ((u32)(a0 - 0x384) < 0x6E) {
return 0x65;
}
if ((u32)(a0 - 0x64) < 0x1E) {
return 0x28;
}
return 0x16;
}
+17 -1
View File
@@ -226,7 +226,23 @@ void func_801EDEE8(s32 param_1, s16 *param_2) {
}
INCLUDE_ASM("asm/md_SC05_027/nonmatchings/md_SC05_027", func_801EE080);
u8 func_801EE080(a0)
u32 a0;
{
if ((u32)(a0 - 0x460) < 0x32) {
return 0x89;
}
if ((u32)(a0 - 0x384) < 0x6E) {
return 0x65;
}
if ((u32)(a0 - 0x64) < 0x1E) {
return 0x28;
}
return 0xD;
}
INCLUDE_ASM("asm/md_SC05_027/nonmatchings/md_SC05_027", func_801EE0C0);
+17 -1
View File
@@ -285,7 +285,23 @@ void func_801EDED4(s32 param_1, s16 *param_2) {
}
INCLUDE_ASM("asm/md_SC05_028/nonmatchings/md_SC05_028", func_801EE0CC);
u8 func_801EE0CC(a0)
u32 a0;
{
if ((u32)(a0 - 0x460) < 0x32) {
return 0x89;
}
if ((u32)(a0 - 0x384) < 0x6E) {
return 0x65;
}
if ((u32)(a0 - 0x64) < 0x1E) {
return 0x28;
}
return 0x17;
}
+17 -1
View File
@@ -281,7 +281,23 @@ void func_801EDED4(s32 param_1, s16 *param_2) {
}
INCLUDE_ASM("asm/md_SC05_029/nonmatchings/md_SC05_029", func_801EE0CC);
u8 func_801EE0CC(a0)
u32 a0;
{
if ((u32)(a0 - 0x460) < 0x32) {
return 0x89;
}
if ((u32)(a0 - 0x384) < 0x6E) {
return 0x65;
}
if ((u32)(a0 - 0x64) < 0x1E) {
return 0x28;
}
return 0x29;
}
void func_801EE10C(void) {
}
+34 -1
View File
@@ -5151,7 +5151,40 @@ s32 func_801810F4(void) {
}
INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_jr_8017A4AC", func_801810FC);
extern s32 func_8004787C(s32 a0);
extern s32 func_80047948(s32 a0);
extern s32 func_80133784(s32 a0, void *a1, s32 a2);
s32 func_801810FC(param_1, param_2)
s32 param_1;
s32 param_2;
{
int iVar1;
unsigned int uVar2;
int iVar3;
SVECTOR sv1;
SVECTOR sv2;
sv1.vx = *(short *)(param_1 + 6);
sv1.vy = *(short *)(param_1 + 0xa) + -0x20;
sv1.vz = *(short *)(param_1 + 0xe);
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
iVar3 = (short)param_2;
sv2.vy = sv1.vy;
sv2.vx = sv1.vx - (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
sv2.vz = sv1.vz - (short)(iVar1 * iVar3 >> 0xc);
uVar2 = ((int (*)(int, SVECTOR *, SVECTOR *))func_80133784)(1, &sv1, &sv2);
if ((uVar2 & 0x8000) != 0) {
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 6) = sv2.vx + (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 0xe) = sv2.vz + (short)(iVar1 * iVar3 >> 0xc);
return 1;
}
return 0;
}
/* TU declares func_80181234 as void(void) (S35 self-axis) but the asm takes
+34 -1
View File
@@ -4077,7 +4077,40 @@ void func_8017E6D8(int a, s16 *b, SVECTOR_8017E6D8 *c, SVECTOR_8017E6D8 *d,
}
INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_8017EA54);
extern s32 func_8004787C(s32 a0);
extern s32 func_80047948(s32 a0);
extern s32 func_80133784(s32 a0, void *a1, s32 a2);
s32 func_8017EA54(param_1, param_2)
s32 param_1;
s32 param_2;
{
int iVar1;
unsigned int uVar2;
int iVar3;
SVECTOR sv1;
SVECTOR sv2;
sv1.vx = *(short *)(param_1 + 6);
sv1.vy = *(short *)(param_1 + 0xa) + -0x20;
sv1.vz = *(short *)(param_1 + 0xe);
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
iVar3 = (short)param_2;
sv2.vy = sv1.vy;
sv2.vx = sv1.vx - (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
sv2.vz = sv1.vz - (short)(iVar1 * iVar3 >> 0xc);
uVar2 = ((int (*)(int, SVECTOR *, SVECTOR *))func_80133784)(1, &sv1, &sv2);
if ((uVar2 & 0x8000) != 0) {
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 6) = sv2.vx + (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 0xe) = sv2.vz + (short)(iVar1 * iVar3 >> 0xc);
return 1;
}
return 0;
}
/* TU declares func_8017EB8C as void(void) (S35 self-axis) but the asm takes
+34 -1
View File
@@ -6982,7 +6982,40 @@ extern void func_8012B370(int a0);
}
INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_8018B8B0);
extern s32 func_8004787C(s32 a0);
extern s32 func_80047948(s32 a0);
extern s32 func_80133784(s32 a0, void *a1, s32 a2);
s32 func_8018B8B0(param_1, param_2)
s32 param_1;
s32 param_2;
{
int iVar1;
unsigned int uVar2;
int iVar3;
SVECTOR sv1;
SVECTOR sv2;
sv1.vx = *(short *)(param_1 + 6);
sv1.vy = *(short *)(param_1 + 0xa) + -0x20;
sv1.vz = *(short *)(param_1 + 0xe);
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
iVar3 = (short)param_2;
sv2.vy = sv1.vy;
sv2.vx = sv1.vx - (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
sv2.vz = sv1.vz - (short)(iVar1 * iVar3 >> 0xc);
uVar2 = ((int (*)(int, SVECTOR *, SVECTOR *))func_80133784)(1, &sv1, &sv2);
if ((uVar2 & 0x8000) != 0) {
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 6) = sv2.vx + (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 0xe) = sv2.vz + (short)(iVar1 * iVar3 >> 0xc);
return 1;
}
return 0;
}
/* TU declares func_8018B9E8 as void(void) (S35 self-axis) but the asm takes
+34 -1
View File
@@ -7220,7 +7220,40 @@ extern void func_8012B370(int a0);
}
INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_80186F00", func_8018DD88);
extern s32 func_8004787C(s32 a0);
extern s32 func_80047948(s32 a0);
extern s32 func_80133784(s32 a0, void *a1, s32 a2);
s32 func_8018DD88(param_1, param_2)
s32 param_1;
s32 param_2;
{
int iVar1;
unsigned int uVar2;
int iVar3;
SVECTOR sv1;
SVECTOR sv2;
sv1.vx = *(short *)(param_1 + 6);
sv1.vy = *(short *)(param_1 + 0xa) + -0x20;
sv1.vz = *(short *)(param_1 + 0xe);
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
iVar3 = (short)param_2;
sv2.vy = sv1.vy;
sv2.vx = sv1.vx - (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
sv2.vz = sv1.vz - (short)(iVar1 * iVar3 >> 0xc);
uVar2 = ((int (*)(int, SVECTOR *, SVECTOR *))func_80133784)(1, &sv1, &sv2);
if ((uVar2 & 0x8000) != 0) {
iVar1 = func_8004787C(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 6) = sv2.vx + (short)(iVar1 * iVar3 >> 0xc);
iVar1 = func_80047948(*(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) & 0xfff);
*(short *)(param_1 + 0xe) = sv2.vz + (short)(iVar1 * iVar3 >> 0xc);
return 1;
}
return 0;
}
/* TU declares func_8018DEC0 as void(void) (S35 self-axis) but the asm takes
+61 -1
View File
@@ -8587,7 +8587,67 @@ void func_8018C5CC(void *a0) {
}
INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_80182890", func_8018C608);
extern s32 D_801CA8F0;
extern void func_8012B14C(s32 a0, s32 a1);
extern void func_8012B23C();
extern void func_8012B2CC(s32 a0);
extern void func_8012C218(void *a0);
extern void func_8012CBCC(s32 a0);
extern void func_8012F214(s32 a0, s32 a1, s32 a2);
void func_8018C608(a0)
s32 a0;
{
SV4 in;
SV4 out;
s16 v1;
u16 uStack_c;
if (*(u16 *)(a0 + 0x34) == 0) {
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =
*(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12);
func_8012B2CC(a0);
func_8012B23C(a0);
func_8012B14C(a0, *(s16 *)(a0 + 0x70) * 12 + (s32)&D_801CA8F0);
in.a = 0;
in.b = 0;
in.c = 0x10;
func_8012F214(a0, (s32)&in, (s32)&out);
*(u16 *)(a0 + 6) = out.a;
*(u16 *)(a0 + 0xa) = out.b;
uStack_c = out.c;
*(s32 *)(a0 + 0x1c) = 0x5a;
*(u16 *)(a0 + 0x34) = 1;
*(u16 *)(a0 + 0xe) = uStack_c;
}
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x10) += -0x80;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += 4;
*(u16 *)(*(s32 *)(a0 + 0x20) + 0x14) += *(u16 *)(a0 + 0xfc);
*(s32 *)(a0 + 0xdc) = *(s32 *)(a0 + 0x14);
if ((((s32 (*)(s32))func_8012CBCC)(a0)) & 0x6000) {
register s32 negdc __asm__("$2");
negdc = -*(s32 *)(a0 + 0xdc);
v1 = *(u16 *)(a0 + 0xac);
v1 -= 1;
*(s16 *)(a0 + 0xac) = v1;
*(s32 *)(a0 + 0x14) = negdc;
if (v1 == 0) {
func_8012C218((void *)a0);
}
}
{
s32 iVar3 = *(s32 *)(a0 + 0x1c) - 1;
*(s32 *)(a0 + 0x1c) = iVar3;
if (iVar3 == 0) {
func_8012C218((void *)a0);
}
}
}
extern void (*D_801CA908[])(void);
+21 -1
View File
@@ -4106,7 +4106,27 @@ void func_8017D86C(void *a0) {
}
INCLUDE_ASM("asm/ov_SC07_007/nonmatchings/ov_SC07_007_jr_8017BEBC", func_8017D8E0);
extern Blk8 D_801274F0;
extern void func_8017DAE8(void *a0, void *a1);
extern void func_8017DC20(void *a0, void *a1, void *a2);
extern void func_8017DF04();
void func_8017D8E0(a0)
s32 a0;
{
s32 pad[2];
Blk8 local_18;
local_18 = D_801274F0;
((void (*)(s32, Blk8 *))func_8017DAE8)(a0, &local_18);
D_801274F0 = local_18;
((void (*)(s32))func_8017DF04)(a0);
((void (*)(s32, void *, void *))func_8017DC20)(a0, (void *)((u8 *)&D_801274F0 - 8), (void *)&D_801274F0);
}
#include "common.h"