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https://github.com/Druthulu/BFM-decomp
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phase-36: S104 s104_d10 — func_8017EF88 banked at 0 through the whole-object gate + propagated — 3 pins + 2 keepalives + a do-while + a dead pad → 0: register unions {struct{s16 x,y;}v; s32 sxy;} — the field insert makes flow mark them live from entry (global.c:640-660)
This commit is contained in:
Drew T
@@ -0,0 +1,35 @@
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u32 func_8017EF88(s16 *param_1, s16 *param_2, s16 *param_3) {
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union {
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struct {
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s16 x, y;
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} v;
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s32 sxy;
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} a, b, c;
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s16 ax, ay, bx, by, cx, cy;
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ax = param_1[0];
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cx = param_3[0];
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if (cx < ax) {
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return 0;
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}
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bx = param_2[0];
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if (bx < cx) {
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return 1;
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}
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by = param_2[1];
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cy = param_3[2];
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if (cy < by) {
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return 0;
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}
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ay = param_1[1];
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if (ay >= cy) {
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a.v.x = ax;
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a.v.y = ay;
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b.v.x = bx;
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b.v.y = by;
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c.v.x = cx;
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c.v.y = cy;
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return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;
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}
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return 1;
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}
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@@ -0,0 +1,35 @@
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u32 func_8017EF88(s16 *param_1, s16 *param_2, s16 *param_3) {
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s16 ax, ay, bx, by, cx, cy;
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s32 la;
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s32 lb;
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s32 lc;
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u32 r;
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s32 pad[2];
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ax = param_1[0];
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cx = param_3[0];
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if (cx < ax) {
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return 0;
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}
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bx = param_2[0];
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if (bx < cx) {
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return 1;
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}
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by = param_2[1];
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do {
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cy = param_3[2];
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if (cy < by) {
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return 0;
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}
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ay = param_1[1];
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if (ay >= cy) {
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la = (u16)ax;
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lb = (u16)bx;
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lc = (u16)cx;
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r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),
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lc | ((u16)cy << 16));
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return ~r >> 31;
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}
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return 1;
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} while (0);
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}
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@@ -0,0 +1,37 @@
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u32 func_8017EF88(s16 *param_1, s16 *param_2, s16 *param_3) {
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s16 ax, ay, bx, by, cx, cy;
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register s32 la __asm__("$8"); // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B tus8)
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register s32 lb __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus8)
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register s32 lc __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus8)
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u32 r;
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s32 pad[2];
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ax = param_1[0];
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cx = param_3[0];
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if (cx < ax) {
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return 0;
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}
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__asm__ __volatile__("" : : "r"(la), "r"(lb), "r"(lc)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus8)
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bx = param_2[0];
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if (bx < cx) {
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return 1;
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}
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by = param_2[1];
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do {
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cy = param_3[2];
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if (cy < by) {
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return 0;
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}
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ay = param_1[1];
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if (ay >= cy) {
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la = (u16)ax;
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lb = (u16)bx;
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lc = (u16)cx;
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__asm__ __volatile__("" : : "r"(ax), "r"(bx), "r"(cx)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus8)
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r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),
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lc | ((u16)cy << 16));
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return ~r >> 31;
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}
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return 1;
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} while (0);
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}
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@@ -0,0 +1,14 @@
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g6b: verdict NO-MATCH start 14 best 12 compiles 320 path R9 swap-stmts @4369
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best-scoring single candidates of the last trace (move -> score [residual class]):
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R9 swap-stmts @4369 -> 12 [REG] (from 14)
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R10 param-copy param_1 @4351 -> 12 [REG] (from 12)
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R7 block @4367 -> 12 [REG] (from 12)
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R9 swap-stmts @4352 -> 12 [REG] (from 12)
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R2 decl-order 0,2,1 -> 12 [REG] (from 12)
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R4 decl-move la 0->3 -> 12 [REG] (from 12)
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R10 param-copy param_2 @4351 -> 12 [REG] (from 12)
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R7 do-while @4367 -> 12 [REG] (from 12)
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R2 decl-order 1,0,2 -> 12 [REG] (from 12)
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R4 decl-move la 0->4 -> 12 [REG] (from 12)
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R10 param-copy param_3 @4351 -> 12 [REG] (from 12)
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R7 block @4352 -> 12 [REG] (from 12)
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@@ -0,0 +1,82 @@
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# func_8017EF88 (src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c) — d10, P36 S104
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**RESULT: score 0 in plain C, zero levers** (before: 3 pins `$8/$7/$3` + 2 keepalives + `do { } while (0)` + dead
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`s32 pad[2]`; after: none of them). The sibling **func_8017F040 (same TU) closes by the same move at score 0**
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(`scratch/f040_body.c`). Both verified with `tools/delever_search.py --try … --body`.
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## (a) The residual
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REG only, 46 = 46 instructions. Target: the three packed arguments sit in `$t0/$a3/$v1` (arg0/arg1/arg2) and EVERY
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other global — the cx load temp, the ax/bx/cx/cy s16 copies — avoids those three registers (`$t1..$t4`). The free
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body gave the packs `$v0/$v1/$a3` (local-alloc, block 8 only) and let the globals use `$v1/$a3/$t0`. The frame
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(vars=56) matched only because of the dead `pad[2]`.
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## (b) Mechanism (proved on bytes and in the dumps, `scratch/dumps_win/`)
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The original builds each NCLIP argument as a **register union** (`union { struct { s16 x, y; } v; s32 sxy; }`)
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by storing its two fields, then passes the word.
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1. A 4-byte union with an `s32` member has SImode, so it lives in a pseudo. A field store into a REG goes through
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`store_bit_field`; MIPS `insv` FAILs for a non-MEM operand (`config/mips/mips.md:2901-2921`), so
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`store_fixed_bit_field` emits read-modify-write `u = (u & mask) | value` (`expmed.c:689-697` and, ior below it).
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2. The first field store READS the uninitialised union, so flow marks all three union pseudos live at the
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function entry and at the start of every block down to the call (`.flow`: "Registers live at start: 4 5 6 29 30
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75 76 77", blocks 0 through 8).
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3. combine folds each insert pair into `andi`/`sll`/`or`, so the read vanishes from the insns. But global.c seeds
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each block's conflict scan from flow's **pre-combine** `basic_block_live_at_start` (`global.c:640-660`), so the
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three unions still conflict with every pseudo in the function (`.greg`: 75/76/77 conflict with 72-85, 95).
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They are allocated as globals in priority order 77 (c) → `$v1`, 76 (b) → `$a3`, 75 (a) → `$t0`. `$v0` is
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skipped because the block-local `slt`/load temps hold it, and `$a0-$a2` because the parameters conflict. Every
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later global then skips `$v1/$a3/$t0`. That is exactly what the `$8/$7/$3` pins plus the "live from entry"
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keepalive were faking. The second keepalive (ax/bx/cx live past the masks) was faking the same conflicts.
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4. The frame: the 7th "ST_REGS or none" pseudo (flow counts it, combine eliminates it, reload gives it an 8-byte slot)
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is reg 106 = the shared `0xFFFF0000` clear mask of the three x-inserts. That is what `s32 pad[2]` was faking. The
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other six are the `ashift` halves of the s16 sign extensions (the free body had those six too, hence vars=48+8).
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## (c) The move (one line)
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Replace the three `la/lb/lc = (u16)x` masks + `x | ((u16)y << 16)` packs (and the pins, both keepalives, the
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`do/while(0)` and `pad[2]`) with three body-local unions `a, b, c` whose `.v.x/.v.y` are assigned from the s16
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locals just before the call, passing `a.sxy, b.sxy, c.sxy`. Readability extras, both byte-neutral:
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`return func_800495EC(...) >= 0;` replaces `r = …; return ~r >> 31;` (emit_store_flag gives the same `nor; srl`),
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and the `do { } while (0)` is simply dropped.
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Also verified at 0: `union { DVECTOR2 v; s32 sxy; }` with `.v.vx/.v.vy` (`DVECTOR2` is in src/shared/engine_types.h:759)
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(`scratch/dv.c`). body.c keeps the self-contained anonymous struct so the four shared copies need no header.
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## (d) Generator proposal
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When a body pins N values that are packed as `(u16)lo | (hi << 16)` (or any byte/half insert into a word) AND has a
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keepalive `__asm__("" :: "r"(v))` reading those pinned variables BEFORE they are assigned (live-from-entry), rewrite
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each packed word as a register union `{ struct { s16 lo, hi; } v; s32 w; }` (or `{ u8 b[4]; s32 w; }` for byte packs)
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whose fields are assigned where the pack was, and pass `.w`. More generally, **a keepalive on a not-yet-assigned
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variable near the entry means "live at entry" in the original. In plain C that is an aggregate kept in a register
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and built by field stores** (store_fixed_bit_field's read-modify-write of the uninitialised word).
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## (e) What did not work (bytes)
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- body_free.c: 14. Free sweep's best (free_004, swap-stmts): 12. Neither can reach 0, because no statement-order or
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width move makes a local-alloc'd mask conflict with block-0 globals.
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- Inlining the packs into the call (`(u16)ax | ((u16)ay << 16)` as arguments): 16/20 (COUNT, the order changes).
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- `u16 la/lb/lc`: 18/20. Compare-operand flips (16 permutations): 18-24 (lose 1-2 insns).
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- `y << 16` without the `(u16)` cast or `x & 0xFFFF`: 45 insns and one zombie fewer (vars=40).
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- Field-only unions (loads straight into `a.v.x`, compares on the fields, no s16 locals): 57 (56 insns).
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- An early-return tail `if (ay < cy) return 1; <pack; call>` instead of `if (ay >= cy) { …call… } return 1;`: 5
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(47 insns). The if-block tail is load-bearing (`scratch/early.c`).
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- The union WITHOUT the `s32` member (2-aligned struct only, passed as `*(s32 *)&a`): 25, vars=72 (BLKmode, so it
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lives on the stack; `scratch/bare.c`). The s32 member is what makes the aggregate a register.
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- R71 check: no lever-free same-name variant in src/ (SC05_003/SC03_029/SC05_018's func_8017EF88 are other
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functions). All copies of this text (shared headers func_8017D5F4__014cbc20.h / func_8017D6AC__703b5fd0.h,
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ov_SC03_112 / ov_SC05_005 jr_*) carry the same levers and should take the same rewrite (D5F4 = EF88's shape,
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D6AC = F040's).
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## (f) Where the method fell short / what found it
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The allocation table and residual pointed at "why do globals avoid three registers that local-alloc hands out
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later". No statement-level move could explain a block-0 temp conflicting with block-8 values. The clue was the
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FRAME. `pad[2]` was fake: the free body's vars=48 were six stale pseudos (each "ST_REGS or none", flow-counted,
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combine-eliminated) and the target needed one more. That said the original had an extra eliminated temp. Together
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with the keepalive's "live from entry" reading, that led to field stores into a register aggregate, and the first
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`--try` of that closed. Method addition: **a dead `pad[N]` lever is evidence — count the ST_REGS/no-hard-reg pseudos
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in `.lreg` (8 frame bytes each) before accepting a dead local. The missing ones name the missing construct.**
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## (g) Structs question — YES, and this is the proof case
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The lever existed only because the packed arguments were written as integer arithmetic instead of the aggregate the
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original used. The struct/union type moves the decision in flow → global (live-at-entry from the read-modify-write
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field insert, `expmed.c:689-697`, and pre-combine live sets feeding `global.c:640-660`), not the expr.c/sched
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aggregate-alias channel. The struct is a 4-byte SImode union `{ struct { s16 x, y; } v; s32 sxy; }` (PsyQ DVECTOR
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overlaid with a long, i.e. an SXY GTE register value), one per NCLIP argument. It must contain a 32-bit-aligned
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member so the aggregate is SImode (a bare `DVECTOR` is 2-aligned, BLKmode under STRICT_ALIGNMENT, and would go to the stack).
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Tested on bytes with a body-local declaration: score 0.
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@@ -0,0 +1,9 @@
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--- every @class/@stuck/@crack note in this translation unit ---
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// @class: plumbing
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// @stuck: none — signed s32 counter at 0x1C, delay-slot store is the unconditional bump
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// @class: straight-derive
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// @stuck: none — MATCH (52 ins) on iteration 1, confirmed by rtu_match.
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// @class: structural (STRENGTH/mflo!=lw -> MATCH)
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// @stuck: none - MATCH (41 ins), match_one + rtu_match.
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// @class: regalloc (WIDTH/li!=addu -> MATCH)
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// @stuck: none — MATCH (58 ins), match_one + rtu_match. PIN-FREE (no register __asm__).
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@@ -0,0 +1 @@
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=== lever-free bodies in ov_SC05_001 sharing a callee or global with func_8017EF88 (0 found; top 6 by shared symbols) — read them for the SHAPE ===
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@@ -0,0 +1,24 @@
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src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:func_8017EF88: score 14 (REG-caller; mine 46 ins, target 46) — not yet
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register pairs (mine -> target, count): t0->t1 x6, t1->t3 x2, a3->t4 x2, v1->t2 x2, v0->t0 x2, v1->a3 x2, a3->v1 x2
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replace mine[2:3] target[2:3]
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2 lh t0,0(a2) | lh t1,0(a2)
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replace mine[5:7] target[5:7]
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5 move t1,v0 | move t3,v0
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6 slt v0,t0,v0 | slt v0,t1,v0
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replace mine[8:9] target[8:9]
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8 move a3,t0 | move t4,t1
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replace mine[11:13] target[11:13]
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11 move v1,v0 | move t2,v0
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12 slt v0,v0,t0 | slt v0,v0,t1
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replace mine[21:22] target[21:22]
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21 move t0,a2 | move t1,a2
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replace mine[30:33] target[30:33]
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30 andi v0,t1,0xffff | andi t0,t3,0xffff
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31 andi v1,v1,0xffff | andi a3,t2,0xffff
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32 andi a3,a3,0xffff | andi v1,t4,0xffff
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replace mine[35:38] target[35:38]
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35 sll a2,t0,0x10 | sll a2,t1,0x10
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36 or a0,v0,a0 | or a0,t0,a0
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37 or a1,v1,a1 | or a1,a3,a1
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replace mine[39:40] target[39:40]
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39 or a2,a3,a2 | or a2,v1,a2
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@@ -0,0 +1,5 @@
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NEEDED pin $8 line 4447
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NEEDED pin $7 line 4448
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NEEDED pin $3 line 4449
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NEEDED keepalive line 4458
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NEEDED keepalive line 4474
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@@ -0,0 +1,2 @@
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src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c
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func_8017EF88
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+188
-188
@@ -1,7 +1,7 @@
|
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{
|
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"head": "910875139",
|
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"head": "30fd6796f",
|
||||
"stamp": "15956e4a96c4",
|
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"generated": "2026-09-10 21:31",
|
||||
"generated": "2026-09-10 21:43",
|
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"aliases": [
|
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"main",
|
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"ov_SC03_014",
|
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@@ -21,207 +21,207 @@
|
||||
"main": {
|
||||
"objects": 85,
|
||||
"identical": 85,
|
||||
"seconds": 12.299000000000005,
|
||||
"mean_s": 0.145
|
||||
"seconds": 23.41900000000001,
|
||||
"mean_s": 0.276
|
||||
},
|
||||
"ov_SC03_014": {
|
||||
"objects": 32,
|
||||
"identical": 32,
|
||||
"seconds": 7.845000000000001,
|
||||
"mean_s": 0.245
|
||||
"seconds": 9.349,
|
||||
"mean_s": 0.292
|
||||
},
|
||||
"ov_SC03_015": {
|
||||
"objects": 32,
|
||||
"identical": 32,
|
||||
"seconds": 7.41,
|
||||
"mean_s": 0.232
|
||||
"seconds": 9.430999999999997,
|
||||
"mean_s": 0.295
|
||||
},
|
||||
"ov_SC04_011": {
|
||||
"objects": 28,
|
||||
"identical": 28,
|
||||
"seconds": 6.604000000000001,
|
||||
"mean_s": 0.236
|
||||
"seconds": 9.080999999999998,
|
||||
"mean_s": 0.324
|
||||
}
|
||||
},
|
||||
"per_object_seconds": {
|
||||
"build/src/800.o": 1.1,
|
||||
"build/src/800_b.o": 0.151,
|
||||
"build/src/800_b_2.o": 0.452,
|
||||
"build/src/800_b_o0a.o": 0.107,
|
||||
"build/src/800_c.o": 0.351,
|
||||
"build/src/800b2.o": 0.129,
|
||||
"build/src/apicard1.o": 0.126,
|
||||
"build/src/apicard2.o": 0.152,
|
||||
"build/src/apicard3.o": 0.109,
|
||||
"build/src/apicard4.o": 0.14,
|
||||
"build/src/apicard5.o": 0.1,
|
||||
"build/src/apicard6.o": 0.128,
|
||||
"build/src/apicard7.o": 0.122,
|
||||
"build/src/boot.o": 0.159,
|
||||
"build/src/gap.o": 0.151,
|
||||
"build/src/libapi1.o": 0.115,
|
||||
"build/src/libapi2.o": 0.173,
|
||||
"build/src/libc2_1.o": 0.11,
|
||||
"build/src/libc2_2.o": 0.196,
|
||||
"build/src/libcd1.o": 0.168,
|
||||
"build/src/libcd2.o": 0.173,
|
||||
"build/src/libetc.o": 0.103,
|
||||
"build/src/libgpu.o": 0.123,
|
||||
"build/src/libgpu2.o": 0.095,
|
||||
"build/src/libgs1.o": 0.131,
|
||||
"build/src/libgs2.o": 0.133,
|
||||
"build/src/libgs3.o": 0.106,
|
||||
"build/src/libgs4.o": 0.108,
|
||||
"build/src/libgs5.o": 0.111,
|
||||
"build/src/libgs6.o": 0.144,
|
||||
"build/src/libgs7.o": 0.101,
|
||||
"build/src/libgs8.o": 0.092,
|
||||
"build/src/libgte1.o": 0.143,
|
||||
"build/src/libgte10.o": 0.11,
|
||||
"build/src/libgte11.o": 0.104,
|
||||
"build/src/libgte12.o": 0.106,
|
||||
"build/src/libgte13.o": 0.171,
|
||||
"build/src/libgte14.o": 0.155,
|
||||
"build/src/libgte15.o": 0.121,
|
||||
"build/src/libgte16.o": 0.107,
|
||||
"build/src/libgte17.o": 0.1,
|
||||
"build/src/libgte18.o": 0.093,
|
||||
"build/src/libgte19.o": 0.159,
|
||||
"build/src/libgte2.o": 0.126,
|
||||
"build/src/libgte20.o": 0.091,
|
||||
"build/src/libgte21.o": 0.119,
|
||||
"build/src/libgte22.o": 0.105,
|
||||
"build/src/libgte23.o": 0.103,
|
||||
"build/src/libgte24.o": 0.096,
|
||||
"build/src/libgte25.o": 0.134,
|
||||
"build/src/libgte26.o": 0.109,
|
||||
"build/src/libgte27.o": 0.101,
|
||||
"build/src/libgte28.o": 0.13,
|
||||
"build/src/libgte29.o": 0.102,
|
||||
"build/src/libgte3.o": 0.127,
|
||||
"build/src/libgte30.o": 0.181,
|
||||
"build/src/libgte4.o": 0.113,
|
||||
"build/src/libgte5.o": 0.162,
|
||||
"build/src/libgte6.o": 0.151,
|
||||
"build/src/libgte7.o": 0.128,
|
||||
"build/src/libgte8.o": 0.101,
|
||||
"build/src/libgte9.o": 0.118,
|
||||
"build/src/libmcrd1.o": 0.103,
|
||||
"build/src/libmcrd2.o": 0.111,
|
||||
"build/src/libpad1.o": 0.137,
|
||||
"build/src/libpad2.o": 0.134,
|
||||
"build/src/sgap.o": 0.135,
|
||||
"build/src/sgap_2.o": 0.098,
|
||||
"build/src/sgap_3.o": 0.132,
|
||||
"build/src/sgap_4.o": 0.144,
|
||||
"build/src/sgap_5.o": 0.102,
|
||||
"build/src/sgap_6.o": 0.109,
|
||||
"build/src/sgap_8.o": 0.104,
|
||||
"build/src/snd1.o": 0.099,
|
||||
"build/src/snd10.o": 0.111,
|
||||
"build/src/snd11.o": 0.11,
|
||||
"build/src/snd12.o": 0.102,
|
||||
"build/src/snd2.o": 0.199,
|
||||
"build/src/snd3.o": 0.146,
|
||||
"build/src/snd4.o": 0.124,
|
||||
"build/src/snd5.o": 0.133,
|
||||
"build/src/snd6.o": 0.181,
|
||||
"build/src/snd7.o": 0.167,
|
||||
"build/src/snd8.o": 0.179,
|
||||
"build/src/snd9.o": 0.114,
|
||||
"build/src/ov_SC03_014/ov_SC03_014.o": 0.207,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_after.o": 0.856,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.591,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.142,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.142,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.22,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.246,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.29,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.168,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.137,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.286,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.142,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.285,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.192,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.146,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.119,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.155,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.704,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.453,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.149,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.312,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.121,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.185,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.134,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.224,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.284,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.086,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.393,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.112,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.137,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.093,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.134,
|
||||
"build/src/ov_SC03_015/ov_SC03_015.o": 0.19,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_after.o": 0.748,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.593,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.084,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.081,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.176,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.214,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.209,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.179,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.128,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.276,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.109,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.244,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.141,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.108,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.147,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.158,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.735,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.428,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.182,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.295,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.109,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.178,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.125,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.286,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.285,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.108,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.466,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.091,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.115,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.083,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.139,
|
||||
"build/src/ov_SC04_011/ov_SC04_011.o": 0.171,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_after.o": 0.712,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.498,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.103,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.089,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.195,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.187,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.188,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.107,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.177,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.249,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.139,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.246,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.132,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.101,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.116,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.175,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.618,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.445,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.16,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.272,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.092,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.155,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.101,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.155,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.846,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.077,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.098
|
||||
"build/src/800.o": 1.143,
|
||||
"build/src/800_b.o": 0.268,
|
||||
"build/src/800_b_2.o": 0.604,
|
||||
"build/src/800_b_o0a.o": 0.155,
|
||||
"build/src/800_c.o": 0.379,
|
||||
"build/src/800b2.o": 0.224,
|
||||
"build/src/apicard1.o": 0.189,
|
||||
"build/src/apicard2.o": 0.208,
|
||||
"build/src/apicard3.o": 0.195,
|
||||
"build/src/apicard4.o": 0.172,
|
||||
"build/src/apicard5.o": 0.206,
|
||||
"build/src/apicard6.o": 0.179,
|
||||
"build/src/apicard7.o": 0.216,
|
||||
"build/src/boot.o": 0.175,
|
||||
"build/src/gap.o": 0.144,
|
||||
"build/src/libapi1.o": 0.154,
|
||||
"build/src/libapi2.o": 0.121,
|
||||
"build/src/libc2_1.o": 0.104,
|
||||
"build/src/libc2_2.o": 0.101,
|
||||
"build/src/libcd1.o": 0.118,
|
||||
"build/src/libcd2.o": 0.118,
|
||||
"build/src/libetc.o": 0.112,
|
||||
"build/src/libgpu.o": 0.113,
|
||||
"build/src/libgpu2.o": 0.14,
|
||||
"build/src/libgs1.o": 0.137,
|
||||
"build/src/libgs2.o": 0.17,
|
||||
"build/src/libgs3.o": 0.139,
|
||||
"build/src/libgs4.o": 0.145,
|
||||
"build/src/libgs5.o": 0.152,
|
||||
"build/src/libgs6.o": 0.158,
|
||||
"build/src/libgs7.o": 0.098,
|
||||
"build/src/libgs8.o": 0.173,
|
||||
"build/src/libgte1.o": 0.102,
|
||||
"build/src/libgte10.o": 0.042,
|
||||
"build/src/libgte11.o": 0.097,
|
||||
"build/src/libgte12.o": 0.111,
|
||||
"build/src/libgte13.o": 0.089,
|
||||
"build/src/libgte14.o": 0.099,
|
||||
"build/src/libgte15.o": 0.061,
|
||||
"build/src/libgte16.o": 0.06,
|
||||
"build/src/libgte17.o": 0.058,
|
||||
"build/src/libgte18.o": 0.058,
|
||||
"build/src/libgte19.o": 0.058,
|
||||
"build/src/libgte2.o": 0.797,
|
||||
"build/src/libgte20.o": 0.802,
|
||||
"build/src/libgte21.o": 0.797,
|
||||
"build/src/libgte22.o": 0.796,
|
||||
"build/src/libgte23.o": 0.79,
|
||||
"build/src/libgte24.o": 0.778,
|
||||
"build/src/libgte25.o": 0.796,
|
||||
"build/src/libgte26.o": 0.78,
|
||||
"build/src/libgte27.o": 0.803,
|
||||
"build/src/libgte28.o": 0.051,
|
||||
"build/src/libgte29.o": 0.79,
|
||||
"build/src/libgte3.o": 0.786,
|
||||
"build/src/libgte30.o": 0.763,
|
||||
"build/src/libgte4.o": 0.748,
|
||||
"build/src/libgte5.o": 0.747,
|
||||
"build/src/libgte6.o": 0.762,
|
||||
"build/src/libgte7.o": 0.762,
|
||||
"build/src/libgte8.o": 0.174,
|
||||
"build/src/libgte9.o": 0.106,
|
||||
"build/src/libmcrd1.o": 0.159,
|
||||
"build/src/libmcrd2.o": 0.165,
|
||||
"build/src/libpad1.o": 0.132,
|
||||
"build/src/libpad2.o": 0.158,
|
||||
"build/src/sgap.o": 0.154,
|
||||
"build/src/sgap_2.o": 0.158,
|
||||
"build/src/sgap_3.o": 0.152,
|
||||
"build/src/sgap_4.o": 0.171,
|
||||
"build/src/sgap_5.o": 0.168,
|
||||
"build/src/sgap_6.o": 0.157,
|
||||
"build/src/sgap_8.o": 0.132,
|
||||
"build/src/snd1.o": 0.124,
|
||||
"build/src/snd10.o": 0.127,
|
||||
"build/src/snd11.o": 0.106,
|
||||
"build/src/snd12.o": 0.085,
|
||||
"build/src/snd2.o": 0.116,
|
||||
"build/src/snd3.o": 0.102,
|
||||
"build/src/snd4.o": 0.115,
|
||||
"build/src/snd5.o": 0.1,
|
||||
"build/src/snd6.o": 0.134,
|
||||
"build/src/snd7.o": 0.097,
|
||||
"build/src/snd8.o": 0.112,
|
||||
"build/src/snd9.o": 0.122,
|
||||
"build/src/ov_SC03_014/ov_SC03_014.o": 0.243,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_after.o": 0.813,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.807,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.112,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.112,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.194,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.304,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.216,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.179,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.147,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.327,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.251,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.37,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.247,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.242,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.116,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.207,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.805,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.532,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.322,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.378,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.168,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.18,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.125,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.304,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.395,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.09,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.497,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.163,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.156,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.098,
|
||||
"build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.249,
|
||||
"build/src/ov_SC03_015/ov_SC03_015.o": 0.234,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_after.o": 1.028,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.704,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.129,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.141,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.254,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.346,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.197,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.172,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.177,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.28,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.159,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.53,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.237,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.171,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.133,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.135,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.781,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.479,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.205,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.371,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.147,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.248,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.161,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.281,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.426,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.1,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.54,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.182,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.147,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.149,
|
||||
"build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.187,
|
||||
"build/src/ov_SC04_011/ov_SC04_011.o": 0.233,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_after.o": 0.896,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.723,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.194,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.185,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.341,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.32,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.166,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.201,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.206,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.327,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.13,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.406,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.188,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.178,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.195,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.184,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.747,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.502,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.221,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.41,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.186,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.192,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.132,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.257,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 1.103,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.12,
|
||||
"build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.138
|
||||
},
|
||||
"ok": true,
|
||||
"seconds": 4.4
|
||||
"seconds": 24.1
|
||||
}
|
||||
|
||||
@@ -29087,3 +29087,7 @@
|
||||
{"ts": "2026-09-10 21:30:40", "label": "s104_d4", "rung": "E", "calib": {"head": "29c857eaa", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c", "fn": "func_8018691C", "addr": 2149083420, "aliases": null, "header": false, "includers": 0, "nhash_before": "5e2d865d3fdb85d89d6108f32fbd6255db46ef0b", "nhash_after": "ec9cb5d83708e91832764723fcfe97f2562b78cc", "source": "propagate:src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c:func_80182358", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.341, "objects": ["build/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.o"], "before_text": "s32 func_8018691C(s32 a0, u16 a1) {\n s16 sp10[4];\n s16 sp18[4];\n s16 sp20[4];\n s16 sp28[4];\n s16 pan;\n s16 vol;\n s32 v;\n s32 d;\n u16 *p;\n\n p = (u16 *)&D_80126B58;\n pan = 7;\n vol = 0x7F;\n sp10[0] = *(u16 *)(a0 + 0x6);\n sp10[1] = *(u16 *)(a0 + 0xA);\n sp10[2] = *(u16 *)(a0 + 0xE);\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18);\n sp18[2] = 0;\n __asm__(\"\" : \"=r\"(pan) : \"0\"(pan)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus8)\n\n v = sp18[0];\n if (v < 0) v = -v;\n if (v >= 0xA0) return 0;\n\n if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0;\n\n pan += sp18[0] / 20;\n if (pan < 0) pan = 0;\n else if (pan >= 0x10) pan = 0xF;\n\n sp20[0] = p[3];\n sp20[1] = p[5];\n sp20[2] = p[7];\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28);\n sp28[2] = 0;\n\n d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100;\n if (d > 0) {\n vol -= (d * 127) / 25600;\n if (vol < 0) vol = 0;\n }\n func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000)));\n return 1;\n}\n", "after_text": "s32 func_8018691C(s32 a0, u16 a1) {\n s16 sp10[4];\n s16 sp18[4];\n s16 sp20[4];\n s16 sp28[4];\n s16 pan;\n s16 vol;\n s32 v;\n s32 d;\n u16 *p;\n\n p = (u16 *)&D_80126B58;\n pan = 7;\n vol = 0x7F;\n sp10[0] = *(u16 *)(a0 + 0x6);\n sp10[1] = *(u16 *)(a0 + 0xA);\n sp10[2] = *(u16 *)(a0 + 0xE);\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18);\n v = sp18[0];\n do { sp18[2] = 0; } while (0); // !FAKE: do-while \u2014 sched1 LOOP-note barrier keeps the sh after the lh so no mem-unit stall pulls vol=0x7F past the jal (sched.c:2058-2074, schedule_select :2616) (P36 S104 d4)\n if (v < 0) v = -v;\n if (v >= 0xA0) return 0;\n\n if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0;\n\n pan += sp18[0] / 20;\n if (pan < 0) pan = 0;\n else if (pan >= 0x10) pan = 0xF;\n\n sp20[0] = p[3];\n sp20[1] = p[5];\n sp20[2] = p[7];\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28);\n sp28[2] = 0;\n\n d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100;\n if (d > 0) {\n vol -= (d * 127) / 25600;\n if (vol < 0) vol = 0;\n }\n func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000)));\n return 1;\n}\n"}
|
||||
{"ts": "2026-09-10 21:30:46", "label": "s104_d4", "rung": "E", "calib": {"head": "29c857eaa", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c", "fn": "func_80185CEC", "addr": 2149080300, "aliases": null, "header": false, "includers": 0, "nhash_before": "5e2d865d3fdb85d89d6108f32fbd6255db46ef0b", "nhash_after": "ec9cb5d83708e91832764723fcfe97f2562b78cc", "source": "propagate:src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c:func_80182358", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.473, "objects": ["build/src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.o"], "before_text": "s32 func_80185CEC(s32 a0, u16 a1) {\n s16 sp10[4];\n s16 sp18[4];\n s16 sp20[4];\n s16 sp28[4];\n s16 pan;\n s16 vol;\n s32 v;\n s32 d;\n u16 *p;\n\n p = (u16 *)&D_80126B58;\n pan = 7;\n vol = 0x7F;\n sp10[0] = *(u16 *)(a0 + 0x6);\n sp10[1] = *(u16 *)(a0 + 0xA);\n sp10[2] = *(u16 *)(a0 + 0xE);\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18);\n sp18[2] = 0;\n __asm__(\"\" : \"=r\"(pan) : \"0\"(pan)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus8)\n\n v = sp18[0];\n if (v < 0) v = -v;\n if (v >= 0xA0) return 0;\n\n if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0;\n\n pan += sp18[0] / 20;\n if (pan < 0) pan = 0;\n else if (pan >= 0x10) pan = 0xF;\n\n sp20[0] = p[3];\n sp20[1] = p[5];\n sp20[2] = p[7];\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28);\n sp28[2] = 0;\n\n d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100;\n if (d > 0) {\n vol -= (d * 127) / 25600;\n if (vol < 0) vol = 0;\n }\n func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000)));\n return 1;\n}\n", "after_text": "s32 func_80185CEC(s32 a0, u16 a1) {\n s16 sp10[4];\n s16 sp18[4];\n s16 sp20[4];\n s16 sp28[4];\n s16 pan;\n s16 vol;\n s32 v;\n s32 d;\n u16 *p;\n\n p = (u16 *)&D_80126B58;\n pan = 7;\n vol = 0x7F;\n sp10[0] = *(u16 *)(a0 + 0x6);\n sp10[1] = *(u16 *)(a0 + 0xA);\n sp10[2] = *(u16 *)(a0 + 0xE);\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18);\n v = sp18[0];\n do { sp18[2] = 0; } while (0); // !FAKE: do-while \u2014 sched1 LOOP-note barrier keeps the sh after the lh so no mem-unit stall pulls vol=0x7F past the jal (sched.c:2058-2074, schedule_select :2616) (P36 S104 d4)\n if (v < 0) v = -v;\n if (v >= 0xA0) return 0;\n\n if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0;\n\n pan += sp18[0] / 20;\n if (pan < 0) pan = 0;\n else if (pan >= 0x10) pan = 0xF;\n\n sp20[0] = p[3];\n sp20[1] = p[5];\n sp20[2] = p[7];\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28);\n sp28[2] = 0;\n\n d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100;\n if (d > 0) {\n vol -= (d * 127) / 25600;\n if (vol < 0) vol = 0;\n }\n func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000)));\n return 1;\n}\n"}
|
||||
{"ts": "2026-09-10 21:30:47", "label": "s104_d4", "rung": "E", "calib": {"head": "29c857eaa", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c", "fn": "func_801832F8", "addr": 2149069560, "aliases": null, "header": false, "includers": 0, "nhash_before": "5e2d865d3fdb85d89d6108f32fbd6255db46ef0b", "nhash_after": "ec9cb5d83708e91832764723fcfe97f2562b78cc", "source": "propagate:src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c:func_80182358", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.417, "objects": ["build/src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.o"], "before_text": "s32 func_801832F8(s32 a0, u16 a1) {\n s16 sp10[4];\n s16 sp18[4];\n s16 sp20[4];\n s16 sp28[4];\n s16 pan;\n s16 vol;\n s32 v;\n s32 d;\n u16 *p;\n\n p = (u16 *)&D_80126B58;\n pan = 7;\n vol = 0x7F;\n sp10[0] = *(u16 *)(a0 + 0x6);\n sp10[1] = *(u16 *)(a0 + 0xA);\n sp10[2] = *(u16 *)(a0 + 0xE);\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18);\n sp18[2] = 0;\n __asm__(\"\" : \"=r\"(pan) : \"0\"(pan)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n v = sp18[0];\n if (v < 0) v = -v;\n if (v >= 0xA0) return 0;\n\n if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0;\n\n pan += sp18[0] / 20;\n if (pan < 0) pan = 0;\n else if (pan >= 0x10) pan = 0xF;\n\n sp20[0] = p[3];\n sp20[1] = p[5];\n sp20[2] = p[7];\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28);\n sp28[2] = 0;\n\n d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100;\n if (d > 0) {\n vol -= (d * 127) / 25600;\n if (vol < 0) vol = 0;\n }\n func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000)));\n return 1;\n}\n", "after_text": "s32 func_801832F8(s32 a0, u16 a1) {\n s16 sp10[4];\n s16 sp18[4];\n s16 sp20[4];\n s16 sp28[4];\n s16 pan;\n s16 vol;\n s32 v;\n s32 d;\n u16 *p;\n\n p = (u16 *)&D_80126B58;\n pan = 7;\n vol = 0x7F;\n sp10[0] = *(u16 *)(a0 + 0x6);\n sp10[1] = *(u16 *)(a0 + 0xA);\n sp10[2] = *(u16 *)(a0 + 0xE);\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18);\n v = sp18[0];\n do { sp18[2] = 0; } while (0); // !FAKE: do-while \u2014 sched1 LOOP-note barrier keeps the sh after the lh so no mem-unit stall pulls vol=0x7F past the jal (sched.c:2058-2074, schedule_select :2616) (P36 S104 d4)\n if (v < 0) v = -v;\n if (v >= 0xA0) return 0;\n\n if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0;\n\n pan += sp18[0] / 20;\n if (pan < 0) pan = 0;\n else if (pan >= 0x10) pan = 0xF;\n\n sp20[0] = p[3];\n sp20[1] = p[5];\n sp20[2] = p[7];\n ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28);\n sp28[2] = 0;\n\n d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100;\n if (d > 0) {\n vol -= (d * 127) / 25600;\n if (vol < 0) vol = 0;\n }\n func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000)));\n return 1;\n}\n"}
|
||||
{"ts": "2026-09-10 21:44:18", "label": "s104_d10", "rung": "E", "calib": {"head": "30fd6796f", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c", "fn": "func_8017EF88", "addr": 2149052296, "aliases": null, "header": false, "includers": 0, "nhash_before": "ad5f90e75ee4e8f79fe0dfdc5728f96da39252ba", "nhash_after": "d8afd79867f8ed03438daee8de25d714489c134a", "source": ".run/P36/agents/ov_SC05_001__func_8017EF88/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.457, "objects": ["build/src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.o"], "before_text": "u32 func_8017EF88(s16 *param_1, s16 *param_2, s16 *param_3) {\n s16 ax, ay, bx, by, cx, cy;\n register s32 la __asm__(\"$8\"); // !FAKE: pin $8 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n register s32 lb __asm__(\"$7\"); // !FAKE: pin $7 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n register s32 lc __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n u32 r;\n s32 pad[2];\n\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n __asm__ __volatile__(\"\" : : \"r\"(la), \"r\"(lb), \"r\"(lc)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus8)\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n do {\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n la = (u16)ax;\n lb = (u16)bx;\n lc = (u16)cx;\n __asm__ __volatile__(\"\" : : \"r\"(ax), \"r\"(bx), \"r\"(cx)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus8)\n r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),\n lc | ((u16)cy << 16));\n return ~r >> 31;\n }\n return 1;\n } while (0);\n}\n", "after_text": "u32 func_8017EF88(s16 *param_1, s16 *param_2, s16 *param_3) {\n union {\n struct {\n s16 x, y;\n } v;\n s32 sxy;\n } a, b, c;\n s16 ax, ay, bx, by, cx, cy;\n\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n a.v.x = ax;\n a.v.y = ay;\n b.v.x = bx;\n b.v.y = by;\n c.v.x = cx;\n c.v.y = cy;\n return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;\n }\n return 1;\n}\n"}
|
||||
{"ts": "2026-09-10 21:44:43", "label": "s104_d10", "rung": "E", "calib": {"head": "30fd6796f", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_112/ov_SC03_112_jr_8017C294.c", "fn": "func_8017E654", "addr": 2149049940, "aliases": null, "header": false, "includers": 0, "nhash_before": "ad5f90e75ee4e8f79fe0dfdc5728f96da39252ba", "nhash_after": "d8afd79867f8ed03438daee8de25d714489c134a", "source": "propagate:src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:func_8017EF88", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.432, "objects": ["build/src/ov_SC03_112/ov_SC03_112_jr_8017C294.o"], "before_text": "u32 func_8017E654(s16 *param_1, s16 *param_2, s16 *param_3) {\n s16 ax, ay, bx, by, cx, cy;\n register s32 la __asm__(\"$8\"); // !FAKE: pin $8 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 lb __asm__(\"$7\"); // !FAKE: pin $7 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 lc __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u32 r;\n s32 pad[2];\n\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n __asm__ __volatile__(\"\" : : \"r\"(la), \"r\"(lb), \"r\"(lc)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n do {\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n la = (u16)ax;\n lb = (u16)bx;\n lc = (u16)cx;\n __asm__ __volatile__(\"\" : : \"r\"(ax), \"r\"(bx), \"r\"(cx)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),\n lc | ((u16)cy << 16));\n return ~r >> 31;\n }\n return 1;\n } while (0);\n}\n", "after_text": "u32 func_8017E654(s16 *param_1, s16 *param_2, s16 *param_3) {\n union {\n struct {\n s16 x, y;\n } v;\n s32 sxy;\n } a, b, c;\n s16 ax, ay, bx, by, cx, cy;\n\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n a.v.x = ax;\n a.v.y = ay;\n b.v.x = bx;\n b.v.y = by;\n c.v.x = cx;\n c.v.y = cy;\n return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;\n }\n return 1;\n}\n"}
|
||||
{"ts": "2026-09-10 21:44:44", "label": "s104_d10", "rung": "E", "calib": {"head": "30fd6796f", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC05_005/ov_SC05_005_jr_8017D898.c", "fn": "func_8017EFF4", "addr": 2149052404, "aliases": null, "header": false, "includers": 0, "nhash_before": "ad5f90e75ee4e8f79fe0dfdc5728f96da39252ba", "nhash_after": "d8afd79867f8ed03438daee8de25d714489c134a", "source": "propagate:src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:func_8017EF88", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.332, "objects": ["build/src/ov_SC05_005/ov_SC05_005_jr_8017D898.o"], "before_text": "u32 func_8017EFF4(s16 *param_1, s16 *param_2, s16 *param_3) {\n s16 ax, ay, bx, by, cx, cy;\n register s32 la __asm__(\"$8\"); // !FAKE: pin $8 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 lb __asm__(\"$7\"); // !FAKE: pin $7 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 lc __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u32 r;\n s32 pad[2];\n\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n __asm__ __volatile__(\"\" : : \"r\"(la), \"r\"(lb), \"r\"(lc)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n do {\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n la = (u16)ax;\n lb = (u16)bx;\n lc = (u16)cx;\n __asm__ __volatile__(\"\" : : \"r\"(ax), \"r\"(bx), \"r\"(cx)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),\n lc | ((u16)cy << 16));\n return ~r >> 31;\n }\n return 1;\n } while (0);\n}\n", "after_text": "u32 func_8017EFF4(s16 *param_1, s16 *param_2, s16 *param_3) {\n union {\n struct {\n s16 x, y;\n } v;\n s32 sxy;\n } a, b, c;\n s16 ax, ay, bx, by, cx, cy;\n\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n a.v.x = ax;\n a.v.y = ay;\n b.v.x = bx;\n b.v.y = by;\n c.v.x = cx;\n c.v.y = cy;\n return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;\n }\n return 1;\n}\n"}
|
||||
{"ts": "2026-09-10 21:44:45", "label": "s104_d10", "rung": "E", "calib": {"head": "30fd6796f", "stamp": "15956e4a96c4"}, "tu": "src/shared/ov/func_8017D5F4__014cbc20.h", "fn": "func_8017D5F4", "addr": 2149045748, "aliases": null, "header": true, "includers": 2, "nhash_before": "ad5f90e75ee4e8f79fe0dfdc5728f96da39252ba", "nhash_after": "d8afd79867f8ed03438daee8de25d714489c134a", "source": "propagate:src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:func_8017EF88", "verdict": "LEVER-FREE", "sites": [], "compiles": 2, "seconds": 0.461, "objects": ["build/src/ov_SC02_039/ov_SC02_039_jr_8017BEBC.o", "build/src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.o"], "before_text": "u32 func_8017D5F4(s16 *param_1, s16 *param_2, s16 *param_3) {\n s16 ax, ay, bx, by, cx, cy;\n register s32 la __asm__(\"$8\"); // !FAKE: pin $8 \u2014 NEEDED DIFFERS (P36 rung B headers2)\n register s32 lb __asm__(\"$7\"); // !FAKE: pin $7 \u2014 NEEDED DIFFERS (P36 rung B headers2)\n register s32 lc __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B headers2)\n u32 r;\n s32 pad[2];\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n __asm__ __volatile__(\"\" : : \"r\"(la), \"r\"(lb), \"r\"(lc)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B headers2)\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n do {\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n la = (u16)ax;\n lb = (u16)bx;\n lc = (u16)cx;\n __asm__ __volatile__(\"\" : : \"r\"(ax), \"r\"(bx), \"r\"(cx)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B headers2)\n r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),\n lc | ((u16)cy << 16));\n return ~r >> 31;\n }\n return 1;\n } while (0);\n}\n", "after_text": "u32 func_8017D5F4(s16 *param_1, s16 *param_2, s16 *param_3) {\n union {\n struct {\n s16 x, y;\n } v;\n s32 sxy;\n } a, b, c;\n s16 ax, ay, bx, by, cx, cy;\n\n ax = param_1[0];\n cx = param_3[0];\n if (cx < ax) {\n return 0;\n }\n bx = param_2[0];\n if (bx < cx) {\n return 1;\n }\n by = param_2[1];\n cy = param_3[2];\n if (cy < by) {\n return 0;\n }\n ay = param_1[1];\n if (ay >= cy) {\n a.v.x = ax;\n a.v.y = ay;\n b.v.x = bx;\n b.v.y = by;\n c.v.x = cx;\n c.v.y = cy;\n return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;\n }\n return 1;\n}\n"}
|
||||
|
||||
@@ -3391,41 +3391,39 @@ s32 func_8017E4B4(u8 *param_1, s16 *param_2, s16 *param_3) {
|
||||
extern s32 func_800495EC(s32 a0, s32 a1, s32 a2);
|
||||
|
||||
u32 func_8017E654(s16 *param_1, s16 *param_2, s16 *param_3) {
|
||||
union {
|
||||
struct {
|
||||
s16 x, y;
|
||||
} v;
|
||||
s32 sxy;
|
||||
} a, b, c;
|
||||
s16 ax, ay, bx, by, cx, cy;
|
||||
register s32 la __asm__("$8"); // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 lb __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 lc __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
u32 r;
|
||||
s32 pad[2];
|
||||
|
||||
ax = param_1[0];
|
||||
cx = param_3[0];
|
||||
if (cx < ax) {
|
||||
return 0;
|
||||
}
|
||||
__asm__ __volatile__("" : : "r"(la), "r"(lb), "r"(lc)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
|
||||
bx = param_2[0];
|
||||
if (bx < cx) {
|
||||
return 1;
|
||||
}
|
||||
by = param_2[1];
|
||||
do {
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
la = (u16)ax;
|
||||
lb = (u16)bx;
|
||||
lc = (u16)cx;
|
||||
__asm__ __volatile__("" : : "r"(ax), "r"(bx), "r"(cx)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
|
||||
r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),
|
||||
lc | ((u16)cy << 16));
|
||||
return ~r >> 31;
|
||||
}
|
||||
return 1;
|
||||
} while (0);
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
a.v.x = ax;
|
||||
a.v.y = ay;
|
||||
b.v.x = bx;
|
||||
b.v.y = by;
|
||||
c.v.x = cx;
|
||||
c.v.y = cy;
|
||||
return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -4342,41 +4342,39 @@ s32 func_8017EE08(struct ZnRec *param_1, s16 *param_2, s16 *param_3) {
|
||||
extern s32 func_800495EC(s32 a0, s32 a1, s32 a2);
|
||||
|
||||
u32 func_8017EF88(s16 *param_1, s16 *param_2, s16 *param_3) {
|
||||
union {
|
||||
struct {
|
||||
s16 x, y;
|
||||
} v;
|
||||
s32 sxy;
|
||||
} a, b, c;
|
||||
s16 ax, ay, bx, by, cx, cy;
|
||||
register s32 la __asm__("$8"); // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B tus8)
|
||||
register s32 lb __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus8)
|
||||
register s32 lc __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus8)
|
||||
u32 r;
|
||||
s32 pad[2];
|
||||
|
||||
ax = param_1[0];
|
||||
cx = param_3[0];
|
||||
if (cx < ax) {
|
||||
return 0;
|
||||
}
|
||||
__asm__ __volatile__("" : : "r"(la), "r"(lb), "r"(lc)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus8)
|
||||
bx = param_2[0];
|
||||
if (bx < cx) {
|
||||
return 1;
|
||||
}
|
||||
by = param_2[1];
|
||||
do {
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
la = (u16)ax;
|
||||
lb = (u16)bx;
|
||||
lc = (u16)cx;
|
||||
__asm__ __volatile__("" : : "r"(ax), "r"(bx), "r"(cx)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus8)
|
||||
r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),
|
||||
lc | ((u16)cy << 16));
|
||||
return ~r >> 31;
|
||||
}
|
||||
return 1;
|
||||
} while (0);
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
a.v.x = ax;
|
||||
a.v.y = ay;
|
||||
b.v.x = bx;
|
||||
b.v.y = by;
|
||||
c.v.x = cx;
|
||||
c.v.y = cy;
|
||||
return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -3069,41 +3069,39 @@ s32 func_8017EE64(u8 *param_1, s16 *param_2, s16 *param_3) {
|
||||
extern s32 func_800495EC(s32 a0, s32 a1, s32 a2);
|
||||
|
||||
u32 func_8017EFF4(s16 *param_1, s16 *param_2, s16 *param_3) {
|
||||
union {
|
||||
struct {
|
||||
s16 x, y;
|
||||
} v;
|
||||
s32 sxy;
|
||||
} a, b, c;
|
||||
s16 ax, ay, bx, by, cx, cy;
|
||||
register s32 la __asm__("$8"); // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 lb __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
register s32 lc __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9)
|
||||
u32 r;
|
||||
s32 pad[2];
|
||||
|
||||
ax = param_1[0];
|
||||
cx = param_3[0];
|
||||
if (cx < ax) {
|
||||
return 0;
|
||||
}
|
||||
__asm__ __volatile__("" : : "r"(la), "r"(lb), "r"(lc)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
|
||||
bx = param_2[0];
|
||||
if (bx < cx) {
|
||||
return 1;
|
||||
}
|
||||
by = param_2[1];
|
||||
do {
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
la = (u16)ax;
|
||||
lb = (u16)bx;
|
||||
lc = (u16)cx;
|
||||
__asm__ __volatile__("" : : "r"(ax), "r"(bx), "r"(cx)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
|
||||
r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),
|
||||
lc | ((u16)cy << 16));
|
||||
return ~r >> 31;
|
||||
}
|
||||
return 1;
|
||||
} while (0);
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
a.v.x = ax;
|
||||
a.v.y = ay;
|
||||
b.v.x = bx;
|
||||
b.v.y = by;
|
||||
c.v.x = cx;
|
||||
c.v.y = cy;
|
||||
return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -2,38 +2,37 @@
|
||||
* member's site in address order; the members are recorded in config/dedup.us.yaml (Phase 35). */
|
||||
extern s32 func_800495EC(s32 a0, s32 a1, s32 a2);
|
||||
u32 func_8017D5F4(s16 *param_1, s16 *param_2, s16 *param_3) {
|
||||
union {
|
||||
struct {
|
||||
s16 x, y;
|
||||
} v;
|
||||
s32 sxy;
|
||||
} a, b, c;
|
||||
s16 ax, ay, bx, by, cx, cy;
|
||||
register s32 la __asm__("$8"); // !FAKE: pin $8 — NEEDED DIFFERS (P36 rung B headers2)
|
||||
register s32 lb __asm__("$7"); // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B headers2)
|
||||
register s32 lc __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B headers2)
|
||||
u32 r;
|
||||
s32 pad[2];
|
||||
|
||||
ax = param_1[0];
|
||||
cx = param_3[0];
|
||||
if (cx < ax) {
|
||||
return 0;
|
||||
}
|
||||
__asm__ __volatile__("" : : "r"(la), "r"(lb), "r"(lc)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B headers2)
|
||||
bx = param_2[0];
|
||||
if (bx < cx) {
|
||||
return 1;
|
||||
}
|
||||
by = param_2[1];
|
||||
do {
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
la = (u16)ax;
|
||||
lb = (u16)bx;
|
||||
lc = (u16)cx;
|
||||
__asm__ __volatile__("" : : "r"(ax), "r"(bx), "r"(cx)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B headers2)
|
||||
r = func_800495EC(la | ((u16)ay << 16), lb | ((u16)by << 16),
|
||||
lc | ((u16)cy << 16));
|
||||
return ~r >> 31;
|
||||
}
|
||||
return 1;
|
||||
} while (0);
|
||||
cy = param_3[2];
|
||||
if (cy < by) {
|
||||
return 0;
|
||||
}
|
||||
ay = param_1[1];
|
||||
if (ay >= cy) {
|
||||
a.v.x = ax;
|
||||
a.v.y = ay;
|
||||
b.v.x = bx;
|
||||
b.v.y = by;
|
||||
c.v.x = cx;
|
||||
c.v.y = cy;
|
||||
return func_800495EC(a.sxy, b.sxy, c.sxy) >= 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user