mirror of
https://github.com/Druthulu/BFM-decomp
synced 2026-09-29 15:18:24 -04:00
feat(decomp): main lane m21 — 6 banked
One clean whole-EXE rebuild verified the batch (gate_main), and main re-checked BYTE-IDENTICAL against config/check.us.sha before anything was credited. ApplyMatrix FGO_01_OBJ_160 SetMAC123 func_80010CEC func_80028E44 func_80052430
This commit is contained in:
@@ -12640,7 +12640,11 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80028E00);
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INCLUDE_ASM("asm/nonmatchings/800", func_80028E24);
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INCLUDE_ASM("asm/nonmatchings/800", func_80028E44);
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extern void func_80029124(s32, s32);
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void func_80028E44(s32 a0) {
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func_80029124(0xE, a0 & 0xFF);
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}
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INCLUDE_ASM("asm/nonmatchings/800", func_80028E68);
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+97
-1
@@ -6,7 +6,103 @@ INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_01_OBJ_64);
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INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_01_OBJ_CC);
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INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_01_OBJ_160);
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/* FGO_01_OBJ_160 (0x800498EC) is NOT a callable function: it is the tail FRAGMENT of one
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* larger routine. FGO_01_OBJ_CC (0x80049858) computes $t2/$t5 from D_8006DF1C and tail-jumps
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* straight into it (`j FGO_01_OBJ_160`, no jal anywhere in asm/); the live inputs arrive in
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* $t0-$t5 with the destination pointer in $a1 -- none of which any C calling convention
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* expresses. Banked as a file-scope inline asm blob per the SYS_OBJ_1DC0 idiom (src/800c.c):
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* the literal ".ent\t"/".end\t" pair (tab-separated) makes maspsx emit a fresh
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* ".set\tnoreorder", keeping every hand-placed delay-slot nop in place; store offsets are
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* DECIMAL because maspsx int()-parses them and a hex "0x0($a1)" crashes it
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* ("invalid literal for int() with base 10") -- the exact defect that made the previous
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* attempt's whole-binary gate reject a COMPILE error, not a byte mismatch. Body transcribed
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* 1:1 from asm/nonmatchings/800b_5/FGO_01_OBJ_160.s (oracle MATCH 76/76; the region contains
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* ZERO relocations -- no jal/j/lui -- so relocation masking hides nothing). The trailing
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* __asm__(".word 0") reproduces the padding nop at 0x80049A18 before RotMatrixYXZ
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* (0x80049A1C), matching the banked FGO_02/03_OBJ_160 siblings whose own .s tails carry the
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* same post-endlabel pad (0x80049CA8 / 0x80049F38) and whose blobs use this identical form,
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* gate-proven twice in this very TU.
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*/
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__asm__(".text\n.align 2\n.globl FGO_01_OBJ_160\n.ent\tFGO_01_OBJ_160\n"
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"FGO_01_OBJ_160:\n.frame $sp,0,$31\n"
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".set\tnoreorder\n"
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"multu $t2, $t1\n"
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"nop\n"
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"nop\n"
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"mflo $t7\n"
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"sra $t6, $t7, 12\n"
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"sh $t6, 0($a1)\n"
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"multu $t5, $t1\n"
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"nop\n"
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"nop\n"
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"mflo $t7\n"
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"negu $t6, $t7\n"
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"sra $t7, $t6, 12\n"
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"multu $t2, $t4\n"
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"sh $t7, 2($a1)\n"
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"nop\n"
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"mflo $t7\n"
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"sra $t8, $t7, 12\n"
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"nop\n"
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"multu $t8, $t3\n"
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"nop\n"
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"nop\n"
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"mflo $t7\n"
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"sra $t6, $t7, 12\n"
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"nop\n"
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"multu $t5, $t0\n"
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"nop\n"
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"nop\n"
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"mflo $t7\n"
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"sra $t9, $t7, 12\n"
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"subu $t7, $t9, $t6\n"
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"multu $t8, $t0\n"
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"sh $t7, 6($a1)\n"
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"nop\n"
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"mflo $t6\n"
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"sra $t7, $t6, 12\n"
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"nop\n"
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"multu $t5, $t3\n"
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"nop\n"
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"nop\n"
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"mflo $t6\n"
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"sra $t9, $t6, 12\n"
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"addu $t6, $t9, $t7\n"
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"multu $t5, $t4\n"
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"sh $t6, 12($a1)\n"
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"nop\n"
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"mflo $t7\n"
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"sra $t8, $t7, 12\n"
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"nop\n"
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"multu $t8, $t3\n"
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"nop\n"
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"nop\n"
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"mflo $t7\n"
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"sra $t6, $t7, 12\n"
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"nop\n"
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"multu $t2, $t0\n"
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"nop\n"
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"nop\n"
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"mflo $t7\n"
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"sra $t9, $t7, 12\n"
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"addu $t7, $t9, $t6\n"
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"multu $t8, $t0\n"
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"sh $t7, 8($a1)\n"
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"nop\n"
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"mflo $t6\n"
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"sra $t7, $t6, 12\n"
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"nop\n"
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"multu $t2, $t3\n"
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"nop\n"
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"nop\n"
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"mflo $t6\n"
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"sra $t9, $t6, 12\n"
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"subu $t6, $t9, $t7\n"
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"sh $t6, 14($a1)\n"
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"jr $ra\n"
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"nop\n"
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".set\treorder\n.end\tFGO_01_OBJ_160\n");
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__asm__(".word 0");
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INCLUDE_ASM("asm/nonmatchings/800b_5", RotMatrixYXZ);
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+16
-1
@@ -248,7 +248,22 @@ void func_80010BB4(void) {
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INCLUDE_ASM("asm/nonmatchings/boot", func_80010C7C);
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INCLUDE_ASM("asm/nonmatchings/boot", func_80010CEC);
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extern u8 D_800AF630[];
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extern void func_800CEDFC(void);
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extern void func_8001C044(void);
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extern void func_80015310(void);
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extern void func_80011818(s32);
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void func_80010CEC(void) {
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register u8 *p = D_800AF630;
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func_800CEDFC();
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if (*(u16 *)(p + 0xA3B6) != 0) {
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func_8001C044();
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func_80015310();
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func_80011818(3);
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}
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}
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INCLUDE_ASM("asm/nonmatchings/boot", func_80010D60);
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+29
-1
@@ -1,3 +1,31 @@
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#include "common.h"
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INCLUDE_ASM("asm/nonmatchings/gsgap1", ApplyMatrix);
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__asm__(
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".text\n"
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".align 2\n"
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".globl ApplyMatrix\n"
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".ent ApplyMatrix\n"
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"ApplyMatrix:\n"
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".set\tnoreorder\n"
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"lw $8, 0($4)\n"
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"lw $9, 4($4)\n"
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"lw $10, 8($4)\n"
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"lw $11, 12($4)\n"
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"lw $12, 16($4)\n"
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"ctc2 $8, $0\n"
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"ctc2 $9, $1\n"
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"ctc2 $10, $2\n"
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"ctc2 $11, $3\n"
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"ctc2 $12, $4\n"
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"lwc2 $0, 0($5)\n"
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"lwc2 $1, 4($5)\n"
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"nop\n"
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"mvmva 1, 0, 0, 3, 0\n"
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"swc2 $25, 0($6)\n"
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"swc2 $26, 4($6)\n"
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"swc2 $27, 8($6)\n"
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"addu $2, $6, $0\n"
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"jr $ra\n"
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".set\treorder\n"
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".end ApplyMatrix\n"
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);
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+16
-1
@@ -1,3 +1,18 @@
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#include "common.h"
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INCLUDE_ASM("asm/nonmatchings/gsgap2", func_80052430);
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__asm__(".text\n.align 2\n.globl func_80052430\n.ent\tfunc_80052430\n"
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"func_80052430:\n.frame $sp,0,$31\n.mask 0x00000000,0\n.fmask 0,0\n"
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".set\tnoreorder\n"
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"lw $8, 0($5)\n"
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"lw $9, 4($5)\n"
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"lw $10, 8($5)\n"
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"sw $8, 20($4)\n"
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"sw $9, 24($4)\n"
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"sw $10, 28($4)\n"
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"addu $2, $4, $0\n"
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"jr $31\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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".set\treorder\n.end\tfunc_80052430\n");
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+9
-1
@@ -84,7 +84,15 @@ void SetRii()
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".set\treorder\n");
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}
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INCLUDE_ASM("asm/nonmatchings/gsgap5", SetMAC123);
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void SetMAC123(long r0, long r1, long r2)
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{
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__asm__ __volatile__(
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"mtc2 %0, $25\n"
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"mtc2 %1, $26\n"
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"mtc2 %2, $27"
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:
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: "r"(r0), "r"(r1), "r"(r2));
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}
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INCLUDE_ASM("asm/nonmatchings/gsgap5", SetData32);
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