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phase-36: S104 s104_e2 — func_800348A8 banked at 0 through the whole-object gate + propagated — → 0: return ++i raises the counter's refs past q's (allocno_compare global.c:587-603); the tree's hand-built q pointer deleted

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This commit is contained in:
Drew T
2026-09-11 01:17:15 -06:00
parent fd8fc7363b
commit f351d4a211
12 changed files with 1190 additions and 225 deletions
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.run/P36/agents/main__func_80030F80/body.c
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void func_80030F80(void)
{
u8 *p;
u8 *sv;
u8 *w;
const u16 *q;
const u16 *r;
s32 *tbl;
s32 vb;
s32 mask;
VoiceF80 *e;
u32 m;
u32 v;
s16 n;
s16 t;
u8 flag;
u8 st;
s32 dsp;
u16 idx;
u16 h;
s32 i;
sv = D_800A4988 + 0x576;
p = D_800A4988;
i = 0;
tbl = D_80073140;
w = D_800A4988 + 0x572;
r = D_8007319E;
q = D_800731A0;
for (; i < 8; i++, p += 0x54) {
flag = 0;
p[0x4E] &= 0x7F;
if (p[0x4E] != 0) {
*(s32 *)(p + 0x4) += 1;
if (*(s32 *)p != 0) {
*(s32 *)p -= 1;
if (*(s32 *)p == 0) {
func_8002EFF8(1, tbl[*(u16 *)(p + 0xA)]);
func_800316F8((s32)p);
}
} else {
if (p[0x4E] >= 2) {
p[0x4E] -= 1;
} else {
idx = *(u16 *)(p + 0xA);
dsp = sv[idx];
__asm__("" : : : "memory"); // !FAKE: barrier memory — its (clobber (mem:BLK (scratch))) empties cse's memory table on the dispatch path in cse1 AND cse2 (note_mem_written cse.c:7559-7563, invalidate_memory :1701); no plain-C source found (P36 S104 e2 minimum-lever)
switch (dsp) {
case 3:
mask = tbl[*(u16 *)(p + 0xA)];
p[0x50] = 0;
func_8002EFF8(0, mask);
/* fallthrough */
case 0:
p[0x4E] = 0;
if (*(s32 *)(p + 0x40) != 0) {
(*(void (**)(s32, s32))(p + 0x40))(p[0x51], *(s32 *)(p + 0x44));
}
*(s32 *)(p + 0x40) = 0;
break;
case 2:
if (p[0x50] != 0) {
func_8003D3B4(idx, 1);
p[0x50] = 0;
}
break;
}
}
if (p[0x4C] != 0) {
h = *(u16 *)(p + 0x4A) - 0x220;
*(u16 *)(p + 0x4A) = h;
flag = 1;
if ((s16)h <= 0) {
*(u16 *)(p + 0x4A) = 0;
p[0x4C] = 0;
p[0x50] = 1;
D_800A4C6D[i * 0x48] = 1;
func_8002EFF8(0, tbl[*(u16 *)(p + 0xA)]);
}
}
if (p[0x4F] != 0) {
flag = 1;
p[0x4F] = 0;
}
if (p[0x37] & 2) {
if (*(s32 *)(p + 0x1C) >= 0) {
*(s32 *)(p + 0x18) += *(u16 *)(p + 0x32);
if (*(s32 *)(p + 0x18) >= *(s32 *)(p + 0x1C)) {
*(s32 *)(p + 0x18) = *(s32 *)(p + 0x1C);
p[0x37] &= 0xFD;
}
} else {
*(s32 *)(p + 0x18) -= *(u16 *)(p + 0x32);
if (*(s32 *)(p + 0x18) <= *(s32 *)(p + 0x1C)) {
*(s32 *)(p + 0x18) = *(s32 *)(p + 0x1C);
p[0x37] &= 0xFD;
}
}
flag = 1;
}
if ((D_800A4F19 != 0 && p[0x53] != 0) || flag) {
n = p[0x35];
if (n != 0) {
t = n + (*(s32 *)(p + 0x18) >> 8);
n = t;
if (p[0x53] != 0) {
t = p[0x53] + t;
if (t < 0x42) {
n = 1;
} else {
t -= 0x40;
n = t;
if (t >= 0x80) {
n = 0x7F;
}
}
}
}
if (flag || n != p[0x52]) {
m = D_8006AA30[p[0x34]];
m = (m * *(s16 *)w) >> 7;
m = (m * *(s16 *)(p + 0x48)) >> 7;
if (flag) {
m = (m * ((s16)*(u16 *)(p + 0x4A) >> 7)) >> 8;
}
vb = (s32)w - 0x2D2;
e = (VoiceF80 *)(i * 0x48 + vb);
e->unk00 = tbl[*(u16 *)(p + 0xA)];
if (n != 0) {
if (w[0x1F] != 0) {
v = (m * q[0x7F - n]) >> 14;
e->unk08 = v;
v = (m * r[n]) >> 14;
e->unk0A = v;
} else {
v = (m * D_8007321E) >> 14;
e->unk0A = v;
e->unk08 = v;
}
} else {
v = m;
e->unk0A = v;
e->unk08 = v;
}
e->unk40 = *(u16 *)(p + 0xA);
if (e->unk44 != 0) {
e->unk04 |= 3;
} else {
e->unk44 = 1;
e->unk04 = 3;
}
p[0x52] = n;
}
}
func_800314DC((struct Obj *)p);
h = *(u16 *)(p + 0x12);
if (h != 0) {
h -= 1;
*(u16 *)(p + 0x12) = h;
if (h == 0) {
func_80031988((struct Ent30D80 *)p);
mask = tbl[*(u16 *)(p + 0xA)];
p[0x50] = 0;
func_8002EFF8(0, mask);
if (*(s32 *)(p + 0x40) != 0) {
(*(void (**)(s32, s32))(p + 0x40))(p[0x51], *(s32 *)(p + 0x44));
}
*(s32 *)(p + 0x40) = 0;
}
}
}
} else {
st = sv[*(u16 *)(p + 0xA)];
if (st == 0 || st == 3) {
D_800C7D2C &= ~tbl[*(u16 *)(p + 0xA)];
}
}
}
}
.run/P36/agents/main__func_80030F80/mechanism.md
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# func_80030F80 (src/800_b_2.c) — S104 agent e2 — NOT closed in plain C; minimum-lever body at 0 (1 lever -> 1 lever)
## (a) The residual
Lever-free: score 19, COUNT, 341 vs 343. ONE local defect; everything else is branch-offset fallout. At `case 3:` the
target RE-READS the voice's u16 index (`lhu v0,0(s0); nop; sll v0,v0,2`) while mine reuses the dispatch's `lhu a0,0(s0)`
(`sll v0,a0,2`): 2 instructions missing (the lhu and its load-delay nop). Case 2 in the target DOES reuse that `$a0`
(it is `func_8003D3B4(idx, 1)`), and the bottom `st == 0 || st == 3` path reuses its own index load too — only case 3
reloads. The case-3 `sb zero,0x46(s0)` must also stay AFTER the table `lw` (it lands in the jal's delay slot, and
`move a0,zero` is stolen into the dispatch `bne`'s slot).
## (b) The pass and the decision (read in the source; the dump facts are PROVEN, the target-side reading is inference)
cse. The dispatch index read `(set (reg:HI 88) (mem:HI (plus p 10)))` and case 3's `(mem:HI (plus p 10))` are the same
hash-table entry (canon_hash MEM ignores in_struct, cse.c:1942-1956; exp_equiv_p has no MEM case). cse1 reaches case 3 on
the path `127 -> 224 TAKEN -> 229 -> 232 fallthrough -> case 3` (`;; Processing block from 127 to 163`, plus the same from
38 and 107): label 229 has one use and a BARRIER before it, so `cse_end_of_basic_block` follows it (cse.c:8118, follow-jumps
branch), and jump1 already deleted case 3's own label by inverting `if (dsp==3) goto L3; goto end;` — case 3 is a
fall-through, no label stops the scan. On that path nothing invalidates memory, so the read becomes `reg 112`.
PROVEN on the dumps (`scratch/dumps_F`): the load is gone in `.cse` (cse1), not later.
The target's reload has to survive BOTH cse passes: a do-while(0) around the dispatch reads (NOTE_INSN_LOOP_END stops cse1's
scan, cse.c `! after_loop && NOTE_INSN_LOOP_END`) keeps the load through cse1 (`scratch/dumps_M`: 19 HI loads in `.loop`
vs 18), but cse2 (after_loop = 1, the note ignored; toplev.c:2926) deletes it again once loop.c has rewritten both
addresses to the same `$s0` giv. So whatever the original had is a memory invalidation (a varying-address store, a call,
or an asm clobber: note_mem_written cse.c:7539-7580, invalidate_memory :1701, calls :7240-7247) or a surviving label on
the dispatch path in BOTH passes. The final code has no store, call or branch target there.
The ORDER half: any store placed before the read to force the reload (`p[0x50] = 0;` first — the history's best, 5)
also forces `sb` before `lw`: sched1/2 cannot reorder a varying QI store and a varying SI load (true_dependence both
varying, sched.c:817), so the `sb` fills the lhu's load-delay slot and dbr gives the jal `move a0,zero` — 5, ORDER. The
target's order needs the READ first and the reload anyway, which only a pure invalidation gives.
## (c) The moves
None closes in plain C. Delivered body.c = the tree's text with its ONE lever re-marked per METHOD step 9 (the lever is
already the minimum: the dispatch-block `__asm__("" : : : "memory");`, which the S69 header's item 12 already placed at the
only zero-cost spot — after the lbu, outside every delay-slot thread). Lever count 1 -> 1. `--try` = 0.
## (d) GENERATOR PROPOSAL
When a COUNT residual is exactly one missing reload of a field a dominating block already loaded, first dump `.cse`
vs `.cse2`: if a do-while(0) keeps it through cse1 but cse2 deletes it, stop — no plain-C spelling exists, emit the
minimum-lever `"memory"` clobber at the dominating block's end and mark it; the sweep's 329 compiles (history) and this
agent's 20 hand spellings all sat in that class.
## (e) What did not work (bytes, all scored with --try)
- idx as `s32`/`u32`/`int` (19): expand always loads the u16 into a HI pseudo first (flag_force_mem at -O2), so every read
is the same `(mem:HI (plus p 10))`.
- `switch (sv[*(u16 *)(p + 0xA)])` with case 2 re-reading (19); `switch (sv[idx = …])` (19); dsp as `u8` (19); switch on `st`
(19); `((u16 *)p)[5]` / a `u16 *pid` temp for either read (19): cse canonicalises all of them.
- `default: break;` (19); `case 1: break;` (11 — adds a compare to the tree); a block-local `s32 m` in case 3 (19).
- Grouped `case 3: case 0: if (dsp != 0) {…}` (19) — the right idea (a label at case 3's head), but cse1 threads the
`dsp == 0` jump past the inner test and DELETES the group label (label use count drops to `to_usage`, cse_basic_block's
continuation, cse.c:8519-8520 `--LABEL_NUSES (to) == to_usage`), so the path reaches case 3 again. `if (dsp == 3)`: 47.
- do-while(0) around the index read / the dispatch reads / an empty one at case 3's head: 19 (cse2, see (b)).
- `p[0x50] = 0;` before the read (history best): 5, ORDER — see (b).
- A body-local `struct V54 { …; u16 id @0xA; …; u8 unk50 @0x50; … }` for the index reads and the store: 19.
## (f) Where the method fell short
The method has no row for "a reload that must survive TWO cse passes": the do-while(0) barrier (allowed-and-marked, rule 8)
looks like the fix and fixes cse1, and only the pass-by-pass load count (`.cse`, `.loop`, `.cse2`) shows cse2 undoing it.
A `tools/` helper that prints, per dump, the count of loads of one address would have settled it in one command.
## (g) Structs
Tested (above): a struct type changes nothing here. The mem hash ignores in_struct (cse.c:1948-1951), and the only
in_struct channel into cse — `invalidate_memory`'s `nonscalar && p->in_struct` (cse.c:1712-1714) — needs a store on the
path, which the target does not have. In sched, a struct field store vs a struct/array load are both varying addresses,
so the `sb`-after-`lw` order is not freed either (sched.c true_dependence). The lever is not a structs-phase item; it is
the one place this function's original source must have had a real barrier (or a construct the decompiler flattened).
The same voice record IS typed elsewhere in the TU — `Ent30D80` (func_80030D80: `unk0A` id, `unk40` callback, `unk44`,
`unk4E`, `unk50`, `unk51`) — so the structs phase can re-spell this body's `*(u16 *)(p + 0xA)`, `p[0x50]` etc. as fields
for readability at zero byte cost, lever unchanged.
.run/P36/agents/main__func_80030F80/related2.txt
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=== lever-free bodies in main sharing a callee or global with func_80030F80 (12 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_8002C8F4 (src/800_b_2.c:205) shares 4: D_800A4988 D_800A4C6D D_800A4F19 D_800C7D2C ---
void func_8002C8F4(void)
{
s32 sp10[2];
s32 *p;
u8 *q;
s32 i;
s32 j;
s32 k;
s32 n;
s32 m;
func_8003A424();
func_8003D518();
p = &D_800A4EA4;
*p = 0x23CF;
D_800A4EA8 = 0x3FFF;
D_800A4EAA = 0x3FFF;
D_800A4EB4 = 0x3FFF;
D_800A4EB6 = 0x3FFF;
D_800A4EAC = 0;
D_800A4EAE = 0;
D_800A4EB8 = 0;
D_800A4EBC = 1;
D_800A4EC8 = 0;
func_8003C598(p);
func_8003BE24(1);
func_8002D1F0(4);
func_8003B280(1);
func_80037D98();
D_800A4E68 = 0x3C;
D_800A4E6C = 0x2F;
D_800A4E6E = 0x2F;
D_800A4E70 = 1;
D_800A4F18 = 1;
D_800A4F19 = 1;
D_800A4EF6 = 1;
(&D_800A4638)[1] = 0x1010;
D_800A4638 = 0;
D_800A4E7A = 0;
D_800A46E4 = 0;
D_800A4654 = 0x10000;
D_800A466C = 0x14000;
D_800A4684 = 0x18000;
D_800A469C = 0x39F00;
for (j = 0x54; j >= 0; j -= 0xC) {
*(s32 *)((u8 *)&D_800A64B0 + j) = 0;
}
for (i = 0; i < 5; i++) {
k = i * 0x18;
D_800A4650[k] = 1;
*(s16 *)((u8 *)D_800A4644 + k) = 0;
*(s16 *)((u8 *)D_800A4642 + k) = -1;
}
for (n = 0x24C; n >= 0; n -= 0x54) {
*(u16 *)((u8 *)D_800A46E8 + n) = 0;
}
m = 0x10;
for (i = 0, q = D_800A4988 + 0x4F; i < 8; i++, m++, q += 0x54) {
k = i * 0x48;
q[2] = i;
*(s16 *)(q - 0x45) = m;
q[-1] = 0;
*(s32 *)(q - 0x4B) = 0;
*(s32 *)(q - 0xF) = 0;
q[1] = 0;
*(s32 *)((u8 *)D_800A4C68 + k) = m;
D_800A4C6C[k] = 0;
D_800A4C6D[k] = 0;
}
func_8002CC4C();
D_800A4EFA = 0x7F;
D_800A4EF8 = 0x7F;
D_800A4F1B = 1;
D_800A46BA = 0;
D_800A2B98 = 0;
D_800C7D20 = 0;
D_800C7D2C = 0;
D_800A2BA0 = 0;
D_800A4F17 = 0;
D_800A4E8E = 0;
D_800A4EA2 = 0;
D_800A4EF0 = 0;
D_800A4EE8 = 0;
D_800A4EFC = 0;
D_800A4F20 = 0;
D_800A4F22 = 0;
D_800A4F1D = 0;
D_800A4EEC = 0;
D_800A4EE6 = 0;
D_800A4EE0 = 0x4000;
D_800A4EE4 = 0x4000;
D_800A4F24 = 0;
D_800A4F16 = 0;
func_8002FAE0();
func_80037CC8();
func_8003BE74(0, 0xFFFFFF);
sp10[0] = 1;
sp10[1] = 0;
func_8003B1EC(sp10);
D_800A4F1C = 0;
D_800A4F1E = 0;
func_80034C24();
func_80037004();
}
--- func_80030D80 (src/800_b_2.c:3542) shares 3: D_80073140 func_8002EFF8 func_80031988 ---
void func_80030D80(Ent30D80 *arg0, s16 arg1) {
u8 old;
u8 flag;
old = *(u8 *)&D_800A4F17;
*(u8 *)&D_800A4F17 = 1;
if (arg0->unk00 != 0) {
flag = 1;
arg0->unk00 = 0;
} else if (arg0->unk4E >= 2 && (D_800C7D20 & D_80073140[arg0->unk0A])) {
D_800A4C2C[arg0->unk51].unk41 = 1;
D_800A4C2C[arg0->unk51].unk00 &= 0xFFF9FFFF;
flag = 1;
func_8002EFF8(0, D_80073140[arg0->unk0A]);
} else {
flag = 0;
if (arg1 != 0) {
arg0->unk50 = 1;
D_800A4C2C[arg0->unk51].unk41 = 1;
D_800A4C2C[arg0->unk51].unk00 &= 0xFFF9FFFF;
func_8002EFF8(0, D_80073140[arg0->unk0A]);
} else {
s32 mask = D_80073140[arg0->unk0A];
arg0->unk50 = 0;
func_8002EFF8(0, mask);
func_80031988(arg0);
}
}
if (arg0->unk40 != 0) {
arg0->unk40(arg0->unk51, arg0->unk44);
}
arg0->unk40 = 0;
if (flag) {
arg0->unk4E = 0;
}
*(u8 *)&D_800A4F17 = old;
}
--- func_80039308 (src/800_c.c:3468) shares 3: D_80073140 D_800A4F19 D_800C7D2C ---
void func_80039308(u8 **arg0, s16 arg1) {
u8 *src;
u8 *s0;
u8 *t9;
u8 *a3;
u8 *t1;
u8 *a1p;
u8 *a0p;
u8 *p;
u8 *q;
u8 *r;
u8 *tb;
s32 b2;
s32 b3;
s16 b4;
s32 bb;
u8 t3;
u8 t5;
s16 t7;
s16 cc;
s32 i;
s32 cnt;
s32 a2;
s32 t0;
s32 v1;
s32 res;
s32 idx1;
u8 *cb;
s32 *mm;
s32 *mp;
s32 mv2;
s32 two;
s32 tmp;
s32 pan;
s32 pan1;
s32 x;
s32 s17;
s32 s18;
s32 v;
s32 u26;
s32 n;
s32 off;
u32 t2;
u16 vol;
u32 vv;
u32 prod;
s32 k2;
u8 *tbl;
s32 tmp2;
s32 coff;
s32 xoff;
s32 mv;
s32 j;
s32 ax;
s32 ax2;
u8 *pb;
s32 c7;
u32 gx;
src = *arg0;
*arg0 = src + 1;
b2 = src[0];
*arg0 = src + 2;
b3 = src[1];
if (b3 != 0) {
if ((((u8 *)arg0 + arg1)[0x1BA] & 1) == 0) {
s0 = (u8 *)arg0 + (arg1 * 26 + 26);
i = 0;
b4 = *s0;
n = b4;
v = n * 0x10;
t9 = *(u8 **)((u8 *)arg0 + 0x1E0) + n * 0x200;
cnt = *(*(u8 **)((u8 *)arg0 + 0x1DC) + v);
if (cnt != 0) {
u26 = b2;
do {
if (u26 >= t9[6] && u26 <= t9[7]) {
t2 = 0x100;
t3 = 0;
t5 = 0;
t7 = -1;
t0 = 0;
a3 = D_800C6DDD;
a2 = 1;
t1 = D_800762B0;
do {
if (a3[0x4E] != 0) {
bb = a3[0];
if ((u8)bb < (t2 & 0xFF)) {
t3 = a2;
t2 = bb & 0xFF;
} else if ((u8)bb == (t2 & 0xFF)) {
if (D_800762B3[a2] == 0 && *t1 == 2) {
t3 = a2;
}
}
} else {
t5 = 1;
t7 = t0;
break;
}
a2++;
t1++;
t0++;
a3 += 0x60;
} while (t0 < 0x10);
if (t5 == 0) {
if (*t9 >= t2) {
t7 = t3 - 1;
} else {
a1p = D_800762B0;
a0p = D_800762B4;
v1 = 0;
while (v1 < 0x10) {
if (*a1p == 2 && *a0p == 0) {
res = v1;
goto found;
}
v1++;
a1p++;
a0p++;
}
res = -1;
found:
t7 = res;
}
}
if (t7 >= 0) {
p = &D_800C6DD0[t7 * 0x60];
q = p + 0x10;
p[0xD] = *t9;
if (p[0x5C] != 0 && *(s16 *)(p + 8) == b4 && p[0xC] == i &&
*(s16 *)(*(u32 *)(p + 0x50) + 0x1EC) == *(s16 *)((u8 *)arg0 + 0x1EC)) {
*(s32 *)(p + 0x14) = 0x13;
} else {
tmp = *(s16 *)(t9 + 0x16) - 1;
tbl = *(u8 **)((u8 *)arg0 + 0x1DC) + (tmp >> 1) * 0x10;
if (tmp & 1) {
x = *(s16 *)(tbl + 0xE) << 3;
} else {
x = *(s16 *)(tbl + 0xC) << 3;
}
*(s32 *)(q + 0x1C) = x;
*(u16 *)(q + 0x3A) = *(u16 *)(t9 + 0x10);
*(u16 *)(q + 0x3C) = *(u16 *)(t9 + 0x12);
*(s32 *)(q + 4) = 0x6009F;
}
gx = s0[1];
gx -= 0x100;
v = b3 * (u8)gx;
v >>= 7;
v = v * t9[2];
v >>= 7;
v = D_8006ACD8[v];
v = v * *(s16 *)((u8 *)arg0 + 0x1F2);
v >>= 7;
if (D_800A4F19 != 0) {
bb = s0[4];
pan1 = bb + t9[3]; pan1 -= 0x40;
cc = pan1;
if (pan1 < 0) {
cc = 0;
} else if (pan1 >= 0x80) {
cc = 0x7F;
}
if (cc > 0) {
s17 = v * D_8006AF08[0x80 - cc] * 4 >> 16;
} else {
s17 = (s16)v;
}
s18 = v * D_8006AF08[cc] * 4 >> 16;
} else {
s17 = s18 = v * 0x2D41 >> 14;
}
*(s16 *)(q + 8) = (u32)((s16)s17 * *(s16 *)((u8 *)arg0 + 0x10)) >> 14;
*(s16 *)(q + 0xA) = (u32)((s16)s18 * *(s16 *)((u8 *)arg0 + 0x10)) >> 14;
pan = *(s16 *)(s0 + 2);
vol = b2 * 0x100;
if (pan >= 0x41) {
vol = (b2 * 0x100) + (u32)((pan - 0x40) * t9[0xD] * 4);
} else if (pan < 0x40) {
vol = (b2 * 0x100) - (u32)((0x40 - pan) * t9[0xC] * 4);
}
tmp2 = t9[4] * 0x100 - t9[5];
*(s32 *)(p + 0x54) = tmp2;
tmp2 -= 0x3C00;
vol -= (u32)tmp2;
p[0x58] = t9[0xC];
p[0x59] = t9[0xD];
vv = (u16)vol;
if (vv >= 0x5301) {
*(s16 *)(q + 0x14) = 0x3FFF;
} else {
prod = D_8006AB30[vv >> 8];
prod *= D_8006ABD8[(vv & 0xFE) / 2];
*(s16 *)(q + 0x14) = prod >> 15;
}
p[0x5D] = 1;
D_800A2B98 &= ~((VMask *)q)->w;
D_800C7D20 |= ((VMask *)q)->w;
D_800762B4[t7] = 1;
if (t9[1] & 4) {
D_800A2BA0 &= ~((VMask *)q)->w;
D_800C7D2C |= ((VMask *)q)->w;
} else {
D_800C7D2C &= ~((VMask *)q)->w;
D_800A2BA0 |= ((VMask *)q)->w;
}
idx1 = t7;
r = &D_800C6DD0[idx1 * 0x60];
p = r;
if (r[0x5A] != 0) {
coff = *(s16 *)&r[6] * 26;
*(u8 *)(*(u32 *)&r[0x50] + coff + idx1 + 0x23) = 0;
r[0x5A] = 0;
}
r = 0;
*(s0 + idx1 + 9) = 1;
*(s16 *)(p + 4) = b2;
*(s16 *)(p + 8) = b4;
p[0xC] = i;
p[0x5C] = 1;
*(s16 *)(p + 0) = s17;
*(s16 *)(p + 2) = s18;
*(s16 *)(p + 6) = arg1;
*(u32 *)(p + 0x50) = (u32)arg0;
p[0x5B] = 1;
if (*((u8 *)arg0 + 0x1F4) != 0) {
p[0x5A] = 2;
} else {
p[0x5A] = 1;
}
}
}
i++;
t9 += 0x20;
} while (i < cnt);
}
}
} else {
j = 0;
s17 = (s32)((u8 *)arg0 + arg1 * 26);
s18 = b2;
off = 0;
do {
if (((u8 *)s17 + j)[0x23] != 0 && *(s16 *)&D_800C6DD4[off] == s18) {
idx1 = (s16)j;
xoff = idx1 * 0x60;
cb = D_800C6DD0;
r = cb + xoff;
if (r[0x5A] != 0) {
coff = *(s16 *)&r[6] * 26;
*(u8 *)(*(u32 *)&r[0x50] + coff + idx1 + 0x23) = 0;
r[0x5A] = 0;
}
mm = (s32 *)D_80073140;
D_800C7D20 &= ~mm[j];
D_800A2B98 |= mm[j];
pb = D_800762B0 + j;
two = 2;
*pb = two;
D_800762B4[j] = 0;
}
cb = 0;
mm = 0;
two = 0;
j++;
off += 0x60;
} while (j < 0x10);
}
}
--- func_8002E5BC (src/800_b_2.c:1546) shares 1: D_800A4F19 ---
void func_8002E5BC(void) {
u8 sp10[4];
sp10[0] = 0x5A;
sp10[1] = 0x5A;
sp10[2] = 0x5A;
sp10[3] = 0x5A;
CdMix(sp10);
D_800A4F19 = 0;
}
--- func_8002E5F8 (src/800_b_2.c:1560) shares 1: D_800A4F19 ---
void func_8002E5F8(void) {
u8 sp10[4];
sp10[0] = 0x80;
sp10[1] = 0;
sp10[2] = 0x80;
sp10[3] = 0;
CdMix(sp10);
D_800A4F19 = 1;
}
--- func_80034650 (src/800_b_2.c:6940) shares 1: D_800A4988 ---
void func_80034650(u8 *param_1, s32 param_2)
{
s32 i;
s32 pm;
pm = (param_2 & 0xFF) << 16;
for (i = 0; i < 8; i++) {
if (*(param_1 + i + 0x3A) != 0) {
func_80030D80((Ent30D80 *)(D_800A4988 + i * 0x54), pm >> 16);
}
}
*(u16 *)param_1 = 0;
}
.run/P36/agents/main__func_800348A8/body.c
+4 -18
View File
@@ -1,26 +1,12 @@
s32 func_800348A8(u32 arg0) {
u16 *p;
u16 *q;
s32 i;
u32 lo;
u32 hi;
s32 five;
p = D_800A46E8;
i = 0;
five = 5;
lo = arg0 & 0xFFFF;
hi = arg0 >> 16;
q = p + 3;
do {
if (p[0] == five && q[-1] == lo) {
if (hi == 0 || q[0] == hi) {
return i + 1;
}
for (i = 0; i < 8; i++, p += 0x2A) {
if (p[0] == 5 && p[2] == (arg0 & 0xFFFF) && ((arg0 >> 16) == 0 || p[3] == (arg0 >> 16))) {
return ++i;
}
i++;
q += 0x2A;
p += 0x2A;
} while (i < 8);
}
return 0;
}
.run/P36/agents/main__func_800348A8/mechanism.md
+58
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@@ -0,0 +1,58 @@
# func_800348A8 (src/800_b_2.c) — S104 agent e2 — CLOSED at 0, ZERO levers
## (a) The residual
Score 9, REG-caller, 29 vs 29 instructions: the loop counter `i` and the second walked pointer `q` (= p + 6 bytes) swap
`$a1`/`$v1` (target: i = `$v1`, q = `$a1`; mine: i = `$a1`, q = `$v1`). Every other register, the instruction count and the
order were already identical.
## (b) The pass and the decision
global.c allocation order. `allocno_compare` (global.c:587-603) ranks by `floor_log2(refs)*refs/live`:
lever-free: q (loop.c's giv r87) 9 refs / 13 live = 20769; i 9 refs / 18 live = 15000; p 8/18 = 13333. q goes first and
takes `$v1` (the first call-clobbered reg not conflicting — `$v0` is the loop temps', `$a0` is excluded in pass 0 because
`hi` prefers it, `regs_someone_prefers`, global.c:953); i then takes `$a1`. The target needs i ahead of q.
Refs are counted by flow BEFORE combine, weighted by loop depth (flow.c:2067 `reg_n_refs[regno] += loop_depth`).
## (c) The moves that closed it (proven on bytes, alloc table re-read after)
1. `return i + 1;` -> `return ++i;` — the RTL becomes `i = i + 1; $v0 = i;` (2 more uses + 1 more set of i inside the
loop, each worth 2 at loop depth 2 => refs 9 -> 13); combine then folds the pair back into `addiu v0,v1,1` (i is dead
after), so zero bytes change. Priority 21666.7 > q's 20769.2 > p's 13333.3 => i = `$v1`, q = `$a1`, p = `$a2`. PROVEN
(`tools/alloc_table.py a9`: r74 refs 13 live 18 pri 21666.7, first in the `.greg` order line).
2. (readability, byte-neutral) the tree's explicit second pointer `q = p + 3` deleted: loop.c creates exactly that giv
itself (`record_giv` loop.c:4341, the `p+4` address combined into it as `-2(q)` by `combine_givs` loop.c:5494). The
`five`/`lo`/`hi` locals deleted too: loop-invariant motion hoists `5`, `arg0 & 0xFFFF`, `arg0 >> 16` to the loop head in
source order, which is the target's order. The loop is a plain `for`.
Final text (body.c):
```c
p = D_800A46E8;
for (i = 0; i < 8; i++, p += 0x2A) {
if (p[0] == 5 && p[2] == (arg0 & 0xFFFF) && ((arg0 >> 16) == 0 || p[3] == (arg0 >> 16))) {
return ++i;
}
}
return 0;
```
## (d) GENERATOR PROPOSAL
When a register residual is a swap between a loop counter and another loop-carried pseudo and the counter's only extra
use is `return i + K;` / `x = i + 1` on an exit path, rewrite it as `return ++i;` (or `i += K; return i;`): refs rise by
3 x loop depth with zero bytes (combine folds the increment into the result copy); check `floor_log2(refs)*refs/live`
against the rival in `alloc_table.py` first.
## (e) What did not work (bytes)
- 156 enumerated spellings (loop form do/for/while x condition nesting/flat/continue x increment order x u16*/u8* x
invariants inline / as locals / hi-first) all 9 or worse: none changes refs/live of i or q.
- Two `return i + 1;` sites: 18 — loop.c turns `i + 1` into its own giv (extra `li a1,1`, extra increment).
- Indexing `D_800A46E8[i * 0x2A + k]` instead of walking p: 31 — three separate givs (D+0, D+4, D+6), not combined.
- An unused second parameter (to make `$a1` ever-live; regs_used_so_far, global.c:332-360): 9 — flow deletes the dead
parameter copy; also every call-clobbered reg is "used so far" anyway (global.c:353-355), so this channel is inert.
- lo/hi as locals declared hi-first: 16 (order change).
## (f) Where the method fell short
Nothing blocked; the allocation table settled it in one line once the refs formula was applied. The history.txt search
never proposes changing an expression's side effects (`i + 1` -> `++i`), which is the move; that belongs in a generator.
## (g) Structs
A `Slot54` struct type for `D_800A46E8` (fields u16 type @0, u16 @4, u16 @6, size 0x54) would only re-spell `p[0]`,
`p[2]`, `p[3]` as fields; the addresses are the same `(mem (plus p K))` and the decision here is a refs count in global.c,
not an aggregate/scalar alias question — structs would not have changed it (not needed; tested u8*-cast spelling: same 9).
.run/P36/agents/main__func_800348A8/related2.txt
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@@ -0,0 +1,98 @@
=== lever-free bodies in main sharing a callee or global with func_800348A8 (14 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_800342E8 (src/800_b_2.c:6726) shares 1: D_800A46E8 ---
void func_800342E8(u8 *a0, s32 a1) {
u32 t = a1 * 84 + (u32)D_800A46E8;
*(u8 *)(t + (u32)a0 + 0x3A) = 0;
}
--- func_800347C8 (src/800_b_2.c:7019) shares 1: D_800A46E8 ---
void func_800347C8(s32 arg0) {
Sl *e;
s32 i;
e = (Sl *)D_800A46E8;
for (i = 0; i < 8; i++, e++) {
if (e->state == 5 && e->id == (s16)arg0 &&
((arg0 >> 16) == 0 || (arg0 >> 16) == e->group)) {
e->active = 1;
}
}
}
--- func_80031D70 (src/800_b_2.c:4322) shares 1: D_800A46E8 ---
void func_80031D70(void) {
extern u16 D_800A46E8[];
extern void func_8003350C(s32 a0, s32 a1);
u16 *p;
s32 i;
p = D_800A46E8;
i = 0;
do {
if (((*p & 0x3F) == 1) && (*(u8 *)(p + 5) != 0)) {
func_8003350C(i, 0);
}
i += 1;
p += 0x2A;
} while (i < 8);
}
--- func_80031E94 (src/800_b_2.c:4363) shares 1: D_800A46E8 ---
void func_80031E94(void) {
extern u16 D_800A46E8[];
extern void func_80034A9C(void *a0);
u16 *p;
s32 i;
p = D_800A46E8;
i = 0;
do {
if ((*p & 0x3F) != 1 && (*p & 0x3F) == 5) {
func_80034A9C(p);
}
i += 1;
p += 0x2A;
} while (i < 8);
}
--- func_80033324 (src/800_b_2.c:5768) shares 1: D_800A46E8 ---
void func_80033324(s32 a0, s32 a1) {
u8 *e = (u8 *)D_800A46E8 + a1 * 0x54;
u16 t;
if ((*(u16 *)e & 0x3F) == 1) {
*(u8 *)(e + a0 + 0xE) = 0;
t = *(u16 *)(e + 0xC) - 1;
*(u16 *)(e + 0xC) = t;
if (t != 0) {
return;
}
if (*(u8 *)(e + 0xA) != 5) {
*(u8 *)(e + 0xA) = 0;
*(u16 *)e = 0;
}
}
}
--- func_80031FC8 (src/800_b_2.c:4406) shares 1: D_800A46E8 ---
void func_80031FC8(void) {
extern u16 D_800A46E8[];
extern void func_80034B0C(s32 a0);
u16 *p;
s32 i;
p = D_800A46E8;
i = 0;
do {
switch (*p & 0x3F) {
case 1:
break;
case 5:
func_80034B0C((s32)p);
break;
}
i += 1;
p += 0x2A;
} while (i < 8);
}
.run/P36/agents/main__func_80035210/body.c
+9
View File
@@ -0,0 +1,9 @@
s32 func_80035210(s32 a0, s32 a1)
{
s32 ret;
func_8003C498(D_80076218);
ret = ((s32 (*)(s32, s32))SpuWrite)(a0, a1);
D_80076218 += a1;
return ret;
}
.run/P36/agents/main__func_80035210/mechanism.md
+71
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@@ -0,0 +1,71 @@
# func_80035210 (src/800_b_2.c) — S104 agent e2 — CLOSED at 0 with ZERO levers, but it is a SIGNATURE change (parked)
## (a) The residual
Score 4, REG-caller, 24 vs 24: the post-`SpuWrite` read-modify-write of `D_80076218` (`lw; addu ..,s1; sw`) lives in `$v0`
in mine and in `$v1` in the target. Nothing else differs.
## (b) The pass and the decision
local-alloc. The load and the sum are one quantity (tied by `combine_regs`), born after the `SpuWrite` call inside block 0.
`find_free_reg` (local-alloc.c:2073, the scan at :2158-2175) takes the first hard reg not live over the quantity's
life: `$v0` in the lever-free body. In the target `$v0` is LIVE across that stretch — it holds `SpuWrite`'s return value
until the function returns it — so the scan's first free register is `$v1`. The tree's `register … __asm__("$3")` pin was
faking exactly that.
PROVEN on the dumps (`scratch/dumps_b3/b3.i.lreg`): the SpuWrite `call_insn` is `(set (reg:SI 2 v0) (call …))`, `$v0` is
copied to the return register and stays live (REG_DEAD v0 only at the final `use`), and `;; Register 76 in 3.` /
`;; Register 77 in 3.` put the load and the sum in `$v1`.
## (c) The move that closed it
The function RETURNS `SpuWrite`'s result (PsyQ's `SpuWrite` returns `unsigned long`, the size written; `func_8003C498`
is used as `SpuSetTransferStartAddr`-shaped too, and the TU's own `func_8002FC64` already calls `func_8003C498` through a
value-returning cast):
body.c (compiles in the tree as it stands, `--try … --body` = 0):
```c
s32 func_80035210(s32 a0, s32 a1)
{
s32 ret;
func_8003C498(D_80076218);
ret = ((s32 (*)(s32, s32))SpuWrite)(a0, a1);
D_80076218 += a1;
return ret;
}
```
The CLEAN spelling (needs the TU's two file-scope `extern void SpuWrite(s32, s32);` at src/800_b_2.c:2737 and :7513
changed to `extern u32 SpuWrite(s32, s32);`, the real PsyQ return type) is `scratch/b3.c`; tested as a whole TU
(`scratch/b3tu.c`): func_80035210 = 0 AND the other SpuWrite caller func_8002FC64 = 0:
```c
u32 func_80035210(s32 a0, s32 a1)
{
u32 ret;
func_8003C498(D_80076218);
ret = SpuWrite(a0, a1);
D_80076218 += a1;
return ret;
}
```
SIGNATURE CHANGE: the return type goes `void` -> `s32`/`u32`. No `extern` prototype of func_80035210 exists in `src/` and
nothing in `src/`/`asm/` references it by name (it is reached through a table or not at all), so no caller text changes.
Per Drew S104 (d) this is reported, not expected to bank now. The minimum-lever body WITHOUT the signature change is the
tree's own (1 pin, `register s32 v1 __asm__("$3")`): lever count 1 -> 1; with the signature change 1 -> 0.
## (d) GENERATOR PROPOSAL
When a `void` function's LAST call is to a value-returning library/callee (declared `void` in the TU) and the residual is a
`$v0`->`$v1` (or `$v0`->next free) rename of every late local after that call, try `T ret = call(...); …; return ret;`
with the function's return type changed (d29's family: a live `$v0` keepalive = a returned value).
## (e) What did not work (bytes)
- `D_80076218 += a1;` with the load inlined into the call argument (scratch/b1.c): 4 — same `$v0`.
- The history's R6/R7/R10 moves (inline, block, param-copy): all 4 — none makes `$v0` live.
- There is no plain-C, same-signature way to make `$v0` live after the last call: nothing else in the body produces a value
there, and a keepalive of it is exactly the lever this replaces.
## (f) Where the method fell short
The `d29` note in METHOD step 15 predicted it; the only work was recognising that `$v0` must be live and asking what
could hold it after a call.
## (g) Structs
Not a struct question: the decision is `$v0` liveness in local-alloc, fixed by the callee's and the function's return
types (a prototype matter, which the structs/types phase owns). A struct type for `D_80076218` would change nothing.
.run/P36/agents/main__func_80035210/related2.txt
+37
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@@ -0,0 +1,37 @@
=== lever-free bodies in main sharing a callee or global with func_80035210 (2 found; top 6 by shared symbols) — read them for the SHAPE ===
--- func_800351E8 (src/800_b_2.c:7503) shares 1: D_80076218 ---
s32 func_800351E8(s32 arg0)
{
D_80076218 = arg0;
return arg0 & -((u32)(arg0 - 0x1010) <= 0x7EFF0);
}
--- func_8002FC64 (src/800_b_2.c:2743) shares 1: func_8003C498 ---
int func_8002FC64(int nbytes, u32 *src)
{
s32 s2 = nbytes;
u32 *s1 = src;
s32 *s0;
s32 result;
if (D_8006AEF4 & 1) {
if (func_8003C4F0(0) == 0) {
func_80037D74();
return 0;
}
}
s0 = (s32 *)(&D_800A46C8);
result = ((s32 (*)(s32))func_8003C498)(*s0);
if (result != 0) {
SpuWrite((s32)s1, s2);
*s0 += s2;
D_8006AEF4 |= 1;
return 1;
}
func_80037D74();
return 0;
}
.run/P36/delever/calibration.json
+188 -188
View File
@@ -1,7 +1,7 @@
{
"head": "a4378aa04",
"head": "fd8fc7363",
"stamp": "15956e4a96c4",
"generated": "2026-09-11 01:12",
"generated": "2026-09-11 01:16",
"aliases": [
"main",
"ov_SC03_014",
@@ -21,207 +21,207 @@
"main": {
"objects": 85,
"identical": 85,
"seconds": 10.871999999999996,
"mean_s": 0.128
"seconds": 11.353000000000002,
"mean_s": 0.134
},
"ov_SC03_014": {
"objects": 32,
"identical": 32,
"seconds": 7.060000000000002,
"mean_s": 0.221
"seconds": 7.000999999999999,
"mean_s": 0.219
},
"ov_SC03_015": {
"objects": 32,
"identical": 32,
"seconds": 6.7669999999999995,
"mean_s": 0.211
"seconds": 6.676000000000002,
"mean_s": 0.209
},
"ov_SC04_011": {
"objects": 28,
"identical": 28,
"seconds": 6.335000000000002,
"mean_s": 0.226
"seconds": 6.2059999999999995,
"mean_s": 0.222
}
},
"per_object_seconds": {
"build/src/800.o": 1.106,
"build/src/800_b.o": 0.152,
"build/src/800_b_2.o": 0.469,
"build/src/800_b_o0a.o": 0.132,
"build/src/800_c.o": 0.437,
"build/src/800b2.o": 0.108,
"build/src/apicard1.o": 0.121,
"build/src/apicard2.o": 0.139,
"build/src/apicard3.o": 0.092,
"build/src/apicard4.o": 0.091,
"build/src/apicard5.o": 0.106,
"build/src/apicard6.o": 0.11,
"build/src/apicard7.o": 0.094,
"build/src/boot.o": 0.138,
"build/src/gap.o": 0.139,
"build/src/libapi1.o": 0.09,
"build/src/libapi2.o": 0.089,
"build/src/libc2_1.o": 0.128,
"build/src/libc2_2.o": 0.107,
"build/src/libcd1.o": 0.113,
"build/src/libcd2.o": 0.081,
"build/src/libetc.o": 0.148,
"build/src/libgpu.o": 0.129,
"build/src/libgpu2.o": 0.176,
"build/src/libgs1.o": 0.092,
"build/src/libgs2.o": 0.09,
"build/src/libgs3.o": 0.112,
"build/src/libgs4.o": 0.12,
"build/src/libgs5.o": 0.082,
"build/src/libgs6.o": 0.114,
"build/src/libgs7.o": 0.097,
"build/src/libgs8.o": 0.086,
"build/src/libgte1.o": 0.09,
"build/src/libgte10.o": 0.132,
"build/src/libgte11.o": 0.101,
"build/src/libgte12.o": 0.117,
"build/src/libgte13.o": 0.117,
"build/src/libgte14.o": 0.094,
"build/src/libgte15.o": 0.122,
"build/src/libgte16.o": 0.138,
"build/src/libgte17.o": 0.094,
"build/src/libgte18.o": 0.094,
"build/src/libgte19.o": 0.081,
"build/src/libgte2.o": 0.131,
"build/src/libgte20.o": 0.107,
"build/src/libgte21.o": 0.108,
"build/src/libgte22.o": 0.094,
"build/src/libgte23.o": 0.095,
"build/src/libgte24.o": 0.14,
"build/src/libgte25.o": 0.082,
"build/src/libgte26.o": 0.075,
"build/src/libgte27.o": 0.075,
"build/src/libgte28.o": 0.095,
"build/src/libgte29.o": 0.11,
"build/src/libgte3.o": 0.091,
"build/src/libgte30.o": 0.109,
"build/src/libgte4.o": 0.129,
"build/src/libgte5.o": 0.085,
"build/src/libgte6.o": 0.098,
"build/src/libgte7.o": 0.087,
"build/src/libgte8.o": 0.076,
"build/src/libgte9.o": 0.077,
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"build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.1
},
"ok": true,
"seconds": 3.9
"seconds": 3.8
}
.run/P36/delever/ledger.jsonl
+1
View File
@@ -29375,3 +29375,4 @@
{"ts": "2026-09-11 01:11:31", "label": "s104_e7", "rung": "E", "calib": {"head": "bd0167bf9", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c", "fn": "func_80181294", "addr": 2149061268, "aliases": null, "header": false, "includers": 0, "nhash_before": "e6e9c8caef478d8eb92851a431c9b33e5a4f43ac", "nhash_after": "68482cf5636ba2087cec4c609c051da544b899be", "source": ".run/P36/agents/ov_SC02_017__func_80181294/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.364, "objects": ["build/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.o"], "before_text": "s32 func_80181294(s32 arg0) {\n s32 e; /* *(s32 *)(arg0 + 0x20) -- the owned effect/entity */\n s16 *rot; /* (s16 *)(e + 0x10) : rot[0]=0x10 rot[1]=0x12 rot[2]=0x14 */\n s32 i;\n s32 t;\n s32 t2;\n s32 base1;\n s32 base2;\n u16 sp10[3];\n\n e = *(s32 *)(arg0 + 0x20);\n rot = (s16 *)(e + 0x10);\n\n if (rand() & 1) {\n *(u16 *)(e + 0x14) += *(s16 *)(arg0 + 0xFC) * (rand() % 8 + 1);\n }\n\n if (rot[2] > 0x38) {\n *(s16 *)(arg0 + 0xFC) = -1;\n rot[2] = 0x38;\n } else if (rot[2] < -0x38) {\n *(s16 *)(arg0 + 0xFC) = 1;\n rot[2] = -0x38;\n }\n\n if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {\n sp10[1] = D_8018E40A;\n for (i = 0; i < 5; i++) {\n register s32 v __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n t = rand() % 80;\n if ((rand() & 1) == 0) {\n v = -t;\n } else {\n v = t;\n }\n sp10[0] = v;\n t2 = rand() % 16;\n if ((rand() & 1) == 0) {\n v = -t2 + 0x40;\n } else {\n v = t2 + 0x40;\n }\n sp10[2] = v;\n ((void (*)(s32, void *, s32))func_8017DC70)(arg0, sp10, 1);\n }\n func_8002D4C8(0xBA0, 0);\n if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {\n sp10[0] = *(u16 *)(arg0 + 0x6);\n sp10[1] = *(u16 *)(arg0 + 0xA);\n sp10[2] = *(u16 *)(arg0 + 0xE) + 0x50;\n for (i = 0; i < 10; i++) {\n s32 v;\n t = rand() % 80;\n base1 = *(s16 *)(arg0 + 0x6);\n if ((rand() & 1) == 0) {\n v = base1 - t;\n } else {\n v = base1 + t;\n }\n sp10[0] = v;\n t = rand() % 56;\n base2 = *(s16 *)(arg0 + 0xA);\n if ((rand() & 1) == 0) {\n v = base2 - t;\n } else {\n v = base2 + t;\n }\n sp10[1] = v;\n func_80143BDC(sp10);\n }\n }\n }\n\n if (func_8012BEE8(arg0)) {\n rot[2] = 0;\n func_8012B23C(arg0);\n return 1;\n }\n return 0;\n}\n", "after_text": "s32 func_80181294(s32 arg0) {\n s32 e; /* *(s32 *)(arg0 + 0x20) -- the owned effect/entity */\n s16 *rot; /* (s16 *)(e + 0x10) : rot[0]=0x10 rot[1]=0x12 rot[2]=0x14 */\n s32 i;\n s32 t;\n s32 t2;\n s32 base1;\n s32 base2;\n u16 sp10[3];\n\n e = *(s32 *)(arg0 + 0x20);\n rot = (s16 *)(e + 0x10);\n\n if (rand() & 1) {\n *(u16 *)(e + 0x14) += *(s16 *)(arg0 + 0xFC) * (rand() % 8 + 1);\n }\n\n if (rot[2] > 0x38) {\n *(s16 *)(arg0 + 0xFC) = -1;\n rot[2] = 0x38;\n } else if (rot[2] < -0x38) {\n *(s16 *)(arg0 + 0xFC) = 1;\n rot[2] = -0x38;\n }\n\n if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {\n sp10[1] = D_8018E40A;\n for (i = 0; i < 5; i++) {\n t = rand() % 80;\n sp10[0] = ((rand() & 1) == 0) ? -t : t;\n t2 = rand() % 16;\n sp10[2] = ((rand() & 1) == 0) ? -t2 + 0x40 : t2 + 0x40;\n ((void (*)(s32, void *, s32))func_8017DC70)(arg0, sp10, 1);\n }\n func_8002D4C8(0xBA0, 0);\n if (*(s32 *)(arg0 + 0x1C) % 10 == 0) {\n sp10[0] = *(u16 *)(arg0 + 0x6);\n sp10[1] = *(u16 *)(arg0 + 0xA);\n sp10[2] = *(u16 *)(arg0 + 0xE) + 0x50;\n for (i = 0; i < 10; i++) {\n s32 v;\n t = rand() % 80;\n base1 = *(s16 *)(arg0 + 0x6);\n if ((rand() & 1) == 0) {\n v = base1 - t;\n } else {\n v = base1 + t;\n }\n sp10[0] = v;\n t = rand() % 56;\n base2 = *(s16 *)(arg0 + 0xA);\n if ((rand() & 1) == 0) {\n v = base2 - t;\n } else {\n v = base2 + t;\n }\n sp10[1] = v;\n func_80143BDC(sp10);\n }\n }\n }\n\n if (func_8012BEE8(arg0)) {\n rot[2] = 0;\n func_8012B23C(arg0);\n return 1;\n }\n return 0;\n}\n"}
{"ts": "2026-09-11 01:12:29", "label": "s104_e7", "rung": "E", "calib": {"head": "8310031fe", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c", "fn": "func_80181E98", "addr": 2149064344, "aliases": null, "header": false, "includers": 0, "nhash_before": "3d2f4d8627845e45e8d3c4211c817ee299ce5948", "nhash_after": "103d754522a45718d2ae866e015793e2292eec19", "source": ".run/P36/agents/ov_SC02_017__func_80181E98/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.324, "objects": ["build/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.o"], "before_text": "s32 func_80181E98_impl(void *arg)\n{\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern s32 func_80013478(s32 a0, s32 a1);\n extern void func_8002D4C8(s32 a0, s32 a1);\n extern s32 D_8018E564;\n extern u8 D_800AF648;\n extern u8 D_80126B5C;\n\n struct {\n s16 in0[4];\n s16 in1[4];\n s16 sxy[2];\n s32 flag;\n } w;\n s32 t;\n s32 r;\n s32 k;\n\n func_8012F214((s32)arg, (s32)&D_8018E564, (s32)w.in0);\n gte_SetRotMatrix(&D_800AF648);\n gte_SetTransMatrix(&D_800AF648);\n gte_ldv0(w.in0);\n gte_rtps();\n gte_stsxy(w.sxy);\n gte_stflg(&w.flag);\n if (w.flag & 0xFFFFEFFF) {\n goto ret0;\n }\n t = w.sxy[0];\n if (t < 0) {\n t = -t;\n }\n if (t < 0xAB) {\n if (w.sxy[1] >= 0) {\n if (w.sxy[1] >= 0x83) {\n goto second;\n }\n goto pass;\n } else {\n if (-w.sxy[1] < 0x83) {\n goto pass;\n }\n }\n }\nsecond:\n w.in1[0] = *(s16 *)((s32)arg + 6);\n w.in1[1] = *(s16 *)((s32)arg + 10);\n w.in1[2] = *(s16 *)((s32)arg + 14);\n gte_ldv0(w.in1);\n gte_rtps();\n gte_stsxy(w.sxy);\n gte_stflg(&w.flag);\n if (w.flag & 0xFFFFEFFF) {\n goto ret0;\n }\n t = w.sxy[0];\n if (t < 0) {\n t = -t;\n }\n if (t >= 0x105) {\n goto ret0;\n }\n if (w.sxy[1] >= 0) {\n if (w.sxy[1] >= 0x8D) {\n goto ret0;\n }\n /* zero-byte cross_jump fence (jump.c find_cross_jump): without an insn\n here the two |sxy[1]| arms share the suffix `slti 0x8D; beq ret0`\n and cross_jump merges them into a single conditional-negate (-5 ins). */\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus8)\n goto pass;\n } else {\n if (-w.sxy[1] >= 0x8D) {\n goto ret0;\n }\n }\npass:\n r = func_80013478((s32)&D_80126B5C, (s32)w.in0);\n k = 0x5A0;\n if (r <= 0x41010) {\n k = 0x59F;\n }\n func_8002D4C8(k, 0);\n return 1;\nret0:\n return 0;\n}\n", "after_text": "s32 func_80181E98_impl(void *arg)\n{\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern s32 func_80013478(s32 a0, s32 a1);\n extern void func_8002D4C8(s32 a0, s32 a1);\n extern s32 D_8018E564;\n extern u8 D_800AF648;\n extern u8 D_80126B5C;\n\n struct {\n s16 in0[4];\n s16 in1[4];\n s16 sxy[2];\n s32 flag;\n } w;\n s32 t;\n s32 r;\n s32 k;\n\n func_8012F214((s32)arg, (s32)&D_8018E564, (s32)w.in0);\n gte_SetRotMatrix(&D_800AF648);\n gte_SetTransMatrix(&D_800AF648);\n gte_ldv0(w.in0);\n gte_rtps();\n gte_stsxy(w.sxy);\n gte_stflg(&w.flag);\n if (w.flag & 0xFFFFEFFF) {\n return 0;\n }\n t = w.sxy[0];\n if (t < 0) {\n t = -t;\n }\n if (t >= 0xAB || (w.sxy[1] >= 0 ? w.sxy[1] >= 0x83 : -w.sxy[1] >= 0x83)) {\n w.in1[0] = *(s16 *)((s32)arg + 6);\n w.in1[1] = *(s16 *)((s32)arg + 10);\n w.in1[2] = *(s16 *)((s32)arg + 14);\n gte_ldv0(w.in1);\n gte_rtps();\n gte_stsxy(w.sxy);\n gte_stflg(&w.flag);\n if (w.flag & 0xFFFFEFFF) {\n return 0;\n }\n t = w.sxy[0];\n if (t < 0) {\n t = -t;\n }\n if (t >= 0x105 || (w.sxy[1] >= 0 ? w.sxy[1] >= 0x8D : -w.sxy[1] >= 0x8D)) {\n return 0;\n }\n }\n r = func_80013478((s32)&D_80126B5C, (s32)w.in0);\n k = 0x5A0;\n if (r <= 0x41010) {\n k = 0x59F;\n }\n func_8002D4C8(k, 0);\n return 1;\n}\n"}
{"ts": "2026-09-11 01:13:05", "label": "s104_e7", "rung": "E", "calib": {"head": "a4378aa04", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_011/ov_SC02_011_jr_80183178.c", "fn": "func_80188034", "addr": 2149089332, "aliases": null, "header": false, "includers": 0, "nhash_before": "10fb258db655381af24190437b259c2a85277ac3", "nhash_after": "a2fce7d011636169a2a6de6823cc647232f7b831", "source": ".run/P36/agents/ov_SC02_017__func_801831FC/scratch/sib3.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.194, "objects": ["build/src/ov_SC02_011/ov_SC02_011_jr_80183178.o"], "before_text": "void func_80188034(s32 a0) {\n s32 idx;\n u8 *s0;\n s32 base;\n s16 buf[2];\n s16 sVar1;\n register s32 iVar3 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 a1v;\n\n idx = *(s16 *)(a0 + 0xFC);\n s0 = D_80195FC8 + idx * 8;\n base = (s32)&D_80126B58;\n\n if (*(s16 *)(s0 + 6) != 0 && (s16)D_80126B62 >= -0x8FF) {\n func_80015978(base + 4, (s32 *)buf);\n buf[1] = *(u16 *)(s0 + 2);\n sVar1 = (s16)func_80013294((void *)buf, (void *)s0);\n if (sVar1 < 0x800) {\n iVar3 = (0x800 - sVar1) * 0x7F;\n if (iVar3 < 0) {\n iVar3 += 0x7FF;\n }\n iVar3 = iVar3 >> 11;\n a1v = iVar3;\n if (iVar3 < 0) {\n a1v = 0;\n }\n if ((s16)a1v >= 0x80) {\n a1v = 0x7F;\n }\n func_8002D4C8(*(u16 *)(s0 + 6), (a1v | 0x1000) & 0xffff);\n }\n }\n}\n", "after_text": "void func_80188034(s32 a0) {\n s32 idx;\n u8 *s0;\n s32 base;\n s16 buf[2];\n s16 sVar1;\n s32 q;\n s16 a1v;\n\n idx = *(s16 *)(a0 + 0xFC);\n s0 = D_80195FC8 + idx * 8;\n base = (s32)&D_80126B58;\n\n if (*(s16 *)(s0 + 6) != 0 && (s16)D_80126B62 >= -0x8FF) {\n func_80015978(base + 4, (s32 *)buf);\n buf[1] = *(u16 *)(s0 + 2);\n sVar1 = (s16)func_80013294((void *)buf, (void *)s0);\n if (sVar1 < 0x800) {\n q = (0x800 - sVar1) * 0x7F / 0x800;\n if (q < 0) {\n a1v = 0;\n } else {\n a1v = q;\n }\n if (a1v >= 0x80) {\n a1v = 0x7F;\n }\n func_8002D4C8(*(u16 *)(s0 + 6), (u16)(a1v | 0x1000));\n }\n }\n}\n"}
{"ts": "2026-09-11 01:17:10", "label": "s104_e2", "rung": "E", "calib": {"head": "fd8fc7363", "stamp": "15956e4a96c4"}, "tu": "src/800_b_2.c", "fn": "func_800348A8", "addr": 2147698856, "aliases": null, "header": false, "includers": 0, "nhash_before": "fcf18ccc90c05a0db9bfb0547c0730afef4c7eea", "nhash_after": "eeb62cbb4042d7e340442ca3b07478f780c47b63", "source": ".run/P36/agents/main__func_800348A8/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.24, "objects": ["build/src/800_b_2.o"], "before_text": "s32 func_800348A8(u32 arg0) {\n u16 *p;\n u16 *q;\n s32 i;\n u32 lo;\n u32 hi;\n s32 five;\n\n p = D_800A46E8;\n i = 0;\n five = 5;\n lo = arg0 & 0xFFFF;\n hi = arg0 >> 16;\n q = p + 3;\n do {\n __asm__ (\"\" :: \"r\"(i), \"r\"(i)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if (p[0] == five && q[-1] == lo) {\n if (hi == 0 || q[0] == hi) {\n return i + 1;\n }\n }\n i++;\n q += 0x2A;\n p += 0x2A;\n } while (i < 8);\n return 0;\n}\n", "after_text": "s32 func_800348A8(u32 arg0) {\n u16 *p;\n s32 i;\n\n p = D_800A46E8;\n for (i = 0; i < 8; i++, p += 0x2A) {\n if (p[0] == 5 && p[2] == (arg0 & 0xFFFF) && ((arg0 >> 16) == 0 || p[3] == (arg0 >> 16))) {\n return ++i;\n }\n }\n return 0;\n}\n"}
src/800_b_2.c
+4 -19
View File
@@ -7059,29 +7059,14 @@ extern u16 D_800A46E8[];
s32 func_800348A8(u32 arg0) {
u16 *p;
u16 *q;
s32 i;
u32 lo;
u32 hi;
s32 five;
p = D_800A46E8;
i = 0;
five = 5;
lo = arg0 & 0xFFFF;
hi = arg0 >> 16;
q = p + 3;
do {
__asm__ ("" :: "r"(i), "r"(i)); // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus9)
if (p[0] == five && q[-1] == lo) {
if (hi == 0 || q[0] == hi) {
return i + 1;
}
for (i = 0; i < 8; i++, p += 0x2A) {
if (p[0] == 5 && p[2] == (arg0 & 0xFFFF) && ((arg0 >> 16) == 0 || p[3] == (arg0 >> 16))) {
return ++i;
}
i++;
q += 0x2A;
p += 0x2A;
} while (i < 8);
}
return 0;
}