- gate_main .run/P32/t4e/slate_39308.json --apply: "slate 1 -> 1 compatible … BANKED 1 main functions -- 143dbb89f34491258bbc27810d0a12ec8b43a8dd BYTE-IDENTICAL" (clean main rebuild)
- draft .run/P32/t4e/bank/func_80039308.c = b56 (no register pins, no fences, no asm bodies); the 56-variant route is in .run/P32/t4e/NOTES.md
- the S84 PLATEAU's two causes were both compiler mechanisms missing from the censuses: combine.c:2306 (i2dest_in_i2src skips the ref decrement → reload1.c:658 slot) and loop.c:695-700 (a named variable set after a jump is never a movable; cse.c make_regs_eqv folds the arms onto the later-mentioned copy target unless the copy is a subreg move)
- fleet: INCLUDE_ASM stubs 2 -> 0; every game-code function of every binary is C
- gate_main .run/P32/t4e/slate_32a74.json --apply: "slate 1 -> 1 compatible … BANKED 1 main functions -- 143dbb89f34491258bbc27810d0a12ec8b43a8dd BYTE-IDENTICAL" (clean main rebuild)
- draft .run/P32/t4e/bank/func_80032A74.c = the S84 u16 TU-clean body (422/422 code) + `gx = dd->unk07; gx -= 0x100; flag = (u32)sub < (u32)(u8)gx;`
- mechanism + 18 isolated reproducers: .run/P32/t4e/ghost/ (k4/k5/k7/k14/k16/k17 mint the slot; byte-store hosts do not); cookbook §501-Q to follow
- main: stubs 2 -> 1 (func_80039308 remains, now DIFF 2 in the real TU via the same ghost + the s17/s18 variable reuse)
- ov_SC03_105:func_80185810 banked in commit:4004 (bank.sh: rtu MATCH 489/489, build rc 0, sha d305ff6d… == config)
- §501-P: shape-grep the idiom's constants (`'0x200) << 2'`) and objdump the sibling's window before any dial; a pin/fence a draft
"needs" is a property of its other dials — remove every pin after a sibling port (d9 = no pins = MATCH); census: F2 polarity 42,
2-set uu 63, ot16 pin load-bearing only next to 2-set neighbours (d3 = 4); the S83 "hard reg hides nonzero_bits" guess refuted (d5)
- post-bank: twin_rescan 2 open / 0 free; verbatim_check --strict 5==5; backlog.py render 3 open; frontier_t4b_final.json 2 / 940
- .gitignore allowlist for .run/P32/t4d/ (variants, logs, notes, the banked body; rtu/ compile dirs stay ignored)
- fleet R22 running in the background (.run/P32/t4d/r22_*.log) — recorded at the T4b close
- func_80185810: draft .run/P32/t4d/bank/func_80185810.c (hand agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=ov_SC03_105 -j8 rc 0; sha1 d305ff6da199b52d0d44023766643a8b661ed524 == config/check.ov_SC03_105.sha (BYTE-IDENTICAL)
- src/ov_SC03_105/ov_SC03_105_jr_80181C84.c: 1 INCLUDE_ASM left
- (c): cnt's slot is spill_stack_slot[23] (evicted from $s7), so the phantom @0x8 must be an initial-loop no-traffic slot; every producer refuted on dump facts (leaf: no save area; LO spilled after GR and products alternate to GR_REGS — C3 measured; no unallocated single-block equiv pseudo; expand-time locals precede; 13 lh single-use, no lb). Rows 49/50 = two move_movables hoists in body order.
- row (d) read only (rtu DIFF 13 re-verified); brief + step 0 (§501-N banked-sibling search on its symbol set) in the checkpoint
- no src/ change in this commit; fleet R22 owed at the T4b close (last check-all 218/218 before the (b) bank)
- func_800CF408: draft .run/P32/t4c/bank/func_800CF408.c (hand agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=md_MAIN_007 -j8 rc 0; sha1 2ff702b605ab5cfc18474c464c4c07e5f8ffd48c == config/check.md_MAIN_007.sha (BYTE-IDENTICAL)
- src/md_MAIN_007/md_MAIN_007.c: 0 INCLUDE_ASM left
- main:func_80032A74 (422 ins, closeness 1): the residual is ONE reload-time slot at sp+0x48 (u16 draft = 422/422 code, DIFF 22 frame
rows; s16 draft = DIFF 1 at idx 244 lh vs lhu). Every post-parameter slot producer enumerated from gcc-2.7.2 (reload1.c:658 ghost
alter_reg / caller-save.c:249 area / reload1.c:879 invalid-equiv / reload1.c:3499 spill_stack_slot) and refuted on the bytes: combine's
newi2pat ghosts re-derive a narrow load and the site is lhu (no lb, no double load); a save area without sw/lw needs sched.c:4962
staleness and no register-only insn shares a block with a call; $t0 holds no pseudo; LO mult results retry into GR_REGS. Verdict
PROVED at 1 (pin kept with the verdict; ledger WALL-PROVED).
- NEW mechanism measured: local-alloc.c optimize_reg_copy_2 (tmp = x; tmp op= c; x = tmp) mints a ghost with stale refs, but after
regclass -> GR_REGS, allocated, no slot (P13/P14). 18 isolated reproducers, 0 draft variants; cookbook §501-M; accelerators (12).
- tools/ghost_census.py (new): ghosts in a .lreg dump with their class (ST_REGS => slot). tools/cc1_dumps.sh: prints the .frame line,
ins count, spill lines and the census; the under-counting standalone-(use) grep is gone. SETUP rows (R21).
- tools/backlog.py: load_best kept the EARLIEST record at equal closeness (docstring said latest) — the S84 row never rendered; fixed.
- CURRENT_PHASE.md: S84 log + refreshed 🛑 checkpoint (rows (b)(c)(d) next, then T5). No src/config/carve change; fleet check-all
218/218 rc 0 at the S84 preflight.
- func_800CF6D0: draft .run/P32/t5x/fable/func_800CF6D0.c (fable agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=md_MAIN_007 -j8 rc 0; sha1 2ff702b605ab5cfc18474c464c4c07e5f8ffd48c == config/check.md_MAIN_007.sha (BYTE-IDENTICAL)
- src/md_MAIN_007/md_MAIN_007.c: 1 INCLUDE_ASM left
- pinned since S76/S79 as PROVED (§474: fold-const.c:882 split_tree merges MULT(MULT(i,2),2) in every C spelling; the two escapes
each cost one instruction — stupid.c adjacency / expand_decl use-brackets); 20 spellings + statement-expression + register
temp forms measured; the S83 hand pass measured four block-scoped forms at 193/131
- the mechanism (dumps + source): split_tree only decomposes MULT/PLUS/MINUS and never distributes MULT over PLUS, so
MULT(PLUS(MULT(i,2),1),2) survives fold; expr.c:5368's EXPAND_SUM distributive law returns (plus (mult (mult X 2) 2) 2);
both_summands (expr.c:5248) + plus_constant cancel the +2 against the -2 into the bare symbol; memory_address -> force_operand
expands the two expand_mult copy;sll pairs adjacent (expmed.c:2227/2244) with no note or variable, so stupid.c's born+2
rule 2-colours v1/a0 exactly as the target and expand_binop's late copy_to_mode_reg(sym) gives la $a0 / addu / lbu 0()
- ruled out from source: a hard-reg pin + shift outer form (191, LENGTH-DRIFT — a REG index makes (plus sym reg) a legitimate
MIPS address so la/addu vanish: the target's la;addu;lbu shape REQUIRES the index to reach memory_address as a MULT rtx),
COMPOUND_EXPR shield (fold distributes), SAVE_EXPR via ?:, COND shields, builtin pseudo-constants, pin+MULT
- draft .run/P32/t5x/fable/func_80011380.c; report .run/P32/t5x/reports/func_80011380.md; coordinator rtu_match MATCH 192/192
in src/boot.c (--o0); gate_main slate_11380: BANKED, 143dbb89 BYTE-IDENTICAL; all 15 jal callees + data-symbol counts equal
- main open 3 -> 2 (func_80032A74 pinned NEAR 1; func_80039308 NEAR 4)
- func_8017DC80: draft .run/P32/t5x/fable/func_8017DC80.c (fable agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=ov_SC07_002 -j8 rc 0; sha1 fad71342019704d1dd6ec25f2f3934c97e322624 == config/check.ov_SC07_002.sha (BYTE-IDENTICAL)
- src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c: 2 INCLUDE_ASM left
- func_800CD92C: draft .run/P32/t5x/fable/func_800CD92C.c (fable agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=md_MAIN_009 -j8 rc 0; sha1 d270f695b793b5c03db159b7aabcc066daa87eda == config/check.md_MAIN_009.sha (BYTE-IDENTICAL)
- src/md_MAIN_009/md_MAIN_009.c: 0 INCLUDE_ASM left
- func_800CF3E8: draft .run/P32/t5x/fable/func_800CF3E8.c (fable agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=md_MAIN_003 -j8 rc 0; sha1 dd1b32ecf1103c6f7cf1943d25546a3046e17b14 == config/check.md_MAIN_003.sha (BYTE-IDENTICAL)
- src/md_MAIN_003/md_MAIN_003.c: 0 INCLUDE_ASM left
- func_801834A4: draft .run/P32/t5x/fable/func_801834A4.c (fable agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=ov_SC03_105 -j8 rc 0; sha1 d305ff6da199b52d0d44023766643a8b661ed524 == config/check.ov_SC03_105.sha (BYTE-IDENTICAL)
- src/ov_SC03_105/ov_SC03_105_jr_80181C84.c: 2 INCLUDE_ASM left
- pinned since S79 as "mflo destination $t0 vs $a2 (REGALLOC-PERM), pinning regresses to 79"; 5 attempts 51->20->14->8->2 +
permuter_ils null (S80); T4 re-probed DIFF 2; the S83 hand pass measured the variable-reuse form at 80
- mechanism (dumps + source): the mult results are GLOBAL allocnos (mulsi3_internal '=l', mips.md:848; 'pref LO_REG');
global.c parks m3/m8/m13 in LO, reload spills LO ("Spilling reg 65") and retries via retry_global_alloc (reload1.c:3497)
with losers = forbidden_regs, seeded from bad_spill_regs = regs_explicitly_used = regs_ever_live at reload entry
(reload1.c:486, 3651-3660, 709) — the S76 `register s32 e0 __asm__("$6")` made $a2 ever-live, so m13's retry could not
take it and first-fit gave $t0 ("Register 102 now in 8")
- fix: unpin e0; `__asm__("" : "=r"(e1) : "0"(e1))` immediately before `dst[6] = -e1` (e1's qty 6666 -> 8750, allocated
before e0's 7894, holds $v1, e0's first fit drops to $a2) + `__asm__("" : "=r"(p1) : "0"(p1))` between p1's andi and sll
(undoes the global-allocno tie the first launder created; the $t6/$t7/$t8 rotation). Ladder 2 (pinned) -> 37 (unpinned)
-> 15 -> 6 -> MATCH; a byte-identical alternate launders addr1 after its addu
- draft .run/P32/t5x/fable/func_80020DA4.c; report .run/P32/t5x/reports/func_80020DA4.md; coordinator rtu_match MATCH
100/100 in src/800.c; gate_main slate_20DA4: BANKED, 143dbb89 BYTE-IDENTICAL
- main open 4 -> 3 (2 pinned walls + func_80039308 NEAR)
- func_8017DF28: draft .run/P32/t5x/fable/func_8017DF28.c (fable agent, agent MATCH re-verified by coordinator rtu_match in the real TU)
- one build for the same-TU batch: make build BINARY=ov_SC06_022 -j8 rc 0; sha1 2a7d7d4e2fe2f87a83a065686731c7942b3c70ef == config/check.ov_SC06_022.sha (BYTE-IDENTICAL)
- src/ov_SC06_022/ov_SC06_022_jr_8017BEBC.c: 3 INCLUDE_ASM left
Drew T