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https://git.eden-emu.dev/eden-emu/eden
synced 2026-10-21 17:03:00 -04:00
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2 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 4cf3d52897 | |||
| 989768aa46 |
@@ -57,8 +57,21 @@ u32 HardwareComposer::ComposeLocked(f32* out_speed_scale, Display& display,
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// Set default speed limit to 100%.
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*out_speed_scale = 1.0f;
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// If no layers are visible, skip the logic. Acquiring and holding buffers here would
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// consume the producer's queue without ever presenting.
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bool any_visible = false;
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for (auto& layer : display.stack.layers) {
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if (layer->visible) {
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any_visible = true;
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break;
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}
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}
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if (!any_visible) {
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return 1;
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}
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// Wait for the previous composite, bounding the number of in-flight composites.
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nvdisp.WaitForComposite();
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this->ReleaseFramebuffersLocked(display);
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// Determine the number of vsync periods to wait before composing again.
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std::optional<s32> swap_interval{};
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@@ -152,6 +165,13 @@ u32 HardwareComposer::ComposeLocked(f32* out_speed_scale, Display& display,
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// Advance by 1 frame (60 FPS compositing)
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m_frame_number += 1;
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// Release framebuffers once the frame has been handed to the compositor. This happens
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// within the same vsync period as the acquire (release_frame_number is checked against
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// the advanced counter), so the producer gets its buffers back immediately instead of
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// losing a queue slot for a whole frame.
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// TODO: support release fences; releasing before the composite has finished can tear.
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this->ReleaseFramebuffersLocked(display);
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return 1;
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}
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@@ -1,12 +1,8 @@
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// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <functional>
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#include <optional>
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#include <type_traits>
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#include <queue>
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@@ -17,10 +13,9 @@
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namespace Shader::IR {
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template <typename Pred, typename Resolve = std::identity>
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auto BreadthFirstSearch(Value value, Pred&& pred, Resolve&& resolve = {})
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template <typename Pred>
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auto BreadthFirstSearch(const Value& value, Pred&& pred)
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-> std::invoke_result_t<Pred, const Inst*> {
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value = resolve(value);
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if (value.IsImmediate()) {
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// Nothing to do with immediates
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return std::nullopt;
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@@ -41,7 +36,7 @@ auto BreadthFirstSearch(Value value, Pred&& pred, Resolve&& resolve = {})
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}
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// Visit the right most arguments first
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for (size_t arg = inst->NumArgs(); arg--;) {
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const Value arg_value{resolve(inst->Arg(arg))};
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const Value arg_value{inst->Arg(arg)};
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if (arg_value.IsImmediate()) {
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continue;
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}
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@@ -40,6 +40,8 @@ struct HostTranslateInfo {
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bool support_conditional_barrier{}; ///< True when the device supports barriers in conditional
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///< control flow
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bool single_lane_geometry_subgroups{};
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bool support_attribute_texture_handle{}; ///< True when the host binds texture handles that
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///< arrive as vertex attributes
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void ApplyDescriptorLimitPolicy() noexcept {
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if (min_ssbo_alignment == 0) {
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@@ -31,60 +31,6 @@ struct TextureInst {
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using TextureInstVector = boost::container::small_vector<TextureInst, 24>;
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const IR::Block* ConditionalHeader(const IR::Block* body) {
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const auto predecessors{body->ImmPredecessors()};
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const auto successors{body->ImmSuccessors()};
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if (predecessors.size() != 1 || successors.size() != 1) return nullptr;
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const IR::Block* const header{predecessors[0]};
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const auto targets{header->ImmSuccessors()};
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if (targets.size() != 2 || targets[0] != body || targets[1] != successors[0] ||
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targets[1]->ImmPredecessors().size() != 2 || header->empty() ||
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header->back().GetOpcode() != IR::Opcode::ConditionRef) {
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return nullptr;
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}
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return header;
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}
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std::pair<IR::Value, bool> Condition(IR::Value value) {
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bool negated{};
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while (const IR::Inst* inst = value.TryInstRecursive()) {
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if (inst->GetOpcode() == IR::Opcode::LogicalNot) negated = !negated;
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else if (inst->GetOpcode() != IR::Opcode::ConditionRef) break;
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value = inst->Arg(0);
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}
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return {value.Resolve(), negated};
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}
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IR::Value ResolveConditionalPhi(IR::Value value, const IR::Block* block) {
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if (!value.Resolve().IsPhi() || !(block = ConditionalHeader(block))) return value;
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const auto [condition, negated]{Condition(block->back().Arg(0))};
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boost::container::small_vector<const IR::Block*, 16> visited;
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while (value.Resolve().IsPhi() && std::ranges::find(visited, block) == visited.end()) {
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visited.push_back(block);
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const IR::Inst* const phi{value.InstRecursive()};
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const auto predecessors{block->ImmPredecessors()};
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if (predecessors.size() == 1) {
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block = predecessors[0];
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continue;
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}
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if (predecessors.size() != 2 || phi->NumArgs() != 2) break;
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const IR::Block* body{predecessors[0]};
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const IR::Block* header{ConditionalHeader(body)};
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if (header != predecessors[1]) {
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body = predecessors[1];
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header = ConditionalHeader(body);
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if (header != predecessors[0]) break;
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}
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const auto [other_condition, other_negated]{Condition(header->back().Arg(0))};
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if (condition == other_condition && (phi->PhiBlock(0) == header || phi->PhiBlock(0) == body)) {
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const IR::Block* const incoming{negated == other_negated ? body : header};
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value = phi->Arg(phi->PhiBlock(0) == incoming ? 0 : 1);
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}
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block = header;
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}
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return value;
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}
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constexpr u32 DESCRIPTOR_SIZE = 8;
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constexpr u32 DESCRIPTOR_SIZE_SHIFT = u32(std::countr_zero(DESCRIPTOR_SIZE));
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constexpr u32 DESCRIPTOR_MAX_COUNT = 1024;
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@@ -322,6 +268,10 @@ static inline u32 ReadCbufCached(Environment& env, u32 index, u32 offset) {
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return v;
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}
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static inline bool IsAttributeHandle(const ConstBufferAddr& cbuf) {
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return cbuf.index == ATTRIBUTE_HANDLE_CBUF_INDEX;
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}
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static inline u32 GetTextureHandleCached(Environment& env, const ConstBufferAddr& cbuf) {
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// Must all be uniquely different variables
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// If has secondary, then it will be cbuf.secondary_{index|offset}, else its 0.
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@@ -341,35 +291,44 @@ static inline u32 GetTextureHandleCached(Environment& env, const ConstBufferAddr
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// Cached variants of existing helpers
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static inline TextureType ReadTextureTypeCached(Environment& env, const ConstBufferAddr& cbuf) {
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if (IsAttributeHandle(cbuf)) {
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return TextureType::Color2D;
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}
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return env.ReadTextureType(GetTextureHandleCached(env, cbuf));
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}
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static inline TexturePixelFormat ReadTexturePixelFormatCached(Environment& env,
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const ConstBufferAddr& cbuf) {
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if (IsAttributeHandle(cbuf)) {
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return TexturePixelFormat::A8B8G8R8_UNORM;
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}
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return env.ReadTexturePixelFormat(GetTextureHandleCached(env, cbuf));
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}
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static inline bool IsTexturePixelFormatIntegerCached(Environment& env,
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const ConstBufferAddr& cbuf) {
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if (IsAttributeHandle(cbuf)) {
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return false;
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}
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return env.IsTexturePixelFormatInteger(GetTextureHandleCached(env, cbuf));
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}
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std::optional<ConstBufferAddr> Track(const IR::Value& value, Environment& env, const HostTranslateInfo& host_info, const IR::Block* block);
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static inline std::optional<ConstBufferAddr> TrackCached(const IR::Value& v, Environment& env, const HostTranslateInfo& host_info, const IR::Block* block) {
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if (const IR::Inst* key = v.TryInstRecursive()) {
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std::optional<ConstBufferAddr> Track(const IR::Value& value, Environment& env, const HostTranslateInfo& host_info);
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static inline std::optional<ConstBufferAddr> TrackCached(const IR::Value& v, Environment& env, const HostTranslateInfo& host_info) {
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if (const IR::Inst* key = v.InstRecursive()) {
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if (auto it = env.track_cache.find(key); it != env.track_cache.end()) return it->second;
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auto found = Track(v, env, host_info, block);
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auto found = Track(v, env, host_info);
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if (found) env.track_cache.emplace(key, *found);
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return found;
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}
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return Track(v, env, host_info, block);
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return Track(v, env, host_info);
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}
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std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environment& env, const HostTranslateInfo& host_info, const IR::Block* block);
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std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environment& env, const HostTranslateInfo& host_info);
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std::optional<ConstBufferAddr> Track(const IR::Value& value, Environment& env, const HostTranslateInfo& host_info, const IR::Block* block) {
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return IR::BreadthFirstSearch(value, [&env, &host_info, block](const IR::Inst* inst) {
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return TryGetConstBuffer(inst, env, host_info, block);
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}, [&](IR::Value operand) { return ResolveConditionalPhi(operand, block); });
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std::optional<ConstBufferAddr> Track(const IR::Value& value, Environment& env, const HostTranslateInfo& host_info) {
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return IR::BreadthFirstSearch(value, [&env, &host_info](const IR::Inst* inst) {
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return TryGetConstBuffer(inst, env, host_info);
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});
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}
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std::optional<u32> TryGetConstant(IR::Value& value, Environment& env) {
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@@ -393,13 +352,13 @@ std::optional<u32> TryGetConstant(IR::Value& value, Environment& env) {
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return ReadCbufCached(env, index_number, offset_number);
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}
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std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environment& env, const HostTranslateInfo& host_info, const IR::Block* block) {
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std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environment& env, const HostTranslateInfo& host_info) {
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switch (inst->GetOpcode()) {
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default:
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return std::nullopt;
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case IR::Opcode::BitwiseOr32: {
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std::optional lhs{TrackCached(inst->Arg(0), env, host_info, block)};
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std::optional rhs{TrackCached(inst->Arg(1), env, host_info, block)};
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std::optional lhs{TrackCached(inst->Arg(0), env, host_info)};
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std::optional rhs{TrackCached(inst->Arg(1), env, host_info)};
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if (!lhs || !rhs) {
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return std::nullopt;
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}
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@@ -429,7 +388,7 @@ std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environme
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if (!shift.IsImmediate()) {
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return std::nullopt;
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}
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std::optional lhs{TrackCached(inst->Arg(0), env, host_info, block)};
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std::optional lhs{TrackCached(inst->Arg(0), env, host_info)};
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if (lhs) {
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lhs->shift_left = shift.U32();
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}
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@@ -457,7 +416,7 @@ std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environme
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return std::nullopt;
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} while (false);
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}
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std::optional lhs{TrackCached(op1, env, host_info, block)};
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std::optional lhs{TrackCached(op1, env, host_info)};
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if (lhs) {
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lhs->shift_left = static_cast<u32>(std::countr_zero(op2.U32()));
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}
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@@ -520,15 +479,43 @@ std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environme
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};
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}
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bool IsAttributeSourcedHandle(const IR::Value& handle) {
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if (handle.IsImmediate()) {
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return false;
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}
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const IR::Inst* inst{handle.InstRecursive()};
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if (inst->GetOpcode() == IR::Opcode::BitCastU32F32 && !inst->Arg(0).IsImmediate()) {
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inst = inst->Arg(0).InstRecursive();
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}
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return inst->GetOpcode() == IR::Opcode::GetAttribute ||
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inst->GetOpcode() == IR::Opcode::GetAttributeU32;
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}
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TextureInst MakeInst(Environment& env, IR::Block* block, IR::Inst& inst, const HostTranslateInfo& host_info) {
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ConstBufferAddr addr;
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if (IsBindless(inst)) {
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const std::optional<ConstBufferAddr> track_addr{TrackCached(inst.Arg(0), env, host_info, block)};
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const std::optional<ConstBufferAddr> track_addr{TrackCached(inst.Arg(0), env, host_info)};
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if (!track_addr) {
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throw NotImplementedException("Failed to track bindless texture constant buffer");
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} else {
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if (track_addr) {
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addr = *track_addr;
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} else if (host_info.support_attribute_texture_handle &&
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IsAttributeSourcedHandle(inst.Arg(0))) {
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// The handle travels with the vertices (sprite batches pick the texture per quad), so
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// there is no constant buffer to read it from. The host binds the handle of each run
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// of vertices that share one.
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addr = ConstBufferAddr{
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.index = ATTRIBUTE_HANDLE_CBUF_INDEX,
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.offset = 0,
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.shift_left = 0,
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.secondary_index = 0,
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.secondary_offset = 0,
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.secondary_shift_left = 0,
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.dynamic_offset = {},
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.count = 1,
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.has_secondary = false,
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};
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} else {
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throw NotImplementedException("Failed to track bindless texture constant buffer");
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}
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} else {
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addr = ConstBufferAddr{
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@@ -725,7 +712,6 @@ void TexturePass(Environment& env, IR::Program& program, const HostTranslateInfo
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env.track_cache.clear();
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TextureInstVector to_replace;
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for (IR::Block* const block : program.post_order_blocks) {
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env.track_cache.clear();
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for (IR::Inst& inst : block->Instructions()) {
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if (!IsTextureInstruction(inst)) {
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continue;
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@@ -38,6 +38,10 @@ enum class TextureType : u32 {
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};
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constexpr u32 NUM_TEXTURE_TYPES = 9;
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/// Constant buffer index marking a texture handle that the shader receives as a vertex attribute
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/// instead of reading it from a constant buffer. The host supplies the handle of each draw run.
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constexpr u32 ATTRIBUTE_HANDLE_CBUF_INDEX = 0xFFFF;
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enum class TexturePixelFormat {
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A8B8G8R8_UNORM,
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A8B8G8R8_SNORM,
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@@ -276,6 +276,9 @@ GraphicsPipeline::GraphicsPipeline(
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num_textures += Shader::NumDescriptors(info->texture_descriptors);
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num_image_elements += Shader::NumDescriptors(info->texture_descriptors);
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num_image_elements += Shader::NumDescriptors(info->image_descriptors);
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for (const auto& desc : info->texture_descriptors) {
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uses_attribute_handle |= desc.cbuf_index == Shader::ATTRIBUTE_HANDLE_CBUF_INDEX;
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}
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num_descriptor_entries += NumDescriptorEntries(*info);
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}
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fragment_has_color0_output = stage_infos[NUM_STAGES - 1].stores_frag_color[0];
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@@ -375,6 +378,9 @@ bool GraphicsPipeline::ConfigureImpl(bool is_indexed) {
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}
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const auto& cbufs{maxwell3d->state.shader_stages[stage].const_buffers};
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const auto read_handle{[&](const auto& desc, u32 index) {
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if (desc.cbuf_index == Shader::ATTRIBUTE_HANDLE_CBUF_INDEX) {
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return TexturePair(attribute_handle, via_header_index);
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}
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ASSERT(cbufs[desc.cbuf_index].enabled);
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const u32 index_offset{index << desc.size_shift};
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const u32 offset{desc.cbuf_offset + index_offset};
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@@ -110,6 +110,16 @@ public:
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return configure_func(this, is_indexed);
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}
|
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/// True when a shader samples a texture whose handle arrives as a vertex attribute.
|
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[[nodiscard]] bool UsesAttributeHandle() const noexcept {
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return uses_attribute_handle;
|
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}
|
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|
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/// Handle bound to those textures by the next Configure.
|
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void SetAttributeHandle(u32 handle) noexcept {
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attribute_handle = handle;
|
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}
|
||||
|
||||
[[nodiscard]] GraphicsPipeline* Next(const GraphicsPipelineCacheKey& current_key) noexcept {
|
||||
if (key == current_key) {
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return this;
|
||||
@@ -168,6 +178,8 @@ private:
|
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u32 num_descriptor_entries{};
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size_t num_image_elements{};
|
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u32 num_textures{};
|
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u32 attribute_handle{};
|
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bool uses_attribute_handle{};
|
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bool fragment_has_color0_output{};
|
||||
|
||||
vk::DescriptorSetLayout descriptor_set_layout;
|
||||
|
||||
@@ -491,6 +491,7 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
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.support_geometry_shader_passthrough = device.IsNvGeometryShaderPassthroughSupported(),
|
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.support_conditional_barrier = device.SupportsConditionalBarriers(),
|
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.single_lane_geometry_subgroups = !profile.SupportsSubgroupStage(Shader::Stage::Geometry),
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.support_attribute_texture_handle = true,
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};
|
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host_info.ApplyDescriptorLimitPolicy();
|
||||
|
||||
|
||||
@@ -248,6 +248,15 @@ void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
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std::scoped_lock lock{buffer_cache.mutex, texture_cache.mutex};
|
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// update engine as channel may be different.
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pipeline->SetEngine(maxwell3d, gpu_memory);
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attribute_handle_pipeline = nullptr;
|
||||
attribute_handle_runs.clear();
|
||||
if (split_attribute_handles && pipeline->UsesAttributeHandle()) {
|
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CollectAttributeHandleRuns(is_indexed);
|
||||
if (!attribute_handle_runs.empty()) {
|
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attribute_handle_pipeline = pipeline;
|
||||
pipeline->SetAttributeHandle(attribute_handle_runs.front().handle);
|
||||
}
|
||||
}
|
||||
if (!pipeline->Configure(is_indexed))
|
||||
return;
|
||||
|
||||
@@ -259,22 +268,110 @@ void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
|
||||
draw_func();
|
||||
}
|
||||
|
||||
void RasterizerVulkan::CollectAttributeHandleRuns(bool is_indexed) {
|
||||
using VertexAttribute = Maxwell::VertexAttribute;
|
||||
const auto& regs = maxwell3d->regs;
|
||||
const auto& draw_state = maxwell3d->draw_manager.draw_state;
|
||||
const u32 total = is_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count;
|
||||
if (total == 0) {
|
||||
return;
|
||||
}
|
||||
// The handle is an integer attribute; sprite batches repeat it on every vertex of a quad.
|
||||
const VertexAttribute* source{};
|
||||
for (const auto& attr : regs.vertex_attrib_format) {
|
||||
if (attr.constant || attr.size == VertexAttribute::Size::Invalid) {
|
||||
continue;
|
||||
}
|
||||
if (attr.type == VertexAttribute::Type::UInt || attr.type == VertexAttribute::Type::SInt) {
|
||||
source = &attr;
|
||||
break;
|
||||
}
|
||||
}
|
||||
const auto& stream = regs.vertex_streams[source ? source->buffer.Value() : 0];
|
||||
if (!source || !stream.IsEnabled()) {
|
||||
attribute_handle_runs.push_back({0, total, 0});
|
||||
return;
|
||||
}
|
||||
// Only plain triangle lists are split; anything else keeps the handle of its first vertex.
|
||||
const u32 primitive_size =
|
||||
draw_state.topology == Maxwell::PrimitiveTopology::Triangles ? 3 : total;
|
||||
const GPUVAddr base_address = stream.Address() + source->offset;
|
||||
const auto read_handle = [&](u32 position) {
|
||||
u32 vertex;
|
||||
if (is_indexed) {
|
||||
const auto& index_buffer = draw_state.index_buffer;
|
||||
const GPUVAddr address =
|
||||
index_buffer.IndexStart() + size_t{position} * index_buffer.FormatSizeInBytes();
|
||||
u32 index{};
|
||||
gpu_memory->ReadBlockUnsafe(address, &index, index_buffer.FormatSizeInBytes());
|
||||
vertex = static_cast<u32>(draw_state.base_index + index);
|
||||
} else {
|
||||
vertex = draw_state.vertex_buffer.first + position;
|
||||
}
|
||||
return gpu_memory->Read<u32>(base_address + static_cast<GPUVAddr>(vertex) * stream.stride);
|
||||
};
|
||||
for (u32 position = 0; position + primitive_size <= total; position += primitive_size) {
|
||||
const u32 handle = read_handle(position);
|
||||
if (!attribute_handle_runs.empty() && attribute_handle_runs.back().handle == handle) {
|
||||
attribute_handle_runs.back().count += primitive_size;
|
||||
} else {
|
||||
attribute_handle_runs.push_back({position, primitive_size, handle});
|
||||
}
|
||||
}
|
||||
if (attribute_handle_runs.empty()) {
|
||||
attribute_handle_runs.push_back({0, total, read_handle(0)});
|
||||
} else {
|
||||
const u32 covered = attribute_handle_runs.back().first + attribute_handle_runs.back().count;
|
||||
if (covered < total) {
|
||||
attribute_handle_runs.back().count += total - covered;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
|
||||
split_attribute_handles = true;
|
||||
SCOPE_EXIT {
|
||||
split_attribute_handles = false;
|
||||
};
|
||||
PrepareDraw(is_indexed, [this, is_indexed, instance_count] {
|
||||
const auto& draw_state = maxwell3d->draw_manager.draw_state;
|
||||
const u32 num_instances{instance_count};
|
||||
const DrawParams draw_params{MakeDrawParams(draw_state, num_instances, is_indexed)};
|
||||
|
||||
scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) {
|
||||
if (draw_params.is_indexed) {
|
||||
cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances,
|
||||
draw_params.first_index, draw_params.base_vertex,
|
||||
draw_params.base_instance);
|
||||
} else {
|
||||
cmdbuf.Draw(draw_params.num_vertices, draw_params.num_instances,
|
||||
draw_params.base_vertex, draw_params.base_instance);
|
||||
const auto record_draw = [this](const DrawParams& params) {
|
||||
scheduler.Record([params](vk::CommandBuffer cmdbuf) {
|
||||
if (params.is_indexed) {
|
||||
cmdbuf.DrawIndexed(params.num_vertices, params.num_instances,
|
||||
params.first_index, params.base_vertex,
|
||||
params.base_instance);
|
||||
} else {
|
||||
cmdbuf.Draw(params.num_vertices, params.num_instances, params.base_vertex,
|
||||
params.base_instance);
|
||||
}
|
||||
});
|
||||
};
|
||||
if (attribute_handle_pipeline && attribute_handle_runs.size() > 1) {
|
||||
// The first run is already configured, each further one binds its own texture.
|
||||
for (size_t i = 0; i < attribute_handle_runs.size(); ++i) {
|
||||
const AttributeHandleRun& run = attribute_handle_runs[i];
|
||||
if (i != 0) {
|
||||
attribute_handle_pipeline->SetAttributeHandle(run.handle);
|
||||
if (!attribute_handle_pipeline->Configure(is_indexed)) {
|
||||
continue;
|
||||
}
|
||||
}
|
||||
DrawParams run_params = draw_params;
|
||||
run_params.num_vertices = run.count;
|
||||
if (is_indexed) {
|
||||
run_params.first_index += run.first;
|
||||
} else {
|
||||
run_params.base_vertex += run.first;
|
||||
}
|
||||
record_draw(run_params);
|
||||
}
|
||||
});
|
||||
} else {
|
||||
record_draw(draw_params);
|
||||
}
|
||||
|
||||
// Log draw call
|
||||
if (GPU::Logging::IsActive() &&
|
||||
|
||||
@@ -157,6 +157,20 @@ private:
|
||||
template <typename Func>
|
||||
void PrepareDraw(bool is_indexed, Func&&);
|
||||
|
||||
/// A stretch of a draw whose vertices all carry the same texture handle.
|
||||
struct AttributeHandleRun {
|
||||
u32 first;
|
||||
u32 count;
|
||||
u32 handle;
|
||||
};
|
||||
|
||||
/// Splits the current draw wherever the texture handle carried in the vertex data changes.
|
||||
void CollectAttributeHandleRuns(bool is_indexed);
|
||||
|
||||
std::vector<AttributeHandleRun> attribute_handle_runs;
|
||||
GraphicsPipeline* attribute_handle_pipeline{};
|
||||
bool split_attribute_handles{};
|
||||
|
||||
void FlushWork();
|
||||
|
||||
void UpdateDynamicStates();
|
||||
|
||||
Reference in New Issue
Block a user