Merge tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.10
Fixes, which might have practical impact, however things were broken for
long enough to justify pushing it regular path:
1. ARM Juno: shorten node names for thermal zones, because Linux drivers
have strict limit of 20 characters.
2. HiSilicon: correct size of GIC GICC address space and add missing
GICH and GICV spaces, add cache info to properly describe cache
topology and solve kernel boot warning.
Several cleanups:
1. Use capital "OR" for multiple licenses in SPDX.
2. Correct white-spaces for code readability.
3. Fix W=1 dtc compiler warnings, which should not have practical
impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and
Spreadtrum like:
- missing unit addresses,
- nodes not belonging to soc node,
- not using generic node names,
- few incorrect unit addresses.
* tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: (28 commits)
arm64: dts: cavium: thunder2-99xx: drop redundant reg-names
arm64: dts: amazon: alpine-v3: correct gic unit addresses
arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses
arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses
arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses
arm64: dts: apm: shadowcat: move non-MMIO node out of soc
arm64: dts: apm: storm: move non-MMIO node out of soc
arm64: dts: cavium: correct unit addresses
arm64: dts: cavium: move non-MMIO node out of soc
arm64: dts: realtek: rtc16xx: add missing unit address to soc node
arm64: dts: realtek: rtd139x: add missing unit address to soc node
arm64: dts: realtek: rtd129x: add missing unit address to soc node
arm64: dts: uniphier: ld20-global: drop audio codec port unit address
arm64: dts: uniphier: ld20-global: use generic node name for audio-codec
arm64: dts: uniphier: ld11-global: drop audio codec port unit address
arm64: dts: uniphier: ld11-global: use generic node name for audio-codec
arm64: dts: sharkl3: add missing unit addresses
arm64: dts: whale2: add missing ap-apb unit address
arm64: dts: sc9860: move GIC to soc node
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -39,6 +39,7 @@
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/ {
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model = "Annapurna Labs Alpine v2";
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compatible = "al,alpine-v2";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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@@ -89,6 +90,22 @@
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clock-frequency = <1000000>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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pmu {
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compatible = "arm,cortex-a57-pmu";
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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@@ -97,22 +114,6 @@
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interrupt-parent = <&gic>;
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ranges;
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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pmu {
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compatible = "arm,cortex-a57-pmu";
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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};
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gic: interrupt-controller@f0200000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0xf0200000 0x0 0x10000>, /* GIC Dist */
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@@ -150,7 +151,7 @@
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al,msi-num-spis = <160>;
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};
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io-fabric {
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io-fabric@fc000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -244,7 +244,7 @@
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next-level-cache = <&cluster3_l2>;
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};
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cluster0_l2: cache@0 {
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cluster0_l2: cache-0 {
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compatible = "cache";
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cache-size = <0x200000>;
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cache-line-size = <64>;
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@@ -253,7 +253,7 @@
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cache-unified;
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};
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cluster1_l2: cache@100 {
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cluster1_l2: cache-100 {
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compatible = "cache";
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cache-size = <0x200000>;
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cache-line-size = <64>;
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@@ -262,7 +262,7 @@
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cache-unified;
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};
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cluster2_l2: cache@200 {
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cluster2_l2: cache-200 {
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compatible = "cache";
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cache-size = <0x200000>;
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cache-line-size = <64>;
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@@ -271,7 +271,7 @@
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cache-unified;
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};
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cluster3_l2: cache@300 {
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cluster3_l2: cache-300 {
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compatible = "cache";
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cache-size = <0x200000>;
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cache-line-size = <64>;
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@@ -318,7 +318,7 @@
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#size-cells = <2>;
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ranges;
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gic: interrupt-controller@f0000000 {
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gic: interrupt-controller@f0800000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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interrupt-controller;
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@@ -361,7 +361,7 @@
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interrupt-parent = <&gic>;
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};
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io-fabric {
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io-fabric@fc000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -1,4 +1,4 @@
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// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Copyright 2020-2023 Advanced Micro Devices, Inc.
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*/
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@@ -1,4 +1,4 @@
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// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Copyright 2020-2022 Advanced Micro Devices, Inc.
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*/
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@@ -1,4 +1,4 @@
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// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Device Tree file for AMD Pensando Elba Board.
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*
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@@ -1,4 +1,4 @@
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// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Copyright 2020-2023 Advanced Micro Devices, Inc.
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*/
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@@ -1,4 +1,4 @@
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// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Copyright 2020-2022 Advanced Micro Devices, Inc.
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*/
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@@ -211,6 +211,13 @@
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};
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};
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refclk: refclk {
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compatible = "fixed-clock";
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#clock-cells = <1>;
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clock-frequency = <100000000>;
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clock-output-names = "refclk";
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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interrupts = <1 12 0xff04>;
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@@ -236,13 +243,6 @@
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#size-cells = <2>;
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ranges;
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refclk: refclk {
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compatible = "fixed-clock";
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#clock-cells = <1>;
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clock-frequency = <100000000>;
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clock-output-names = "refclk";
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};
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pmdpll: pmdpll@170000f0 {
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compatible = "apm,xgene-pcppll-v2-clock";
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#clock-cells = <1>;
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@@ -112,6 +112,13 @@
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interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
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};
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refclk: refclk {
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compatible = "fixed-clock";
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#clock-cells = <1>;
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clock-frequency = <100000000>;
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clock-output-names = "refclk";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 0 0xff08>, /* Secure Phys IRQ */
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@@ -137,12 +144,6 @@
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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refclk: refclk {
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compatible = "fixed-clock";
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#clock-cells = <1>;
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clock-frequency = <100000000>;
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clock-output-names = "refclk";
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};
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pcppll: pcppll@17000100 {
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compatible = "apm,xgene-pcppll-clock";
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@@ -773,14 +773,14 @@
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};
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};
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big_cluster_thermal_zone: big-cluster-thermal {
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big_cluster_thermal_zone: big-cl-thermal {
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polling-delay = <1000>;
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polling-delay-passive = <100>;
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thermal-sensors = <&scpi_sensors0 21>;
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status = "disabled";
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};
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little_cluster_thermal_zone: little-cluster-thermal {
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little_cluster_thermal_zone: little-cl-thermal {
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polling-delay = <1000>;
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polling-delay-passive = <100>;
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thermal-sensors = <&scpi_sensors0 22>;
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@@ -84,11 +84,11 @@
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thermal-sensors = <&scmi_sensors0 3>;
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};
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big-cluster-thermal {
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big-cl-thermal {
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thermal-sensors = <&scmi_sensors0 21>;
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};
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little-cluster-thermal {
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little-cl-thermal {
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thermal-sensors = <&scmi_sensors0 22>;
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};
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@@ -365,20 +365,20 @@
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interrupts = <1 7 4>;
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};
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refclk50mhz: refclk50mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "refclk50mhz";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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refclk50mhz: refclk50mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "refclk50mhz";
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};
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gic0: interrupt-controller@8010,00000000 {
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gic0: interrupt-controller@801000000000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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#address-cells = <2>;
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@@ -397,7 +397,7 @@
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};
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};
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uaa0: serial@87e0,24000000 {
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uaa0: serial@87e024000000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x87e0 0x24000000 0x0 0x1000>;
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interrupts = <1 21 4>;
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@@ -405,7 +405,7 @@
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clock-names = "apb_pclk";
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};
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uaa1: serial@87e0,25000000 {
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uaa1: serial@87e025000000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x87e0 0x25000000 0x0 0x1000>;
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interrupts = <1 22 4>;
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@@ -103,7 +103,6 @@
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/* ECAM at 0x3000_0000 - 0x4000_0000 */
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reg = <0x0 0x30000000 0x0 0x10000000>;
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reg-names = "PCI ECAM";
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/*
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* PCI ranges:
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@@ -31,6 +31,13 @@
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device_type = "cpu";
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reg = <0x0 0x0>;
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enable-method = "psci";
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d-cache-size = <0x8000>; /* 32 KiB */
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d-cache-line-size = <64>;
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d-cache-sets = <128>;
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i-cache-size = <0x8000>; /* 32 KiB */
|
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i-cache-line-size = <64>;
|
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i-cache-sets = <256>;
|
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next-level-cache = <&L2>;
|
||||
};
|
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|
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cpu@1 {
|
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@@ -38,6 +45,13 @@
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x1>;
|
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enable-method = "psci";
|
||||
d-cache-size = <0x8000>; /* 32 KiB */
|
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d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
i-cache-size = <0x8000>; /* 32 KiB */
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
@@ -45,6 +59,13 @@
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x2>;
|
||||
enable-method = "psci";
|
||||
d-cache-size = <0x8000>; /* 32 KiB */
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
i-cache-size = <0x8000>; /* 32 KiB */
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
@@ -52,13 +73,33 @@
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x3>;
|
||||
enable-method = "psci";
|
||||
d-cache-size = <0x8000>; /* 32 KiB */
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
i-cache-size = <0x8000>; /* 32 KiB */
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-unified;
|
||||
cache-size = <0x80000>; /* 512 KiB */
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
cache-level = <2>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@f1001000 {
|
||||
compatible = "arm,gic-400";
|
||||
reg = <0x0 0xf1001000 0x0 0x1000>, /* GICD */
|
||||
<0x0 0xf1002000 0x0 0x100>; /* GICC */
|
||||
<0x0 0xf1002000 0x0 0x2000>, /* GICC */
|
||||
<0x0 0xf1004000 0x0 0x2000>, /* GICH */
|
||||
<0x0 0xf1006000 0x0 0x2000>; /* GICV */
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
|
||||
IRQ_TYPE_LEVEL_HIGH)>;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
|
||||
@@ -48,7 +48,7 @@
|
||||
clock-output-names = "osc27M";
|
||||
};
|
||||
|
||||
soc {
|
||||
soc@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@@ -47,7 +47,7 @@
|
||||
clock-output-names = "osc27M";
|
||||
};
|
||||
|
||||
soc {
|
||||
soc@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@@ -127,7 +127,7 @@
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
soc {
|
||||
soc@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@@ -111,7 +111,7 @@
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
tas5707a@1d {
|
||||
audio-codec@1d {
|
||||
compatible = "ti,tas5711";
|
||||
reg = <0x1d>;
|
||||
reset-gpios = <&gpio UNIPHIER_GPIO_PORT(23, 4) GPIO_ACTIVE_LOW>;
|
||||
@@ -124,7 +124,7 @@
|
||||
PVDD_C-supply = <&_vcc_reg>;
|
||||
PVDD_D-supply = <&_vcc_reg>;
|
||||
|
||||
port@0 {
|
||||
port {
|
||||
tas_speaker: endpoint {
|
||||
dai-format = "i2s";
|
||||
remote-endpoint = <&i2s_hpcmout1>;
|
||||
|
||||
@@ -111,7 +111,7 @@
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
tas5707@1b {
|
||||
audio-codec@1b {
|
||||
compatible = "ti,tas5711";
|
||||
reg = <0x1b>;
|
||||
reset-gpios = <&gpio UNIPHIER_GPIO_PORT(0, 0) GPIO_ACTIVE_LOW>;
|
||||
@@ -124,7 +124,7 @@
|
||||
PVDD_C-supply = <&_vcc_reg>;
|
||||
PVDD_D-supply = <&_vcc_reg>;
|
||||
|
||||
port@0 {
|
||||
port {
|
||||
tas_speaker: endpoint {
|
||||
dai-format = "i2s";
|
||||
remote-endpoint = <&i2s_hpcmout1>;
|
||||
|
||||
@@ -113,7 +113,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
idle-states{
|
||||
idle-states {
|
||||
entry-method = "psci";
|
||||
|
||||
CORE_PD: core_pd {
|
||||
@@ -135,18 +135,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
gic: interrupt-controller@12001000 {
|
||||
compatible = "arm,gic-400";
|
||||
reg = <0 0x12001000 0 0x1000>,
|
||||
<0 0x12002000 0 0x2000>,
|
||||
<0 0x12004000 0 0x2000>,
|
||||
<0 0x12006000 0 0x2000>;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)
|
||||
| IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-0.2";
|
||||
method = "smc";
|
||||
@@ -185,6 +173,18 @@
|
||||
};
|
||||
|
||||
soc {
|
||||
gic: interrupt-controller@12001000 {
|
||||
compatible = "arm,gic-400";
|
||||
reg = <0 0x12001000 0 0x1000>,
|
||||
<0 0x12002000 0 0x2000>,
|
||||
<0 0x12004000 0 0x2000>,
|
||||
<0 0x12006000 0 0x2000>;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)
|
||||
| IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
pmu_gate: pmu-gate {
|
||||
compatible = "sprd,sc9860-pmu-gate";
|
||||
sprd,syscon = <&pmu_regs>; /* 0x402b0000 */
|
||||
@@ -207,7 +207,7 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
aon_prediv: aon-prediv {
|
||||
aon_prediv: aon-prediv@402d0000 {
|
||||
compatible = "sprd,sc9860-aon-prediv";
|
||||
reg = <0 0x402d0000 0 0x400>;
|
||||
clocks = <&ext_26m>, <&pll 0>,
|
||||
@@ -684,33 +684,5 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-volumedown {
|
||||
label = "Volume Down Key";
|
||||
linux,code = <KEY_VOLUMEDOWN>;
|
||||
gpios = <&eic_debounce 2 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <2>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
key-volumeup {
|
||||
label = "Volume Up Key";
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
gpios = <&pmic_eic 10 GPIO_ACTIVE_HIGH>;
|
||||
debounce-interval = <2>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
key-power {
|
||||
label = "Power Key";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&pmic_eic 1 GPIO_ACTIVE_HIGH>;
|
||||
debounce-interval = <2>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -24,7 +24,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x20e00000 0x4000>;
|
||||
|
||||
apahb_gate: apahb-gate {
|
||||
apahb_gate: apahb-gate@0 {
|
||||
compatible = "sprd,sc9863a-apahb-gate";
|
||||
reg = <0x0 0x1020>;
|
||||
#clock-cells = <1>;
|
||||
@@ -39,7 +39,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x402b0000 0x4000>;
|
||||
|
||||
pmu_gate: pmu-gate {
|
||||
pmu_gate: pmu-gate@0 {
|
||||
compatible = "sprd,sc9863a-pmu-gate";
|
||||
reg = <0 0x1200>;
|
||||
clocks = <&ext_26m>;
|
||||
@@ -56,7 +56,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x402e0000 0x4000>;
|
||||
|
||||
aonapb_gate: aonapb-gate {
|
||||
aonapb_gate: aonapb-gate@0 {
|
||||
compatible = "sprd,sc9863a-aonapb-gate";
|
||||
reg = <0 0x1100>;
|
||||
#clock-cells = <1>;
|
||||
@@ -71,7 +71,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40353000 0x3000>;
|
||||
|
||||
pll: pll {
|
||||
pll: pll@0 {
|
||||
compatible = "sprd,sc9863a-pll";
|
||||
reg = <0 0x100>;
|
||||
clocks = <&ext_26m>;
|
||||
@@ -88,7 +88,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40359000 0x3000>;
|
||||
|
||||
mpll: mpll {
|
||||
mpll: mpll@0 {
|
||||
compatible = "sprd,sc9863a-mpll";
|
||||
reg = <0 0x100>;
|
||||
#clock-cells = <1>;
|
||||
@@ -103,7 +103,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x4035c000 0x3000>;
|
||||
|
||||
rpll: rpll {
|
||||
rpll: rpll@0 {
|
||||
compatible = "sprd,sc9863a-rpll";
|
||||
reg = <0 0x100>;
|
||||
clocks = <&ext_26m>;
|
||||
@@ -120,7 +120,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40363000 0x3000>;
|
||||
|
||||
dpll: dpll {
|
||||
dpll: dpll@0 {
|
||||
compatible = "sprd,sc9863a-dpll";
|
||||
reg = <0 0x100>;
|
||||
#clock-cells = <1>;
|
||||
@@ -135,7 +135,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x60800000 0x3000>;
|
||||
|
||||
mm_gate: mm-gate {
|
||||
mm_gate: mm-gate@0 {
|
||||
compatible = "sprd,sc9863a-mm-gate";
|
||||
reg = <0 0x1100>;
|
||||
#clock-cells = <1>;
|
||||
@@ -150,7 +150,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x71300000 0x4000>;
|
||||
|
||||
apapb_gate: apapb-gate {
|
||||
apapb_gate: apapb-gate@0 {
|
||||
compatible = "sprd,sc9863a-apapb-gate";
|
||||
reg = <0 0x1000>;
|
||||
clocks = <&ext_26m>;
|
||||
|
||||
@@ -24,7 +24,7 @@
|
||||
spi0 = &adi_bus;
|
||||
};
|
||||
|
||||
memory{
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0 0x60000000>,
|
||||
<0x1 0x80000000 0 0x60000000>;
|
||||
@@ -34,6 +34,34 @@
|
||||
stdout-path = "serial1:115200n8";
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-volumedown {
|
||||
label = "Volume Down Key";
|
||||
linux,code = <KEY_VOLUMEDOWN>;
|
||||
gpios = <&eic_debounce 2 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <2>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
key-volumeup {
|
||||
label = "Volume Up Key";
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
gpios = <&pmic_eic 10 GPIO_ACTIVE_HIGH>;
|
||||
debounce-interval = <2>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
key-power {
|
||||
label = "Power Key";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&pmic_eic 1 GPIO_ACTIVE_HIGH>;
|
||||
debounce-interval = <2>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
@@ -64,7 +64,7 @@
|
||||
reg = <0 0x70b00000 0 0x40000>;
|
||||
};
|
||||
|
||||
ap-apb {
|
||||
ap-apb@70000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
Reference in New Issue
Block a user