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Merge tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

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Pull "DTS updates for the Gemini on top of the multiplatform base" from Linus Walleij:

- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
  compatible.
- Add the PCI bus host and config to the Gemini device trees.

* tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: add PCI to the Gemini device trees
  ARM: dts: augment Gemini GPIO nodes
  ARM: dts: add power controller to the Gemini DTS
This commit is contained in:
Arnd Bergmann
2017-03-31 12:05:13 +02:00
parent 1b18832977 e3aeca1d74
commit f63c00bcd1
2 changed files with 73 additions and 3 deletions
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22
arch/arm/boot/dts/gemini-sq201.dts
View File

@@ -92,5 +92,27 @@
read-only;
};
};
pci@50000000 {
status = "okay";
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map =
<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
<0x4800 0 0 2 &pci_intc 1>,
<0x4800 0 0 3 &pci_intc 2>,
<0x4800 0 0 4 &pci_intc 3>,
<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
<0x5000 0 0 2 &pci_intc 2>,
<0x5000 0 0 3 &pci_intc 3>,
<0x5000 0 0 4 &pci_intc 0>,
<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
<0x5800 0 0 2 &pci_intc 3>,
<0x5800 0 0 3 &pci_intc 0>,
<0x5800 0 0 4 &pci_intc 1>,
<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
<0x6000 0 0 2 &pci_intc 0>,
<0x6000 0 0 3 &pci_intc 1>,
<0x6000 0 0 4 &pci_intc 2>;
};
};
};

54
arch/arm/boot/dts/gemini.dtsi
View File

@@ -75,8 +75,14 @@
#interrupt-cells = <2>;
};
power-controller@4b000000 {
compatible = "cortina,gemini-power-controller";
reg = <0x4b000000 0x100>;
interrupts = <26 IRQ_TYPE_EDGE_RISING>;
};
gpio0: gpio@4d000000 {
compatible = "cortina,gemini-gpio";
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
reg = <0x4d000000 0x100>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
@@ -86,7 +92,7 @@
};
gpio1: gpio@4e000000 {
compatible = "cortina,gemini-gpio";
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
reg = <0x4e000000 0x100>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
@@ -96,7 +102,7 @@
};
gpio2: gpio@4f000000 {
compatible = "cortina,gemini-gpio";
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
reg = <0x4f000000 0x100>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
@@ -104,5 +110,47 @@
interrupt-controller;
#interrupt-cells = <2>;
};
pci@50000000 {
compatible = "cortina,gemini-pci", "faraday,ftpci100";
/*
* The first 256 bytes in the IO range is actually used
* to configure the host bridge.
*/
reg = <0x50000000 0x100>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
status = "disabled";
bus-range = <0x00 0xff>;
/* PCI ranges mappings */
ranges =
/* 1MiB I/O space 0x50000000-0x500fffff */
<0x01000000 0 0 0x50000000 0 0x00100000>,
/* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
<0x02000000 0 0x58000000 0x58000000 0 0x08000000>;
/* DMA ranges */
dma-ranges =
/* 128MiB at 0x00000000-0x07ffffff */
<0x02000000 0 0x00000000 0x00000000 0 0x08000000>,
/* 64MiB at 0x00000000-0x03ffffff */
<0x02000000 0 0x00000000 0x00000000 0 0x04000000>,
/* 64MiB at 0x00000000-0x03ffffff */
<0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
/*
* This PCI host bridge variant has a cascaded interrupt
* controller embedded in the host bridge.
*/
pci_intc: interrupt-controller {
interrupt-parent = <&intcon>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
};
};