mirror of
https://github.com/zeldaret/tp
synced 2026-06-24 09:41:32 -04:00
most of shieldD revo sdk matching (#2951)
* shieldD revo wpad done * shieldD revo hio2 done * shieldD revo aralt, ppcarch, gf done * shieldD revo exi done * shieldD revo SI done * shieldD revo vi done * shieldD revo mtx done * shieldD revo GX mostly done * shieldD revo ai/dsp done * shieldD revo sc mostly done * shieldD revo esp/euart/wenc mostly done * build fixes
This commit is contained in:
TakaRikka
@@ -70,6 +70,13 @@ extern int __rlwimi(int, int, int, int, int);
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extern void __dcbz(void*, int);
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extern void __sync();
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extern int __abs(int);
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#else
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// to stop clangd errors
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#define __cntlzw
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#define __rlwimi
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#define __dcbz
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#define __sync
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#define __abs
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#endif
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#ifndef __MWERKS__
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@@ -25,21 +25,8 @@ u32 AIGetDMABytesLeft(void);
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u32 AIGetDMAStartAddr(void);
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u32 AIGetDMALength(void);
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BOOL AICheckInit(void);
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AISCallback AIRegisterStreamCallback(AISCallback callback);
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u32 AIGetStreamSampleCount(void);
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void AIResetStreamSampleCount(void);
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void AISetStreamTrigger(u32 trigger);
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u32 AIGetStreamTrigger(void);
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void AISetStreamPlayState(u32 state);
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u32 AIGetStreamPlayState(void);
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void AISetDSPSampleRate(u32 rate);
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u32 AIGetDSPSampleRate(void);
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void AISetStreamSampleRate(u32 rate);
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u32 AIGetStreamSampleRate(void);
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void AISetStreamVolLeft(u8 vol);
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u8 AIGetStreamVolLeft(void);
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void AISetStreamVolRight(u8 vol);
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u8 AIGetStreamVolRight(void);
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void AIInit(u8* stack);
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void AIReset(void);
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@@ -0,0 +1,56 @@
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#ifndef _REVOLUTION_ARALT_H_
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#define _REVOLUTION_ARALT_H_
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#include <revolution/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef void (*ARQCallback)(u32 pointerToARQRequest);
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struct ARQRequest {
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/* 0x00 */ struct ARQRequest *next;
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/* 0x04 */ u32 owner;
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/* 0x08 */ u32 type;
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/* 0x0C */ u32 priority;
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/* 0x10 */ u32 source;
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/* 0x14 */ u32 dest;
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/* 0x18 */ u32 length;
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/* 0x1C */ ARQCallback callback;
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};
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#define ARQ_DMA_ALIGNMENT 32
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#define ARAM_DIR_MRAM_TO_ARAM 0x00
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#define ARAM_DIR_ARAM_TO_MRAM 0x01
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#define ARStartDMARead(mmem, aram, len) \
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ARStartDMA(ARAM_DIR_ARAM_TO_MRAM, mmem, aram, len)
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#define ARStartDMAWrite(mmem, aram, len) \
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ARStartDMA(ARAM_DIR_MRAM_TO_ARAM, mmem, aram, len)
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typedef struct ARQRequest ARQRequest;
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#define ARQ_TYPE_MRAM_TO_ARAM ARAM_DIR_MRAM_TO_ARAM
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#define ARQ_TYPE_ARAM_TO_MRAM ARAM_DIR_ARAM_TO_MRAM
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#define ARQ_PRIORITY_LOW 0
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#define ARQ_PRIORITY_HIGH 1
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// AR
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ARQCallback ARRegisterDMACallback(ARQCallback callback);
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void ARStartDMA(u32 type, u32 mainmem_addr, u32 aram_addr, u32 length);
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u32 ARAlloc(u32 length);
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u32 ARInit(u32* stack_index_addr, u32 num_entries);
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u32 ARGetBaseAddress(void);
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u32 ARGetSize(void);
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// ARQ
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void ARQInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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+11
-11
@@ -1,5 +1,5 @@
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#ifndef ESP_H
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#define ESP_H
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#ifndef _REVOLUTION_ESP_H_
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#define _REVOLUTION_ESP_H_
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#ifdef __cplusplus
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extern "C" {
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@@ -122,17 +122,17 @@ typedef struct {
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s32 ESP_InitLib(void);
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s32 ESP_CloseLib(void);
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s32 ESP_LaunchTitle(u64, ESTicketView*);
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s32 ESP_GetTicketViews(ESTitleId, ESTicketView*, u32*);
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s32 ESP_DiGetTicketView(const void*, ESTicketView*);
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s32 ESP_DiGetTmd(ESTitleMeta*, u32*);
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s32 ESP_GetTmdView(ESTitleId, ESTmdView*, u32*);
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s32 ESP_GetDataDir(ESTitleId, char*);
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s32 ESP_GetTitleId(ESTitleId*);
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s32 ESP_GetConsumption(ESTicketId, ESLpEntry*, u32*);
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s32 ESP_LaunchTitle(u64 titleID, ESTicketView* pTicketView);
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s32 ESP_GetTicketViews(ESTitleId titleId, ESTicketView* ticketViewList, u32* ticketViewCnt);
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s32 ESP_DiGetTicketView(const void* ticket, ESTicketView* ticketView);
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s32 ESP_DiGetTmd(ESTitleMeta* tmd, u32* tmdSize);
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s32 ESP_GetTmdView(ESTitleId titleId, ESTmdView* tmdView, u32* size);
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s32 ESP_GetDataDir(ESTitleId titleId, char* dataDir);
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s32 ESP_GetTitleId(ESTitleId* titleId);
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s32 ESP_GetConsumption(ESTicketId ticketId, ESLpEntry* entries, u32* nEntries);
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#ifdef __cplusplus
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}
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#endif
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#endif // ESP_H
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#endif // _REVOLUTION_ESP_H_
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@@ -0,0 +1,61 @@
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#ifndef _REVOLUTION_EUART_H_
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#define _REVOLUTION_EUART_H_
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#include <revolution/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef int UARTError;
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typedef enum {
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kBaudHWSet = -1,
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kBaud300 = 300,
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kBaud600 = 600,
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kBaud1200 = 1200,
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kBaud1800 = 1800,
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kBaud2000 = 2000,
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kBaud2400 = 2400,
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kBaud3600 = 3600,
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kBaud4800 = 4800,
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kBaud7200 = 7200,
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kBaud9600 = 9600,
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kBaud19200 = 19200,
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kBaud38400 = 38400,
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kBaud57600 = 57600,
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kBaud115200 = 115200,
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kBaud230400 = 230400
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} UARTBaudRate;
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enum {
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kUARTDataError = -1,
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kUARTNoError = 0,
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kUARTUnknownBaudRate,
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kUARTConfigurationError,
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kUARTBufferOverflow,
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kUARTNoData
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};
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typedef enum {
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EUART_ERROR_NONE = 0,
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EUART_ERROR_UNINITIALIZED,
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EUART_ERROR_CANNOT_USE,
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EUART_ERROR_CHANNEL_FULL,
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EUART_ERROR_NOT_FIND,
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EUART_ERROR_INTERNAL,
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EUART_ERROR_INVALID_PARAMETER,
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EUART_ERROR_INVALID_HANDLE,
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EUART_ERROR_COM_OPEN,
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EUART_ERROR_COMM
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} EUARTError;
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UARTError InitializeUART(UARTBaudRate);
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UARTError WriteUARTN(const void *, unsigned long);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -74,6 +74,8 @@ typedef struct EXIControl {
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} queue[3];
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} EXIControl;
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extern const u32 __EXIFreq;
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EXICallback EXISetExiCallback(s32 channel, EXICallback callback);
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void EXIInit(void);
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@@ -96,6 +98,12 @@ int EXISelectSD(s32 chan, u32 dev, u32 freq);
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s32 EXIGetType(s32 chan, u32 dev, u32* type);
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char* EXIGetTypeString(u32 type);
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s32 EXIGetConsoleType(void);
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void EXIWait(void);
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BOOL EXIWriteReg(s32 chan, u32 dev, u32 exiCmd, void* reg, s32 size);
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BOOL EXIReadRam(s32 chan, u32 dev, u32 exiCmd, void* buffer, s32 size, EXICallback callback);
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BOOL EXIWriteRam(s32 chan, u32 dev, u32 exiCmd, void* buffer, s32 size, EXICallback callback);
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#ifdef __cplusplus
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}
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#endif
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@@ -0,0 +1,44 @@
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#ifndef _REVOLUTION_HIO2_H_
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#define _REVOLUTION_HIO2_H_
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#include <revolution/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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HIO2_DEVICE_INVALID = -1,
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HIO2_DEVICE_UNK_0 = 0,
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HIO2_DEVICE_UNK_1 = 1,
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HIO2_DEVICE_UNK_2 = 2,
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} HIO2DeviceType;
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typedef BOOL (*HIO2EnumCallback)(HIO2DeviceType);
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typedef void (*HIO2UnkCallback)(s32);
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typedef void (*HIO2DisconnectCallback)(s32);
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typedef struct HIO2Control {
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/* 0x00 */ HIO2DeviceType type;
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/* 0x04 */ s32 chan;
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/* 0x08 */ u32 _0x8;
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/* 0x0C */ HIO2UnkCallback exiCallback;
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/* 0x10 */ HIO2UnkCallback _0x10;
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/* 0x14 */ HIO2UnkCallback _0x14;
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/* 0x18 */ HIO2DisconnectCallback disconnectCb;
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} HIO2Control; // size 0x1C
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BOOL HIO2Init(void);
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BOOL HIO2EnumDevices(HIO2EnumCallback callback);
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s32 HIO2Open(HIO2DeviceType type, HIO2UnkCallback exiCb, HIO2DisconnectCallback disconnectCb);
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BOOL HIO2Close(s32 handle);
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BOOL HIO2Read(s32 handle, u32 addr, void* buffer, s32 size);
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BOOL HIO2Write(s32 handle, u32 addr, void* buffer, s32 size);
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void HIO2Exit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -9,7 +9,7 @@ volatile u32 __PIRegs[12] AT_ADDRESS(0xCC003000);
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volatile u16 __MEMRegs[64] AT_ADDRESS(0xCC004000);
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volatile u16 __DSPRegs[] AT_ADDRESS(0xCC005000);
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volatile u32 __DIRegs[] AT_ADDRESS(0xCD006000);
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volatile u32 __SIRegs[0x100] AT_ADDRESS(0xCC006400);
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volatile u32 __SIRegs[0x100] AT_ADDRESS(0xCD006400);
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volatile u32 __EXIRegs[0x40] AT_ADDRESS(0xCD006800);
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volatile u32 __AIRegs[8] AT_ADDRESS(0xCD006C00);
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volatile u32 __IPCRegs[4] AT_ADDRESS(0xCD000000);
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@@ -19,7 +19,7 @@ volatile u32 __IPCRegs[4] AT_ADDRESS(0xCD000000);
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#define __MEMRegs ((volatile u16 *)0xCC004000)
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#define __DSPRegs ((volatile u16 *)0xCC005000)
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#define __DIRegs ((volatile u32 *)0xCD006000)
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#define __SIRegs ((volatile u32 *)0xCC006400)
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#define __SIRegs ((volatile u32 *)0xCD006400)
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#define __EXIRegs ((volatile u32 *)0xCD006800)
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#define __AIRegs ((volatile u32 *)0xCD006C00)
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#define __IPCRegs ((volatile u32 *)0xCD000000)
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@@ -0,0 +1,263 @@
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#ifndef GXFDLSHORTCUT_H
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#define GXFDLSHORTCUT_H
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#if __MWERKS__
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#define FAST_GPFLAGSET(line, regOrg, newFlag, regName) \
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do { \
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ASSERTMSGLINE(line, ((u32)(newFlag) & ~((1 << (regName ## _SIZE)) - 1)) == 0, "GX Internal: Register field out of range"); \
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(regOrg) = (u32) __rlwimi((int) (regOrg), \
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(int) (newFlag), \
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(regName ## _SHIFT), \
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(32-(regName ## _SHIFT)-(regName ## _SIZE)), \
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(31-(regName ## _SHIFT))); \
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} while (0)
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#else
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#define FAST_GPFLAGSET(line, regOrg, newFlag, regName)
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#endif
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#define CP_VCD_REG_HI_TEXALL_MASK ((1UL<<CP_VCD_REG_HI_TOTAL_SIZE)-1)
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#define CP_VCD_REG_HI_TEXALL_SHIFT CP_VCD_REG_HI_TEX0_SHIFT
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#define CP_VCD_REG_LO_COLALL_MASK (CP_VCD_REG_LO_COL0_MASK|CP_VCD_REG_LO_COL1_MASK)
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#define CP_VCD_REG_LO_COLALL_SHIFT CP_VCD_REG_LO_COL0_SHIFT
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#define TEV_REGISTERL_R8_SIZE TEV_KREGISTERL_R_SIZE
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#define TEV_REGISTERL_R8_SHIFT TEV_KREGISTERL_R_SHIFT
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#define TEV_REGISTERL_R8_MASK TEV_KREGISTERL_R_MASK
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#define SC_TEV_REGISTERL_SET_R8(line, tev_registerl, r8) \
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FAST_GPFLAGSET(line, tev_registerl, r8, TEV_REGISTERL_R8)
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#define TEV_REGISTERL_A8_SIZE TEV_KREGISTERL_A_SIZE
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#define TEV_REGISTERL_A8_SHIFT TEV_KREGISTERL_A_SHIFT
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#define TEV_REGISTERL_A8_MASK TEV_KREGISTERL_A_MASK
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#define SC_TEV_REGISTERL_SET_A8(line, tev_registerl, a8) \
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FAST_GPFLAGSET(line, tev_registerl, a8, TEV_REGISTERL_A8)
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#define TEV_REGISTERH_B8_SIZE TEV_KREGISTERH_B_SIZE
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#define TEV_REGISTERH_B8_SHIFT TEV_KREGISTERH_B_SHIFT
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#define TEV_REGISTERH_B8_MASK TEV_KREGISTERH_B_MASK
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#define SC_TEV_REGISTERH_SET_B8(line, tev_registerh, b8) \
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FAST_GPFLAGSET(line, tev_registerh, b8, TEV_REGISTERH_B8)
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#define TEV_REGISTERH_G8_SIZE TEV_KREGISTERH_G_SIZE
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#define TEV_REGISTERH_G8_SHIFT TEV_KREGISTERH_G_SHIFT
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#define TEV_REGISTERH_G8_MASK TEV_KREGISTERH_G_MASK
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#define SC_TEV_REGISTERH_SET_G8(line, tev_registerh, g8) \
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FAST_GPFLAGSET(line, tev_registerh, g8, TEV_REGISTERH_G8)
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#define TEV_REGISTERL_R8_SIZE TEV_KREGISTERL_R_SIZE
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#define TEV_REGISTERL_R8_SHIFT TEV_KREGISTERL_R_SHIFT
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#define TEV_REGISTERL_R8_MASK TEV_KREGISTERL_R_MASK
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#define SC_TEV_REGISTERL_SET_R8(line, tev_registerl, r8) \
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FAST_GPFLAGSET(line, tev_registerl, r8, TEV_REGISTERL_R8)
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#define TEV_REGISTERL_A8_SIZE TEV_KREGISTERL_A_SIZE
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#define TEV_REGISTERL_A8_SHIFT TEV_KREGISTERL_A_SHIFT
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#define TEV_REGISTERL_A8_MASK TEV_KREGISTERL_A_MASK
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#define SC_TEV_REGISTERL_SET_A8(line, tev_registerl, a8) \
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FAST_GPFLAGSET(line, tev_registerl, a8, TEV_REGISTERL_A8)
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#define TEV_REGISTERH_B8_SIZE TEV_KREGISTERH_B_SIZE
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#define TEV_REGISTERH_B8_SHIFT TEV_KREGISTERH_B_SHIFT
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#define TEV_REGISTERH_B8_MASK TEV_KREGISTERH_B_MASK
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#define SC_TEV_REGISTERH_SET_B8(line, tev_registerh, b8) \
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FAST_GPFLAGSET(line, tev_registerh, b8, TEV_REGISTERH_B8)
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#define TEV_REGISTERH_G8_SIZE TEV_KREGISTERH_G_SIZE
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#define TEV_REGISTERH_G8_SHIFT TEV_KREGISTERH_G_SHIFT
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#define TEV_REGISTERH_G8_MASK TEV_KREGISTERH_G_MASK
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#define SC_TEV_REGISTERH_SET_G8(line, tev_registerh, g8) \
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FAST_GPFLAGSET(line, tev_registerh, g8, TEV_REGISTERH_G8)
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#define XF_AMBIENT0_F_RGBA_SIZE \
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((XF_AMBIENT0_F_ALPHA_SIZE)+(XF_AMBIENT0_F_BLUE_SIZE)+ \
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(XF_AMBIENT0_F_GREEN_SIZE)+(XF_AMBIENT0_F_RED_SIZE))
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#define XF_AMBIENT0_F_RGBA_SHIFT \
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XF_AMBIENT0_F_ALPHA_SHIFT
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#define XF_AMBIENT0_F_RGBA_MASK \
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((XF_AMBIENT0_F_ALPHA_MASK)|(XF_AMBIENT0_F_BLUE_MASK)| \
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(XF_AMBIENT0_F_GREEN_MASK)|(XF_AMBIENT0_F_RED_MASK))
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#define SC_XF_AMBIENT0_F_SET_RGBA(xf_ambient0_f, rgba) { \
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xf_ambient0_f = (((unsigned long)(xf_ambient0_f)) & ~XF_AMBIENT0_F_RGBA_MASK) | (((unsigned long)(rgba)) << XF_AMBIENT0_F_RGBA_SHIFT);\
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}
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#define XF_AMBIENT0_F_ALPHA_SIZE 8
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#define XF_AMBIENT0_F_ALPHA_SHIFT 0
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#define XF_AMBIENT0_F_ALPHA_MASK 0x000000ff
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#define XF_AMBIENT0_F_GET_ALPHA(xf_ambient0_f) \
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((((unsigned long)(xf_ambient0_f)) & XF_AMBIENT0_F_ALPHA_MASK) >> XF_AMBIENT0_F_ALPHA_SHIFT)
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#define XF_AMBIENT0_F_SET_ALPHA(xf_ambient0_f, alpha) { \
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xf_ambient0_f = (((unsigned long)(xf_ambient0_f)) & ~XF_AMBIENT0_F_ALPHA_MASK) | (((unsigned long)(alpha)) << XF_AMBIENT0_F_ALPHA_SHIFT);\
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}
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#define XF_AMBIENT0_F_BLUE_SIZE 8
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#define XF_AMBIENT0_F_BLUE_SHIFT 8
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#define XF_AMBIENT0_F_BLUE_MASK 0x0000ff00
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#define XF_AMBIENT0_F_GET_BLUE(xf_ambient0_f) \
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((((unsigned long)(xf_ambient0_f)) & XF_AMBIENT0_F_BLUE_MASK) >> XF_AMBIENT0_F_BLUE_SHIFT)
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#define XF_AMBIENT0_F_SET_BLUE(xf_ambient0_f, blue) { \
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xf_ambient0_f = (((unsigned long)(xf_ambient0_f)) & ~XF_AMBIENT0_F_BLUE_MASK) | (((unsigned long)(blue)) << XF_AMBIENT0_F_BLUE_SHIFT);\
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}
|
||||
#define XF_AMBIENT0_F_GREEN_SIZE 8
|
||||
#define XF_AMBIENT0_F_GREEN_SHIFT 16
|
||||
#define XF_AMBIENT0_F_GREEN_MASK 0x00ff0000
|
||||
#define XF_AMBIENT0_F_GET_GREEN(xf_ambient0_f) \
|
||||
((((unsigned long)(xf_ambient0_f)) & XF_AMBIENT0_F_GREEN_MASK) >> XF_AMBIENT0_F_GREEN_SHIFT)
|
||||
#define XF_AMBIENT0_F_SET_GREEN(xf_ambient0_f, green) { \
|
||||
xf_ambient0_f = (((unsigned long)(xf_ambient0_f)) & ~XF_AMBIENT0_F_GREEN_MASK) | (((unsigned long)(green)) << XF_AMBIENT0_F_GREEN_SHIFT);\
|
||||
}
|
||||
#define XF_AMBIENT0_F_RED_SIZE 8
|
||||
#define XF_AMBIENT0_F_RED_SHIFT 24
|
||||
#define XF_AMBIENT0_F_RED_MASK 0xff000000
|
||||
#define XF_AMBIENT0_F_GET_RED(xf_ambient0_f) \
|
||||
((((unsigned long)(xf_ambient0_f)) & XF_AMBIENT0_F_RED_MASK) >> XF_AMBIENT0_F_RED_SHIFT)
|
||||
#define XF_AMBIENT0_F_SET_RED(xf_ambient0_f, red) { \
|
||||
xf_ambient0_f = (((unsigned long)(xf_ambient0_f)) & ~XF_AMBIENT0_F_RED_MASK) | (((unsigned long)(red)) << XF_AMBIENT0_F_RED_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_AMBIENT0_F_RGB_SIZE \
|
||||
((XF_AMBIENT0_F_BLUE_SIZE)+(XF_AMBIENT0_F_GREEN_SIZE)+(XF_AMBIENT0_F_RED_SIZE))
|
||||
#define XF_AMBIENT0_F_RGB_SHIFT \
|
||||
XF_AMBIENT0_F_BLUE_SHIFT
|
||||
#define XF_AMBIENT0_F_RGB_MASK \
|
||||
((XF_AMBIENT0_F_BLUE_MASK)|(XF_AMBIENT0_F_GREEN_MASK)|(XF_AMBIENT0_F_RED_MASK))
|
||||
|
||||
#define SC_XF_AMBIENT0_F_SET_RGB(line, xf_ambient0_f, rgb) \
|
||||
FAST_GPFLAGSET(line, xf_ambient0_f, rgb, XF_AMBIENT0_F_RGB)
|
||||
|
||||
#define XF_AMBIENT1_F_RGBA_SIZE \
|
||||
((XF_AMBIENT1_F_ALPHA_SIZE)+(XF_AMBIENT1_F_BLUE_SIZE)+ \
|
||||
(XF_AMBIENT1_F_GREEN_SIZE)+(XF_AMBIENT1_F_RED_SIZE))
|
||||
#define XF_AMBIENT1_F_RGBA_SHIFT \
|
||||
XF_AMBIENT1_F_ALPHA_SHIFT
|
||||
#define XF_AMBIENT1_F_RGBA_MASK \
|
||||
((XF_AMBIENT1_F_ALPHA_MASK)|(XF_AMBIENT1_F_BLUE_MASK)| \
|
||||
(XF_AMBIENT1_F_GREEN_MASK)|(XF_AMBIENT1_F_RED_MASK))
|
||||
#define SC_XF_AMBIENT1_F_SET_RGBA(xf_ambient1_f, rgba) { \
|
||||
xf_ambient1_f = (((unsigned long)(xf_ambient1_f)) & ~XF_AMBIENT1_F_RGBA_MASK) | (((unsigned long)(rgba)) << XF_AMBIENT1_F_RGBA_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_AMBIENT1_F_ALPHA_SIZE 8
|
||||
#define XF_AMBIENT1_F_ALPHA_SHIFT 0
|
||||
#define XF_AMBIENT1_F_ALPHA_MASK 0x000000ff
|
||||
#define XF_AMBIENT1_F_GET_ALPHA(xf_ambient1_f) \
|
||||
((((unsigned long)(xf_ambient1_f)) & XF_AMBIENT1_F_ALPHA_MASK) >> XF_AMBIENT1_F_ALPHA_SHIFT)
|
||||
#define XF_AMBIENT1_F_SET_ALPHA(xf_ambient1_f, alpha) { \
|
||||
xf_ambient1_f = (((unsigned long)(xf_ambient1_f)) & ~XF_AMBIENT1_F_ALPHA_MASK) | (((unsigned long)(alpha)) << XF_AMBIENT1_F_ALPHA_SHIFT);\
|
||||
}
|
||||
#define XF_AMBIENT1_F_BLUE_SIZE 8
|
||||
#define XF_AMBIENT1_F_BLUE_SHIFT 8
|
||||
#define XF_AMBIENT1_F_BLUE_MASK 0x0000ff00
|
||||
#define XF_AMBIENT1_F_GET_BLUE(xf_ambient1_f) \
|
||||
((((unsigned long)(xf_ambient1_f)) & XF_AMBIENT1_F_BLUE_MASK) >> XF_AMBIENT1_F_BLUE_SHIFT)
|
||||
#define XF_AMBIENT1_F_SET_BLUE(xf_ambient1_f, blue) { \
|
||||
xf_ambient1_f = (((unsigned long)(xf_ambient1_f)) & ~XF_AMBIENT1_F_BLUE_MASK) | (((unsigned long)(blue)) << XF_AMBIENT1_F_BLUE_SHIFT);\
|
||||
}
|
||||
#define XF_AMBIENT1_F_GREEN_SIZE 8
|
||||
#define XF_AMBIENT1_F_GREEN_SHIFT 16
|
||||
#define XF_AMBIENT1_F_GREEN_MASK 0x00ff0000
|
||||
#define XF_AMBIENT1_F_GET_GREEN(xf_ambient1_f) \
|
||||
((((unsigned long)(xf_ambient1_f)) & XF_AMBIENT1_F_GREEN_MASK) >> XF_AMBIENT1_F_GREEN_SHIFT)
|
||||
#define XF_AMBIENT1_F_SET_GREEN(xf_ambient1_f, green) { \
|
||||
xf_ambient1_f = (((unsigned long)(xf_ambient1_f)) & ~XF_AMBIENT1_F_GREEN_MASK) | (((unsigned long)(green)) << XF_AMBIENT1_F_GREEN_SHIFT);\
|
||||
}
|
||||
#define XF_AMBIENT1_F_RED_SIZE 8
|
||||
#define XF_AMBIENT1_F_RED_SHIFT 24
|
||||
#define XF_AMBIENT1_F_RED_MASK 0xff000000
|
||||
#define XF_AMBIENT1_F_GET_RED(xf_ambient1_f) \
|
||||
((((unsigned long)(xf_ambient1_f)) & XF_AMBIENT1_F_RED_MASK) >> XF_AMBIENT1_F_RED_SHIFT)
|
||||
#define XF_AMBIENT1_F_SET_RED(xf_ambient1_f, red) { \
|
||||
xf_ambient1_f = (((unsigned long)(xf_ambient1_f)) & ~XF_AMBIENT1_F_RED_MASK) | (((unsigned long)(red)) << XF_AMBIENT1_F_RED_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_AMBIENT1_F_RGB_SIZE \
|
||||
((XF_AMBIENT1_F_BLUE_SIZE)+(XF_AMBIENT1_F_GREEN_SIZE)+(XF_AMBIENT1_F_RED_SIZE))
|
||||
#define XF_AMBIENT1_F_RGB_SHIFT \
|
||||
XF_AMBIENT1_F_BLUE_SHIFT
|
||||
#define XF_AMBIENT1_F_RGB_MASK \
|
||||
((XF_AMBIENT1_F_BLUE_MASK)|(XF_AMBIENT1_F_GREEN_MASK)|(XF_AMBIENT1_F_RED_MASK))
|
||||
#define SC_XF_AMBIENT1_F_SET_RGB(line, xf_ambient1_f, rgb) \
|
||||
FAST_GPFLAGSET(line, xf_ambient1_f, rgb, XF_AMBIENT1_F_RGB)
|
||||
|
||||
#define XF_MATERIAL0_F_RGBA_SIZE \
|
||||
((XF_MATERIAL0_F_ALPHA_SIZE)+(XF_MATERIAL0_F_BLUE_SIZE)+ \
|
||||
(XF_MATERIAL0_F_GREEN_SIZE)+(XF_MATERIAL0_F_RED_SIZE))
|
||||
#define XF_MATERIAL0_F_RGBA_SHIFT \
|
||||
XF_MATERIAL0_F_ALPHA_SHIFT
|
||||
#define XF_MATERIAL0_F_RGBA_MASK \
|
||||
((XF_MATERIAL0_F_ALPHA_MASK)|(XF_MATERIAL0_F_BLUE_MASK)| \
|
||||
(XF_MATERIAL0_F_GREEN_MASK)|(XF_MATERIAL0_F_RED_MASK))
|
||||
#define SC_XF_MATERIAL0_F_SET_RGBA(xf_material0_f, rgba) { \
|
||||
xf_material0_f = (((unsigned long)(xf_material0_f)) & ~XF_MATERIAL0_F_RGBA_MASK) | (((unsigned long)(rgba)) << XF_MATERIAL0_F_RGBA_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_MATERIAL0_F_RGBA_SIZE \
|
||||
((XF_MATERIAL0_F_ALPHA_SIZE)+(XF_MATERIAL0_F_BLUE_SIZE)+ \
|
||||
(XF_MATERIAL0_F_GREEN_SIZE)+(XF_MATERIAL0_F_RED_SIZE))
|
||||
#define XF_MATERIAL0_F_RGBA_SHIFT \
|
||||
XF_MATERIAL0_F_ALPHA_SHIFT
|
||||
#define XF_MATERIAL0_F_RGBA_MASK \
|
||||
((XF_MATERIAL0_F_ALPHA_MASK)|(XF_MATERIAL0_F_BLUE_MASK)| \
|
||||
(XF_MATERIAL0_F_GREEN_MASK)|(XF_MATERIAL0_F_RED_MASK))
|
||||
|
||||
#define XF_MATERIAL0_F_RGB_SIZE \
|
||||
((XF_MATERIAL0_F_BLUE_SIZE)+(XF_MATERIAL0_F_GREEN_SIZE)+(XF_MATERIAL0_F_RED_SIZE))
|
||||
#define XF_MATERIAL0_F_RGB_SHIFT \
|
||||
XF_MATERIAL0_F_BLUE_SHIFT
|
||||
#define XF_MATERIAL0_F_RGB_MASK \
|
||||
((XF_MATERIAL0_F_BLUE_MASK)|(XF_MATERIAL0_F_GREEN_MASK)|(XF_MATERIAL0_F_RED_MASK))
|
||||
#define SC_XF_MATERIAL0_F_SET_RGB(line, xf_material0_f, rgb) \
|
||||
FAST_GPFLAGSET(line, xf_material0_f, rgb, XF_MATERIAL0_F_RGB)
|
||||
|
||||
#define XF_MATERIAL0_F_RGB_SIZE \
|
||||
((XF_MATERIAL0_F_BLUE_SIZE)+(XF_MATERIAL0_F_GREEN_SIZE)+(XF_MATERIAL0_F_RED_SIZE))
|
||||
#define XF_MATERIAL0_F_RGB_SHIFT \
|
||||
XF_MATERIAL0_F_BLUE_SHIFT
|
||||
#define XF_MATERIAL0_F_RGB_MASK \
|
||||
((XF_MATERIAL0_F_BLUE_MASK)|(XF_MATERIAL0_F_GREEN_MASK)|(XF_MATERIAL0_F_RED_MASK))
|
||||
#define SC_XF_MATERIAL0_F_SET_RGB(line, xf_material0_f, rgb) \
|
||||
FAST_GPFLAGSET(line, xf_material0_f, rgb, XF_MATERIAL0_F_RGB)
|
||||
|
||||
#define XF_MATERIAL1_F_RGBA_SIZE \
|
||||
((XF_MATERIAL1_F_ALPHA_SIZE)+(XF_MATERIAL1_F_BLUE_SIZE)+ \
|
||||
(XF_MATERIAL1_F_GREEN_SIZE)+(XF_MATERIAL1_F_RED_SIZE))
|
||||
#define XF_MATERIAL1_F_RGBA_SHIFT \
|
||||
XF_MATERIAL1_F_ALPHA_SHIFT
|
||||
#define XF_MATERIAL1_F_RGBA_MASK \
|
||||
((XF_MATERIAL1_F_ALPHA_MASK)|(XF_MATERIAL1_F_BLUE_MASK)| \
|
||||
(XF_MATERIAL1_F_GREEN_MASK)|(XF_MATERIAL1_F_RED_MASK))
|
||||
#define SC_XF_MATERIAL1_F_SET_RGBA(xf_material1_f, rgba) { \
|
||||
xf_material1_f = (((unsigned long)(xf_material1_f)) & ~XF_MATERIAL1_F_RGBA_MASK) | (((unsigned long)(rgba)) << XF_MATERIAL1_F_RGBA_SHIFT);\
|
||||
}
|
||||
|
||||
|
||||
#define XF_MATERIAL1_F_RGB_SIZE \
|
||||
((XF_MATERIAL1_F_BLUE_SIZE)+(XF_MATERIAL1_F_GREEN_SIZE)+(XF_MATERIAL1_F_RED_SIZE))
|
||||
#define XF_MATERIAL1_F_RGB_SHIFT \
|
||||
XF_MATERIAL1_F_BLUE_SHIFT
|
||||
#define XF_MATERIAL1_F_RGB_MASK \
|
||||
((XF_MATERIAL1_F_BLUE_MASK)|(XF_MATERIAL1_F_GREEN_MASK)|(XF_MATERIAL1_F_RED_MASK))
|
||||
#define SC_XF_MATERIAL1_F_SET_RGB(line, xf_material1_f, rgb) \
|
||||
FAST_GPFLAGSET(line, xf_material1_f, rgb, XF_MATERIAL1_F_RGB)
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT0123_SIZE \
|
||||
((XF_COLOR0CNTRL_F_LIGHT0_SIZE)+(XF_COLOR0CNTRL_F_LIGHT1_SIZE)+ \
|
||||
(XF_COLOR0CNTRL_F_LIGHT2_SIZE)+(XF_COLOR0CNTRL_F_LIGHT3_SIZE))
|
||||
#define XF_COLOR0CNTRL_F_LIGHT0123_SHIFT \
|
||||
XF_COLOR0CNTRL_F_LIGHT0_SHIFT
|
||||
#define XF_COLOR0CNTRL_F_LIGHT0123_MASK \
|
||||
((XF_COLOR0CNTRL_F_LIGHT0_MASK)|(XF_COLOR0CNTRL_F_LIGHT1_MASK)| \
|
||||
(XF_COLOR0CNTRL_F_LIGHT2_MASK)|(XF_COLOR0CNTRL_F_LIGHT3_MASK))
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT0123(line, xf_color0cntrl_f, light0123) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f, light0123, XF_COLOR0CNTRL_F_LIGHT0123)
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT4567_SIZE \
|
||||
((XF_COLOR0CNTRL_F_LIGHT4_SIZE)+(XF_COLOR0CNTRL_F_LIGHT5_SIZE)+ \
|
||||
(XF_COLOR0CNTRL_F_LIGHT6_SIZE)+(XF_COLOR0CNTRL_F_LIGHT7_SIZE))
|
||||
#define XF_COLOR0CNTRL_F_LIGHT4567_SHIFT \
|
||||
XF_COLOR0CNTRL_F_LIGHT4_SHIFT
|
||||
#define XF_COLOR0CNTRL_F_LIGHT4567_MASK \
|
||||
((XF_COLOR0CNTRL_F_LIGHT4_MASK)|(XF_COLOR0CNTRL_F_LIGHT5_MASK)| \
|
||||
(XF_COLOR0CNTRL_F_LIGHT6_MASK)|(XF_COLOR0CNTRL_F_LIGHT7_MASK))
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT4567(line, xf_color0cntrl_f, light4567) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f, light4567, XF_COLOR0CNTRL_F_LIGHT4567)
|
||||
|
||||
#endif // GXFDLSHORTCUT_H
|
||||
@@ -0,0 +1,186 @@
|
||||
#ifndef GXREGS_H
|
||||
#define GXREGS_H
|
||||
|
||||
#include <revolution/gx.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <revolution/private/bp_reg.h>
|
||||
#include <revolution/private/cp_reg.h>
|
||||
#include <revolution/private/gen_reg.h>
|
||||
#include <revolution/private/pe_reg.h>
|
||||
#include <revolution/private/pi_reg.h>
|
||||
#include <revolution/private/ras_reg.h>
|
||||
#include <revolution/private/su_reg.h>
|
||||
#include <revolution/private/tev_reg.h>
|
||||
#include <revolution/private/tx_reg.h>
|
||||
#include <revolution/private/xf_mem.h>
|
||||
|
||||
extern volatile void* __piReg;
|
||||
extern volatile void* __cpReg;
|
||||
extern volatile void* __peReg;
|
||||
extern volatile void* __memReg;
|
||||
|
||||
#define MEM_PE_REQCOUNTH_IDX 0x27
|
||||
#define MEM_PE_REQCOUNTL_IDX 0x28
|
||||
|
||||
/* GX fifo write helpers */
|
||||
|
||||
#define GX_WRITE_U8(ub) \
|
||||
GXWGFifo.u8 = (u8)(ub)
|
||||
|
||||
#define GX_WRITE_U16(us) \
|
||||
GXWGFifo.u16 = (u16)(us)
|
||||
|
||||
#define GX_WRITE_U32(ui) \
|
||||
GXWGFifo.u32 = (u32)(ui)
|
||||
|
||||
#define GX_WRITE_F32(f) \
|
||||
GXWGFifo.f32 = (f32)(f);
|
||||
|
||||
|
||||
#define GX_PI_REG_WRITE_U32(a, d) *(vu32*)((vu8*)__piReg + (a)) = (u32)(d)
|
||||
|
||||
#define GX_PI_REG_READ_U32(a) *(vu32*)((vu8*)__piReg + (a))
|
||||
|
||||
#define GX_CP_REG_WRITE_U16(a, d) *(vu16*)((vu16*)__cpReg + (a)) = (u16)(d)
|
||||
|
||||
#define GX_CP_REG_READ_U16(a) *(vu16*)((vu16*)__cpReg + (a))
|
||||
|
||||
#define GX_CP_REG_WRITE_U32(a, d) *(vu32*)((vu16*)__cpReg + (a)) = (u32)(d)
|
||||
|
||||
#define GX_CP_REG_READ_U32(a) *(vu32*)((vu16*)__cpReg + (a))
|
||||
|
||||
#define GX_MEM_REG_WRITE_U16(a, d) *(vu16*)((vu16*)__memReg + (a)) = (u16)(d)
|
||||
|
||||
#define GX_MEM_REG_READ_U16(a) *(vu16*)((vu16*)__memReg + (a))
|
||||
|
||||
#define GX_PE_REG_WRITE_U16(a, d) *(vu16*)((vu16*)__peReg + (a)) = (u16)(d)
|
||||
|
||||
#define GX_PE_REG_READ_U16(a) *(vu16*)((vu16*)__peReg + (a))
|
||||
|
||||
#define GX_CP_IDLE_REG_READ_U16(a) GX_CP_REG_READ_U16(a)
|
||||
|
||||
#define GX_PI_REG_WRITE_U32(a, d) *(vu32*)((vu8*)__piReg + (a)) = (u32)(d)
|
||||
|
||||
#define GX_PI_REG_READ_U32(a) *(vu32*)((vu8*)__piReg + (a))
|
||||
|
||||
#define GX_CP_REG_WRITE_U16(a, d) *(vu16*)((vu16*)__cpReg + (a)) = (u16)(d)
|
||||
|
||||
#define GX_CP_REG_READ_U16(a) *(vu16*)((vu16*)__cpReg + (a))
|
||||
|
||||
#define GX_CP_REG_WRITE_U32(a, d) *(vu32*)((vu16*)__cpReg + (a)) = (u32)(d)
|
||||
|
||||
#define GX_CP_REG_READ_U32(a) *(vu32*)((vu16*)__cpReg + (a))
|
||||
|
||||
#define GX_MEM_REG_WRITE_U16(a, d) *(vu16*)((vu16*)__memReg + (a)) = (u16)(d)
|
||||
|
||||
#define GX_MEM_REG_READ_U16(a) *(vu16*)((vu16*)__memReg + (a))
|
||||
|
||||
#define GX_PE_REG_WRITE_U16(a, d) *(vu16*)((vu16*)__peReg + (a)) = (u16)(d)
|
||||
|
||||
#define GX_PE_REG_READ_U16(a) *(vu16*)((vu16*)__peReg + (a))
|
||||
|
||||
#define GX_CP_IDLE_REG_READ_U16(a) GX_CP_REG_READ_U16(a)
|
||||
|
||||
#define GX_WRITE_CP_STRM_REG(addr, vtxfmt, data) \
|
||||
{ \
|
||||
GX_WRITE_U8(CP_OPCODE(0, 1)); \
|
||||
GX_WRITE_U8(CP_STREAM_REG((vtxfmt), (addr))); \
|
||||
GX_WRITE_U32((data)); \
|
||||
}
|
||||
|
||||
// needed to match some places
|
||||
#define GX_WRITE_CP_STRM_REG_alt(addr, vtxfmt, data, rAddr) \
|
||||
{ \
|
||||
s32 regAddr; \
|
||||
GX_WRITE_U8(CP_OPCODE(0, 1)); \
|
||||
GX_WRITE_U8(CP_STREAM_REG((vtxfmt), (addr))); \
|
||||
GX_WRITE_U32((data)); \
|
||||
regAddr = rAddr; \
|
||||
}
|
||||
|
||||
// needed to match some places
|
||||
#if DEBUG
|
||||
#define GX_WRITE_CP_STRM_REG_alt2(addr, vtxfmt, data, rAddr) \
|
||||
{ \
|
||||
s32 regAddr; \
|
||||
GX_WRITE_U8(CP_OPCODE(0, 1)); \
|
||||
GX_WRITE_U8(CP_STREAM_REG((vtxfmt), (addr))); \
|
||||
GX_WRITE_U32((data)); \
|
||||
regAddr = rAddr; \
|
||||
if (regAddr >= 0 && regAddr < 4) { \
|
||||
__GXData->indexBase[regAddr] = data; \
|
||||
} \
|
||||
}
|
||||
#else
|
||||
#define GX_WRITE_CP_STRM_REG_alt2(addr, vtxfmt, data, rAddr) GX_WRITE_CP_STRM_REG(addr, vtxfmt, data)
|
||||
#endif
|
||||
|
||||
// needed to match some places
|
||||
#if DEBUG
|
||||
#define GX_WRITE_CP_STRM_REG_alt3(addr, vtxfmt, data, rAddr) \
|
||||
{ \
|
||||
s32 regAddr; \
|
||||
GX_WRITE_U8(CP_OPCODE(0, 1)); \
|
||||
GX_WRITE_U8(CP_STREAM_REG((vtxfmt), (addr))); \
|
||||
GX_WRITE_U32((data)); \
|
||||
regAddr = rAddr; \
|
||||
if (regAddr >= 0 && regAddr < 4) { \
|
||||
__GXData->indexStride[regAddr] = data; \
|
||||
} \
|
||||
}
|
||||
#else
|
||||
#define GX_WRITE_CP_STRM_REG_alt3(addr, vtxfmt, data, rAddr) GX_WRITE_CP_STRM_REG(addr, vtxfmt, data)
|
||||
#endif
|
||||
|
||||
#define GX_WRITE_XF_REG(addr, data, cnt) \
|
||||
{ \
|
||||
GX_WRITE_U8(CP_OPCODE(0, 0x2)); \
|
||||
GX_WRITE_U32(CP_XF_LOADREGS((addr), (cnt))); \
|
||||
GX_WRITE_U32((data)); \
|
||||
VERIF_XF_REG(addr, data); \
|
||||
}
|
||||
|
||||
#define GX_WRITE_XF_MEM_U32(addr, data) GX_WRITE_U32(data)
|
||||
#define GX_WRITE_XF_MEM_F32(addr, data) GX_WRITE_F32(data)
|
||||
|
||||
#define GX_WRITE_RA_REG(reg) \
|
||||
{ \
|
||||
GX_WRITE_U8(CP_OPCODE(1, 0xC)); \
|
||||
GX_WRITE_U32((reg)); \
|
||||
VERIF_RAS_REG(reg); \
|
||||
}
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#define GX_DEFINE_GX_READ_COUNTER(unit) \
|
||||
inline u32 __GXRead##unit##CounterU32(u32 regAddrL, u32 regAddrH) { \
|
||||
u32 ctrH0, ctrH1, ctrL; \
|
||||
ctrH0 = GX_##unit##_REG_READ_U16(regAddrH); \
|
||||
do { \
|
||||
ctrH1 = ctrH0; \
|
||||
ctrL = GX_##unit##_REG_READ_U16(regAddrL); \
|
||||
ctrH0 = GX_##unit##_REG_READ_U16(regAddrH); \
|
||||
} while (ctrH0 != ctrH1); \
|
||||
return ((ctrH0 << 16) | ctrL); \
|
||||
}
|
||||
#else
|
||||
#define GX_DEFINE_GX_READ_COUNTER(unit)
|
||||
#endif
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#define FAST_FLAG_SET(regOrg, newFlag, shift, size) \
|
||||
do { \
|
||||
(regOrg) = (u32)__rlwimi((int)(regOrg), (int)(newFlag), (shift), (32 - (shift) - (size)), (31 - (shift))); \
|
||||
} while (0);
|
||||
#else
|
||||
#define FAST_FLAG_SET(regOrg, newFlag, shift, size)
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // GXREGS_H
|
||||
@@ -0,0 +1,229 @@
|
||||
#ifndef BP_REG_H
|
||||
#define BP_REG_H
|
||||
|
||||
#include <revolution/private/GXFDLShortcut.h>
|
||||
|
||||
#define BP_IMASK_RID_SIZE 8
|
||||
#define BP_IMASK_RID_SHIFT 24
|
||||
#define BP_IMASK_RID_MASK 0xff000000
|
||||
#define BP_IMASK_GET_RID(bp_imask) \
|
||||
((((unsigned long)(bp_imask)) & BP_IMASK_RID_MASK) >> BP_IMASK_RID_SHIFT)
|
||||
|
||||
#define BP_CMD_BT_SIZE 2
|
||||
#define BP_CMD_BT_SHIFT 0
|
||||
#define BP_CMD_BT_MASK 0x00000003
|
||||
#define BP_CMD_GET_BT(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_BT_MASK) >> BP_CMD_BT_SHIFT)
|
||||
|
||||
#define BP_CMD_FMT_SIZE 2
|
||||
#define BP_CMD_FMT_SHIFT 2
|
||||
#define BP_CMD_FMT_MASK 0x0000000c
|
||||
#define BP_CMD_GET_FMT(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_FMT_MASK) >> BP_CMD_FMT_SHIFT)
|
||||
|
||||
#define BP_CMD_BIAS_SIZE 3
|
||||
#define BP_CMD_BIAS_SHIFT 4
|
||||
#define BP_CMD_BIAS_MASK 0x00000070
|
||||
#define BP_CMD_GET_BIAS(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_BIAS_MASK) >> BP_CMD_BIAS_SHIFT)
|
||||
|
||||
#define BP_CMD_BS_SIZE 2
|
||||
#define BP_CMD_BS_SHIFT 7
|
||||
#define BP_CMD_BS_MASK 0x00000180
|
||||
#define BP_CMD_GET_BS(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_BS_MASK) >> BP_CMD_BS_SHIFT)
|
||||
|
||||
#define BP_CMD_M_SIZE 4
|
||||
#define BP_CMD_M_SHIFT 9
|
||||
#define BP_CMD_M_MASK 0x00001e00
|
||||
#define BP_CMD_GET_M(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_M_MASK) >> BP_CMD_M_SHIFT)
|
||||
|
||||
#define BP_CMD_SW_SIZE 3
|
||||
#define BP_CMD_SW_SHIFT 13
|
||||
#define BP_CMD_SW_MASK 0x0000e000
|
||||
#define BP_CMD_GET_SW(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_SW_MASK) >> BP_CMD_SW_SHIFT)
|
||||
|
||||
#define BP_CMD_TW_SIZE 3
|
||||
#define BP_CMD_TW_SHIFT 16
|
||||
#define BP_CMD_TW_MASK 0x00070000
|
||||
#define BP_CMD_GET_TW(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_TW_MASK) >> BP_CMD_TW_SHIFT)
|
||||
|
||||
#define BP_CMD_LB_SIZE 1
|
||||
#define BP_CMD_LB_SHIFT 19
|
||||
#define BP_CMD_LB_MASK 0x00080000
|
||||
#define BP_CMD_GET_LB(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_LB_MASK) >> BP_CMD_LB_SHIFT)
|
||||
|
||||
#define BP_CMD_FB_SIZE 1
|
||||
#define BP_CMD_FB_SHIFT 20
|
||||
#define BP_CMD_FB_MASK 0x00100000
|
||||
#define BP_CMD_GET_FB(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_FB_MASK) >> BP_CMD_FB_SHIFT)
|
||||
|
||||
#define BP_CMD_PAD0_SIZE 3
|
||||
#define BP_CMD_PAD0_SHIFT 21
|
||||
#define BP_CMD_PAD0_MASK 0x00e00000
|
||||
#define BP_CMD_GET_PAD0(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_PAD0_MASK) >> BP_CMD_PAD0_SHIFT)
|
||||
|
||||
#define BP_CMD_RID_SIZE 8
|
||||
#define BP_CMD_RID_SHIFT 24
|
||||
#define BP_CMD_RID_MASK 0xff000000
|
||||
#define BP_CMD_GET_RID(bp_cmd) \
|
||||
((((unsigned long)(bp_cmd)) & BP_CMD_RID_MASK) >> BP_CMD_RID_SHIFT)
|
||||
|
||||
#define BP_MTXA_MA_SIZE 11
|
||||
#define BP_MTXA_MA_SHIFT 0
|
||||
#define BP_MTXA_MA_MASK 0x000007ff
|
||||
#define BP_MTXA_GET_MA(bp_mtxa) \
|
||||
((((unsigned long)(bp_mtxa)) & BP_MTXA_MA_MASK) >> BP_MTXA_MA_SHIFT)
|
||||
|
||||
#define BP_MTXA_MB_SIZE 11
|
||||
#define BP_MTXA_MB_SHIFT 11
|
||||
#define BP_MTXA_MB_MASK 0x003ff800
|
||||
#define BP_MTXA_GET_MB(bp_mtxa) \
|
||||
((((unsigned long)(bp_mtxa)) & BP_MTXA_MB_MASK) >> BP_MTXA_MB_SHIFT)
|
||||
|
||||
#define BP_MTXA_S_SIZE 2
|
||||
#define BP_MTXA_S_SHIFT 22
|
||||
#define BP_MTXA_S_MASK 0x00c00000
|
||||
#define BP_MTXA_GET_S(bp_mtxa) \
|
||||
((((unsigned long)(bp_mtxa)) & BP_MTXA_S_MASK) >> BP_MTXA_S_SHIFT)
|
||||
|
||||
#define BP_MTXA_RID_SIZE 8
|
||||
#define BP_MTXA_RID_SHIFT 24
|
||||
#define BP_MTXA_RID_MASK 0xff000000
|
||||
#define BP_MTXA_GET_RID(bp_mtxa) \
|
||||
((((unsigned long)(bp_mtxa)) & BP_MTXA_RID_MASK) >> BP_MTXA_RID_SHIFT)
|
||||
|
||||
#define BP_MTXB_MC_SIZE 11
|
||||
#define BP_MTXB_MC_SHIFT 0
|
||||
#define BP_MTXB_MC_MASK 0x000007ff
|
||||
#define BP_MTXB_GET_MC(bp_mtxb) \
|
||||
((((unsigned long)(bp_mtxb)) & BP_MTXB_MC_MASK) >> BP_MTXB_MC_SHIFT)
|
||||
|
||||
#define BP_MTXB_MD_SIZE 11
|
||||
#define BP_MTXB_MD_SHIFT 11
|
||||
#define BP_MTXB_MD_MASK 0x003ff800
|
||||
#define BP_MTXB_GET_MD(bp_mtxb) \
|
||||
((((unsigned long)(bp_mtxb)) & BP_MTXB_MD_MASK) >> BP_MTXB_MD_SHIFT)
|
||||
|
||||
#define BP_MTXB_S_SIZE 2
|
||||
#define BP_MTXB_S_SHIFT 22
|
||||
#define BP_MTXB_S_MASK 0x00c00000
|
||||
#define BP_MTXB_GET_S(bp_mtxb) \
|
||||
((((unsigned long)(bp_mtxb)) & BP_MTXB_S_MASK) >> BP_MTXB_S_SHIFT)
|
||||
|
||||
#define BP_MTXB_RID_SIZE 8
|
||||
#define BP_MTXB_RID_SHIFT 24
|
||||
#define BP_MTXB_RID_MASK 0xff000000
|
||||
#define BP_MTXB_GET_RID(bp_mtxb) \
|
||||
((((unsigned long)(bp_mtxb)) & BP_MTXB_RID_MASK) >> BP_MTXB_RID_SHIFT)
|
||||
|
||||
#define BP_MTXC_ME_SIZE 11
|
||||
#define BP_MTXC_ME_SHIFT 0
|
||||
#define BP_MTXC_ME_MASK 0x000007ff
|
||||
#define BP_MTXC_GET_ME(bp_mtxc) \
|
||||
((((unsigned long)(bp_mtxc)) & BP_MTXC_ME_MASK) >> BP_MTXC_ME_SHIFT)
|
||||
|
||||
#define BP_MTXC_MF_SIZE 11
|
||||
#define BP_MTXC_MF_SHIFT 11
|
||||
#define BP_MTXC_MF_MASK 0x003ff800
|
||||
#define BP_MTXC_GET_MF(bp_mtxc) \
|
||||
((((unsigned long)(bp_mtxc)) & BP_MTXC_MF_MASK) >> BP_MTXC_MF_SHIFT)
|
||||
|
||||
#define BP_MTXC_S_SIZE 2
|
||||
#define BP_MTXC_S_SHIFT 22
|
||||
#define BP_MTXC_S_MASK 0x00c00000
|
||||
#define BP_MTXC_GET_S(bp_mtxc) \
|
||||
((((unsigned long)(bp_mtxc)) & BP_MTXC_S_MASK) >> BP_MTXC_S_SHIFT)
|
||||
|
||||
#define BP_MTXC_RID_SIZE 8
|
||||
#define BP_MTXC_RID_SHIFT 24
|
||||
#define BP_MTXC_RID_MASK 0xff000000
|
||||
#define BP_MTXC_GET_RID(bp_mtxc) \
|
||||
((((unsigned long)(bp_mtxc)) & BP_MTXC_RID_MASK) >> BP_MTXC_RID_SHIFT)
|
||||
|
||||
|
||||
#define SC_BP_MTXA_SET_MA(line, bp_mtxa,ma) \
|
||||
FAST_GPFLAGSET(line, bp_mtxa,ma,BP_MTXA_MA)
|
||||
|
||||
#define SC_BP_MTXA_SET_MB(line, bp_mtxa,mb) \
|
||||
FAST_GPFLAGSET(line, bp_mtxa,mb,BP_MTXA_MB)
|
||||
|
||||
#define SC_BP_MTXA_SET_S(line, bp_mtxa,s) \
|
||||
FAST_GPFLAGSET(line, bp_mtxa,s,BP_MTXA_S)
|
||||
|
||||
#define SC_BP_MTXA_SET_RID(line, bp_mtxa,rid) \
|
||||
FAST_GPFLAGSET(line, bp_mtxa,rid,BP_MTXA_RID)
|
||||
|
||||
#define SC_BP_MTXB_SET_MC(line, bp_mtxb,mc) \
|
||||
FAST_GPFLAGSET(line, bp_mtxb,mc,BP_MTXB_MC)
|
||||
|
||||
#define SC_BP_MTXB_SET_MD(line, bp_mtxb,md) \
|
||||
FAST_GPFLAGSET(line, bp_mtxb,md,BP_MTXB_MD)
|
||||
|
||||
#define SC_BP_MTXB_SET_S(line, bp_mtxb,s) \
|
||||
FAST_GPFLAGSET(line, bp_mtxb,s,BP_MTXB_S)
|
||||
|
||||
#define SC_BP_MTXB_SET_RID(line, bp_mtxb,rid) \
|
||||
FAST_GPFLAGSET(line, bp_mtxb,rid,BP_MTXB_RID)
|
||||
|
||||
#define SC_BP_MTXC_SET_ME(line, bp_mtxc,me) \
|
||||
FAST_GPFLAGSET(line, bp_mtxc,me,BP_MTXC_ME)
|
||||
|
||||
#define SC_BP_MTXC_SET_MF(line, bp_mtxc,mf) \
|
||||
FAST_GPFLAGSET(line, bp_mtxc,mf,BP_MTXC_MF)
|
||||
|
||||
#define SC_BP_MTXC_SET_S(line, bp_mtxc,s) \
|
||||
FAST_GPFLAGSET(line, bp_mtxc,s,BP_MTXC_S)
|
||||
|
||||
#define SC_BP_MTXC_SET_RID(line, bp_mtxc,rid) \
|
||||
FAST_GPFLAGSET(line, bp_mtxc,rid,BP_MTXC_RID)
|
||||
|
||||
#define SC_BP_CMD_SET_BT(line, bp_cmd,bt) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,bt,BP_CMD_BT)
|
||||
|
||||
#define SC_BP_CMD_SET_FMT(line, bp_cmd,fmt) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,fmt,BP_CMD_FMT)
|
||||
|
||||
#define SC_BP_CMD_SET_BIAS(line, bp_cmd,bias) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,bias,BP_CMD_BIAS)
|
||||
|
||||
#define SC_BP_CMD_SET_BS(line, bp_cmd,bs) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,bs,BP_CMD_BS)
|
||||
|
||||
#define SC_BP_CMD_SET_M(line, bp_cmd,m) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,m,BP_CMD_M)
|
||||
|
||||
#define SC_BP_CMD_SET_SW(line, bp_cmd,sw) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,sw,BP_CMD_SW)
|
||||
|
||||
#define SC_BP_CMD_SET_TW(line, bp_cmd,tw) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,tw,BP_CMD_TW)
|
||||
|
||||
#define SC_BP_CMD_SET_LB(line, bp_cmd,lb) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,lb,BP_CMD_LB)
|
||||
|
||||
#define SC_BP_CMD_SET_FB(line, bp_cmd,fb) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,fb,BP_CMD_FB)
|
||||
|
||||
#define SC_BP_CMD_SET_PAD0(line, bp_cmd,pad0) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,pad0,BP_CMD_PAD0)
|
||||
|
||||
#define SC_BP_CMD_SET_RID(line, bp_cmd,rid) \
|
||||
FAST_GPFLAGSET(line, bp_cmd,rid,BP_CMD_RID)
|
||||
|
||||
#define SC_BP_IMASK_SET_IMASK(line, bp_imask,imask) \
|
||||
FAST_GPFLAGSET(line, bp_imask,imask,BP_IMASK_IMASK)
|
||||
|
||||
#define SC_BP_IMASK_SET_PAD0(line, bp_imask,pad0) \
|
||||
FAST_GPFLAGSET(line, bp_imask,pad0,BP_IMASK_PAD0)
|
||||
|
||||
#define SC_BP_IMASK_SET_RID(line, bp_imask,rid) \
|
||||
FAST_GPFLAGSET(line, bp_imask,rid,BP_IMASK_RID)
|
||||
|
||||
#endif // BP_REG_H
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,163 @@
|
||||
#ifndef GEN_REG_H
|
||||
#define GEN_REG_H
|
||||
|
||||
#include <revolution/private/GXFDLShortcut.h>
|
||||
|
||||
#define GEN_MODE_RID_SIZE 8
|
||||
#define GEN_MODE_RID_SHIFT 24
|
||||
#define GEN_MODE_RID_MASK 0xff000000
|
||||
#define GEN_MODE_GET_RID(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_RID_MASK) >> GEN_MODE_RID_SHIFT)
|
||||
|
||||
#define GEN_MODE_NTEX_SIZE 4
|
||||
#define GEN_MODE_NTEX_SHIFT 0
|
||||
#define GEN_MODE_NTEX_MASK 0x0000000f
|
||||
#define GEN_MODE_GET_NTEX(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_NTEX_MASK) >> GEN_MODE_NTEX_SHIFT)
|
||||
|
||||
#define GEN_MODE_NTEX_SIZE 4
|
||||
#define GEN_MODE_NTEX_SHIFT 0
|
||||
#define GEN_MODE_NTEX_MASK 0x0000000f
|
||||
#define GEN_MODE_GET_NTEX(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_NTEX_MASK) >> GEN_MODE_NTEX_SHIFT)
|
||||
|
||||
#define GEN_MODE_NCOL_SIZE 3
|
||||
#define GEN_MODE_NCOL_SHIFT 4
|
||||
#define GEN_MODE_NCOL_MASK 0x00000070
|
||||
#define GEN_MODE_GET_NCOL(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_NCOL_MASK) >> GEN_MODE_NCOL_SHIFT)
|
||||
|
||||
#define GEN_MODE_PAD0_SIZE 1
|
||||
#define GEN_MODE_PAD0_SHIFT 7
|
||||
#define GEN_MODE_PAD0_MASK 0x00000080
|
||||
#define GEN_MODE_GET_PAD0(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_PAD0_MASK) >> GEN_MODE_PAD0_SHIFT)
|
||||
|
||||
#define GEN_MODE_FLAT_EN_SIZE 1
|
||||
#define GEN_MODE_FLAT_EN_SHIFT 8
|
||||
#define GEN_MODE_FLAT_EN_MASK 0x00000100
|
||||
#define GEN_MODE_GET_FLAT_EN(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_FLAT_EN_MASK) >> GEN_MODE_FLAT_EN_SHIFT)
|
||||
|
||||
#define GEN_MODE_MS_EN_SIZE 1
|
||||
#define GEN_MODE_MS_EN_SHIFT 9
|
||||
#define GEN_MODE_MS_EN_MASK 0x00000200
|
||||
#define GEN_MODE_GET_MS_EN(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_MS_EN_MASK) >> GEN_MODE_MS_EN_SHIFT)
|
||||
|
||||
#define GEN_MODE_NTEV_SIZE 4
|
||||
#define GEN_MODE_NTEV_SHIFT 10
|
||||
#define GEN_MODE_NTEV_MASK 0x00003c00
|
||||
#define GEN_MODE_GET_NTEV(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_NTEV_MASK) >> GEN_MODE_NTEV_SHIFT)
|
||||
|
||||
#define GEN_MODE_REJECT_EN_SIZE 2
|
||||
#define GEN_MODE_REJECT_EN_SHIFT 14
|
||||
#define GEN_MODE_REJECT_EN_MASK 0x0000c000
|
||||
#define GEN_MODE_GET_REJECT_EN(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_REJECT_EN_MASK) >> GEN_MODE_REJECT_EN_SHIFT)
|
||||
|
||||
#define GEN_MODE_NBMP_SIZE 3
|
||||
#define GEN_MODE_NBMP_SHIFT 16
|
||||
#define GEN_MODE_NBMP_MASK 0x00070000
|
||||
#define GEN_MODE_GET_NBMP(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_NBMP_MASK) >> GEN_MODE_NBMP_SHIFT)
|
||||
|
||||
#define GEN_MODE_ZFREEZE_SIZE 1
|
||||
#define GEN_MODE_ZFREEZE_SHIFT 19
|
||||
#define GEN_MODE_ZFREEZE_MASK 0x00080000
|
||||
#define GEN_MODE_GET_ZFREEZE(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_ZFREEZE_MASK) >> GEN_MODE_ZFREEZE_SHIFT)
|
||||
|
||||
#define GEN_MODE_PAD1_SIZE 4
|
||||
#define GEN_MODE_PAD1_SHIFT 20
|
||||
#define GEN_MODE_PAD1_MASK 0x00f00000
|
||||
#define GEN_MODE_GET_PAD1(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_PAD1_MASK) >> GEN_MODE_PAD1_SHIFT)
|
||||
|
||||
#define GEN_MODE_RID_SIZE 8
|
||||
#define GEN_MODE_RID_SHIFT 24
|
||||
#define GEN_MODE_RID_MASK 0xff000000
|
||||
#define GEN_MODE_GET_RID(gen_mode) \
|
||||
((((unsigned long)(gen_mode)) & GEN_MODE_RID_MASK) >> GEN_MODE_RID_SHIFT)
|
||||
|
||||
|
||||
#define SC_GEN_MODE_SET_NTEX(line, gen_mode,ntex) \
|
||||
FAST_GPFLAGSET(line, gen_mode,ntex,GEN_MODE_NTEX)
|
||||
|
||||
#define SC_GEN_MODE_SET_NCOL(line, gen_mode,ncol) \
|
||||
FAST_GPFLAGSET(line, gen_mode,ncol,GEN_MODE_NCOL)
|
||||
|
||||
#define SC_GEN_MODE_SET_PAD0(line, gen_mode,pad0) \
|
||||
FAST_GPFLAGSET(line, gen_mode,pad0,GEN_MODE_PAD0)
|
||||
|
||||
#define SC_GEN_MODE_SET_FLAT_EN(line, gen_mode,flat_en) \
|
||||
FAST_GPFLAGSET(line, gen_mode,flat_en,GEN_MODE_FLAT_EN)
|
||||
|
||||
#define SC_GEN_MODE_SET_MS_EN(line, gen_mode,ms_en) \
|
||||
FAST_GPFLAGSET(line, gen_mode,ms_en,GEN_MODE_MS_EN)
|
||||
|
||||
#define SC_GEN_MODE_SET_NTEV(line, gen_mode,ntev) \
|
||||
FAST_GPFLAGSET(line, gen_mode,ntev,GEN_MODE_NTEV)
|
||||
|
||||
#define SC_GEN_MODE_SET_REJECT_EN(line, gen_mode,reject_en) \
|
||||
FAST_GPFLAGSET(line, gen_mode,reject_en,GEN_MODE_REJECT_EN)
|
||||
|
||||
#define SC_GEN_MODE_SET_NBMP(line, gen_mode,nbmp) \
|
||||
FAST_GPFLAGSET(line, gen_mode,nbmp,GEN_MODE_NBMP)
|
||||
|
||||
#define SC_GEN_MODE_SET_ZFREEZE(line, gen_mode,zfreeze) \
|
||||
FAST_GPFLAGSET(line, gen_mode,zfreeze,GEN_MODE_ZFREEZE)
|
||||
|
||||
#define SC_GEN_MODE_SET_PAD1(line, gen_mode,pad1) \
|
||||
FAST_GPFLAGSET(line, gen_mode,pad1,GEN_MODE_PAD1)
|
||||
|
||||
#define SC_GEN_MODE_SET_RID(line, gen_mode,rid) \
|
||||
FAST_GPFLAGSET(line, gen_mode,rid,GEN_MODE_RID)
|
||||
|
||||
#define SC_GEN_MSLOC_SET_XS0(line, gen_msloc,xs0) \
|
||||
FAST_GPFLAGSET(line, gen_msloc,xs0,GEN_MSLOC_XS0)
|
||||
|
||||
#define SC_GEN_MSLOC_SET_YS0(line, gen_msloc,ys0) \
|
||||
FAST_GPFLAGSET(line, gen_msloc,ys0,GEN_MSLOC_YS0)
|
||||
|
||||
#define SC_GEN_MSLOC_SET_XS1(line, gen_msloc,xs1) \
|
||||
FAST_GPFLAGSET(line, gen_msloc,xs1,GEN_MSLOC_XS1)
|
||||
|
||||
#define SC_GEN_MSLOC_SET_YS1(line, gen_msloc,ys1) \
|
||||
FAST_GPFLAGSET(line, gen_msloc,ys1,GEN_MSLOC_YS1)
|
||||
|
||||
#define SC_GEN_MSLOC_SET_XS2(line, gen_msloc,xs2) \
|
||||
FAST_GPFLAGSET(line, gen_msloc,xs2,GEN_MSLOC_XS2)
|
||||
|
||||
#define SC_GEN_MSLOC_SET_YS2(line, gen_msloc,ys2) \
|
||||
FAST_GPFLAGSET(line, gen_msloc,ys2,GEN_MSLOC_YS2)
|
||||
|
||||
#define SC_GEN_MSLOC_SET_RID(line, gen_msloc,rid) \
|
||||
FAST_GPFLAGSET(line, gen_msloc,rid,GEN_MSLOC_RID)
|
||||
|
||||
#define SC_GEN_COLOR_SET_ALPHA(line, gen_color,alpha) \
|
||||
FAST_GPFLAGSET(line, gen_color,alpha,GEN_COLOR_ALPHA)
|
||||
|
||||
#define SC_GEN_COLOR_SET_BLUE(line, gen_color,blue) \
|
||||
FAST_GPFLAGSET(line, gen_color,blue,GEN_COLOR_BLUE)
|
||||
|
||||
#define SC_GEN_COLOR_SET_GREEN(line, gen_color,green) \
|
||||
FAST_GPFLAGSET(line, gen_color,green,GEN_COLOR_GREEN)
|
||||
|
||||
#define SC_GEN_COLOR_SET_RED(line, gen_color,red) \
|
||||
FAST_GPFLAGSET(line, gen_color,red,GEN_COLOR_RED)
|
||||
|
||||
#define SC_GEN_Z24_COLOR_SET_BLUE(line, gen_z24_color,blue) \
|
||||
FAST_GPFLAGSET(line, gen_z24_color,blue,GEN_Z24_COLOR_BLUE)
|
||||
|
||||
#define SC_GEN_Z24_COLOR_SET_GREEN(line, gen_z24_color,green) \
|
||||
FAST_GPFLAGSET(line, gen_z24_color,green,GEN_Z24_COLOR_GREEN)
|
||||
|
||||
#define SC_GEN_Z24_COLOR_SET_RED(line, gen_z24_color,red) \
|
||||
FAST_GPFLAGSET(line, gen_z24_color,red,GEN_Z24_COLOR_RED)
|
||||
|
||||
#define SC_GEN_Z24_COLOR_SET_PAD0(line, gen_z24_color,pad0) \
|
||||
FAST_GPFLAGSET(line, gen_z24_color,pad0,GEN_Z24_COLOR_PAD0)
|
||||
|
||||
#endif // GEN_REG_H
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,73 @@
|
||||
#ifndef PI_REG_H
|
||||
#define PI_REG_H
|
||||
|
||||
#include <revolution/private/GXFDLShortcut.h>
|
||||
|
||||
#define PI_REG_INTSR 0x000
|
||||
#define PI_REG_INTMSK 0x004
|
||||
#define PI_REG_CPBAS 0x00C
|
||||
#define PI_REG_CPTOP 0x010
|
||||
#define PI_REG_CPWRT 0x014
|
||||
#define PI_REG_CPABT 0x018
|
||||
#define PI_REG_PIESR 0x01C
|
||||
#define PI_REG_PIEAR 0x020
|
||||
#define PI_REG_CONFIG 0x024
|
||||
#define PI_REG_DURAR 0x028
|
||||
#define PI_REG_CHIPID 0x02C
|
||||
#define PI_REG_STRGTH 0x030
|
||||
#define PI_REG_CPUDBB 0x034
|
||||
|
||||
#define PI_REGSP_CP 0x0C000000
|
||||
#define PI_REGSP_PE 0x0C001000
|
||||
#define PI_REGSP_VI 0x0C002000
|
||||
#define PI_REGSP_PI 0x0C003000
|
||||
#define PI_REGSP_MEM 0x0C004000
|
||||
#define PI_REGSP_DSP 0x0C005000
|
||||
#define PI_REGSP_IO 0x0C006000
|
||||
#define PI_GFXSP 0x0C008000
|
||||
|
||||
#define PI_CPWRT_REG_CPWRT_SIZE 24
|
||||
#define PI_CPWRT_REG_CPWRT_SHIFT 5
|
||||
#define PI_CPWRT_REG_CPWRT_MASK 0x1fffffe0
|
||||
#define PI_CPWRT_REG_GET_CPWRT(pi_cpwrt_reg) \
|
||||
((((unsigned long)(pi_cpwrt_reg)) & PI_CPWRT_REG_CPWRT_MASK) >> PI_CPWRT_REG_CPWRT_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_PERF_B_SIZE 5
|
||||
#define XF_PERF0_F_PERF_B_SHIFT 5
|
||||
#define XF_PERF0_F_PERF_B_MASK 0x000003e0
|
||||
#define XF_PERF0_F_GET_PERF_B(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_B_MASK) >> XF_PERF0_F_PERF_B_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_PERF_C_SIZE 5
|
||||
#define XF_PERF0_F_PERF_C_SHIFT 10
|
||||
#define XF_PERF0_F_PERF_C_MASK 0x00007c00
|
||||
#define XF_PERF0_F_GET_PERF_C(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_C_MASK) >> XF_PERF0_F_PERF_C_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_PERF_D_SIZE 5
|
||||
#define XF_PERF0_F_PERF_D_SHIFT 15
|
||||
#define XF_PERF0_F_PERF_D_MASK 0x000f8000
|
||||
#define XF_PERF0_F_GET_PERF_D(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_D_MASK) >> XF_PERF0_F_PERF_D_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_PERF_A_SIZE 5
|
||||
#define XF_PERF0_F_PERF_A_SHIFT 0
|
||||
#define XF_PERF0_F_PERF_A_MASK 0x0000001f
|
||||
#define XF_PERF0_F_GET_PERF_A(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_A_MASK) >> XF_PERF0_F_PERF_A_SHIFT)
|
||||
|
||||
#define PI_CPWRT_REG_CPWRAP_SIZE 1
|
||||
#define PI_CPWRT_REG_CPWRAP_SHIFT 29
|
||||
#define PI_CPWRT_REG_CPWRAP_MASK 0x20000000
|
||||
#define PI_CPWRT_REG_GET_CPWRAP(pi_cpwrt_reg) \
|
||||
((((unsigned long)(pi_cpwrt_reg)) & PI_CPWRT_REG_CPWRAP_MASK) >> PI_CPWRT_REG_CPWRAP_SHIFT)
|
||||
|
||||
|
||||
#define SC_PI_CPWRT_REG_SET_CPWRT(line, pi_cpwrt_reg,cpwrt) \
|
||||
FAST_GPFLAGSET(line, pi_cpwrt_reg,cpwrt,PI_CPWRT_REG_CPWRT)
|
||||
|
||||
#define SC_PI_CPWRT_REG_SET_CPWRAP(line, pi_cpwrt_reg,cpwrap) \
|
||||
FAST_GPFLAGSET(line, pi_cpwrt_reg,cpwrap,PI_CPWRT_REG_CPWRAP)
|
||||
|
||||
|
||||
#endif // PI_REG_H
|
||||
@@ -0,0 +1,232 @@
|
||||
#ifndef RAS_REG
|
||||
#define RAS_REG
|
||||
|
||||
#define RAS1_TREF_RID_SIZE 8
|
||||
#define RAS1_TREF_RID_SHIFT 24
|
||||
#define RAS1_TREF_RID_MASK 0xff000000
|
||||
#define RAS1_TREF_GET_RID(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_RID_MASK) >> RAS1_TREF_RID_SHIFT)
|
||||
|
||||
#define RAS1_IREF_RID_SIZE 8
|
||||
#define RAS1_IREF_RID_SHIFT 24
|
||||
#define RAS1_IREF_RID_MASK 0xff000000
|
||||
#define RAS1_IREF_GET_RID(ras1_iref) \
|
||||
((((unsigned long)(ras1_iref)) & RAS1_IREF_RID_MASK) >> RAS1_IREF_RID_SHIFT)
|
||||
|
||||
#define RAS_PERF_SELA_SIZE 5
|
||||
#define RAS_PERF_SELA_SHIFT 0
|
||||
#define RAS_PERF_SELA_MASK 0x0000001f
|
||||
#define RAS_PERF_GET_SELA(ras_perf) \
|
||||
((((unsigned long)(ras_perf)) & RAS_PERF_SELA_MASK) >> RAS_PERF_SELA_SHIFT)
|
||||
|
||||
#define RAS_PERF_SELB_SIZE 5
|
||||
#define RAS_PERF_SELB_SHIFT 5
|
||||
#define RAS_PERF_SELB_MASK 0x000003e0
|
||||
#define RAS_PERF_GET_SELB(ras_perf) \
|
||||
((((unsigned long)(ras_perf)) & RAS_PERF_SELB_MASK) >> RAS_PERF_SELB_SHIFT)
|
||||
|
||||
#define RAS_PERF_NTEV_SIZE 5
|
||||
#define RAS_PERF_NTEV_SHIFT 10
|
||||
#define RAS_PERF_NTEV_MASK 0x00007c00
|
||||
#define RAS_PERF_GET_NTEV(ras_perf) \
|
||||
((((unsigned long)(ras_perf)) & RAS_PERF_NTEV_MASK) >> RAS_PERF_NTEV_SHIFT)
|
||||
|
||||
#define RAS_PERF_NBMP_SIZE 3
|
||||
#define RAS_PERF_NBMP_SHIFT 15
|
||||
#define RAS_PERF_NBMP_MASK 0x00038000
|
||||
#define RAS_PERF_GET_NBMP(ras_perf) \
|
||||
((((unsigned long)(ras_perf)) & RAS_PERF_NBMP_MASK) >> RAS_PERF_NBMP_SHIFT)
|
||||
|
||||
#define RAS_PERF_NBR_SIZE 3
|
||||
#define RAS_PERF_NBR_SHIFT 18
|
||||
#define RAS_PERF_NBR_MASK 0x001c0000
|
||||
#define RAS_PERF_GET_NBR(ras_perf) \
|
||||
((((unsigned long)(ras_perf)) & RAS_PERF_NBR_MASK) >> RAS_PERF_NBR_SHIFT)
|
||||
|
||||
#define RAS_PERF_PAD0_SIZE 3
|
||||
#define RAS_PERF_PAD0_SHIFT 21
|
||||
#define RAS_PERF_PAD0_MASK 0x00e00000
|
||||
#define RAS_PERF_GET_PAD0(ras_perf) \
|
||||
((((unsigned long)(ras_perf)) & RAS_PERF_PAD0_MASK) >> RAS_PERF_PAD0_SHIFT)
|
||||
#define RAS_PERF_RID_SIZE 8
|
||||
#define RAS_PERF_RID_SHIFT 24
|
||||
#define RAS_PERF_RID_MASK 0xff000000
|
||||
#define RAS_PERF_GET_RID(ras_perf) \
|
||||
((((unsigned long)(ras_perf)) & RAS_PERF_RID_MASK) >> RAS_PERF_RID_SHIFT)
|
||||
|
||||
#define RAS_PERF_TOTAL_SIZE 32
|
||||
#define RAS_PERF(selA, selB, ntev, nbmp, nbr, rid) \
|
||||
((((unsigned long)(selA)) << RAS_PERF_SELA_SHIFT) | \
|
||||
(((unsigned long)(selB)) << RAS_PERF_SELB_SHIFT) | \
|
||||
(((unsigned long)(ntev)) << RAS_PERF_NTEV_SHIFT) | \
|
||||
(((unsigned long)(nbmp)) << RAS_PERF_NBMP_SHIFT) | \
|
||||
(((unsigned long)(nbr)) << RAS_PERF_NBR_SHIFT) | \
|
||||
(((unsigned long)(rid)) << RAS_PERF_RID_SHIFT))
|
||||
|
||||
#define RAS1_TREF_TI0_SIZE 3
|
||||
#define RAS1_TREF_TI0_SHIFT 0
|
||||
#define RAS1_TREF_TI0_MASK 0x00000007
|
||||
#define RAS1_TREF_GET_TI0(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_TI0_MASK) >> RAS1_TREF_TI0_SHIFT)
|
||||
|
||||
#define RAS1_TREF_TC0_SIZE 3
|
||||
#define RAS1_TREF_TC0_SHIFT 3
|
||||
#define RAS1_TREF_TC0_MASK 0x00000038
|
||||
#define RAS1_TREF_GET_TC0(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_TC0_MASK) >> RAS1_TREF_TC0_SHIFT)
|
||||
|
||||
#define RAS1_TREF_TE0_SIZE 1
|
||||
#define RAS1_TREF_TE0_SHIFT 6
|
||||
#define RAS1_TREF_TE0_MASK 0x00000040
|
||||
#define RAS1_TREF_GET_TE0(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_TE0_MASK) >> RAS1_TREF_TE0_SHIFT)
|
||||
|
||||
#define RAS1_TREF_CC0_SIZE 3
|
||||
#define RAS1_TREF_CC0_SHIFT 7
|
||||
#define RAS1_TREF_CC0_MASK 0x00000380
|
||||
#define RAS1_TREF_GET_CC0(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_CC0_MASK) >> RAS1_TREF_CC0_SHIFT)
|
||||
|
||||
#define RAS1_TREF_PAD0_SIZE 2
|
||||
#define RAS1_TREF_PAD0_SHIFT 10
|
||||
#define RAS1_TREF_PAD0_MASK 0x00000c00
|
||||
#define RAS1_TREF_GET_PAD0(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_PAD0_MASK) >> RAS1_TREF_PAD0_SHIFT)
|
||||
|
||||
#define RAS1_TREF_TI1_SIZE 3
|
||||
#define RAS1_TREF_TI1_SHIFT 12
|
||||
#define RAS1_TREF_TI1_MASK 0x00007000
|
||||
#define RAS1_TREF_GET_TI1(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_TI1_MASK) >> RAS1_TREF_TI1_SHIFT)
|
||||
|
||||
#define RAS1_TREF_TC1_SIZE 3
|
||||
#define RAS1_TREF_TC1_SHIFT 15
|
||||
#define RAS1_TREF_TC1_MASK 0x00038000
|
||||
#define RAS1_TREF_GET_TC1(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_TC1_MASK) >> RAS1_TREF_TC1_SHIFT)
|
||||
|
||||
#define RAS1_TREF_TE1_SIZE 1
|
||||
#define RAS1_TREF_TE1_SHIFT 18
|
||||
#define RAS1_TREF_TE1_MASK 0x00040000
|
||||
#define RAS1_TREF_GET_TE1(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_TE1_MASK) >> RAS1_TREF_TE1_SHIFT)
|
||||
|
||||
#define RAS1_TREF_CC1_SIZE 3
|
||||
#define RAS1_TREF_CC1_SHIFT 19
|
||||
#define RAS1_TREF_CC1_MASK 0x00380000
|
||||
#define RAS1_TREF_GET_CC1(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_CC1_MASK) >> RAS1_TREF_CC1_SHIFT)
|
||||
|
||||
#define RAS1_TREF_PAD1_SIZE 2
|
||||
#define RAS1_TREF_PAD1_SHIFT 22
|
||||
#define RAS1_TREF_PAD1_MASK 0x00c00000
|
||||
#define RAS1_TREF_GET_PAD1(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_PAD1_MASK) >> RAS1_TREF_PAD1_SHIFT)
|
||||
|
||||
#define RAS1_TREF_RID_SIZE 8
|
||||
#define RAS1_TREF_RID_SHIFT 24
|
||||
#define RAS1_TREF_RID_MASK 0xff000000
|
||||
#define RAS1_TREF_GET_RID(ras1_tref) \
|
||||
((((unsigned long)(ras1_tref)) & RAS1_TREF_RID_MASK) >> RAS1_TREF_RID_SHIFT)
|
||||
|
||||
#define SC_RAS1_SS_SET_SS0(line, ras1_ss,ss0) \
|
||||
FAST_GPFLAGSET(line, ras1_ss,ss0,RAS1_SS_SS0)
|
||||
|
||||
#define SC_RAS1_SS_SET_TS0(line, ras1_ss,ts0) \
|
||||
FAST_GPFLAGSET(line, ras1_ss,ts0,RAS1_SS_TS0)
|
||||
|
||||
#define SC_RAS1_SS_SET_SS1(line, ras1_ss,ss1) \
|
||||
FAST_GPFLAGSET(line, ras1_ss,ss1,RAS1_SS_SS1)
|
||||
|
||||
#define SC_RAS1_SS_SET_TS1(line, ras1_ss,ts1) \
|
||||
FAST_GPFLAGSET(line, ras1_ss,ts1,RAS1_SS_TS1)
|
||||
|
||||
#define SC_RAS1_SS_SET_PAD0(line, ras1_ss,pad0) \
|
||||
FAST_GPFLAGSET(line, ras1_ss,pad0,RAS1_SS_PAD0)
|
||||
|
||||
#define SC_RAS1_SS_SET_RID(line, ras1_ss,rid) \
|
||||
FAST_GPFLAGSET(line, ras1_ss,rid,RAS1_SS_RID)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BI0(line, ras1_iref,bi0) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bi0,RAS1_IREF_BI0)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BC0(line, ras1_iref,bc0) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bc0,RAS1_IREF_BC0)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BI1(line, ras1_iref,bi1) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bi1,RAS1_IREF_BI1)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BC1(line, ras1_iref,bc1) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bc1,RAS1_IREF_BC1)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BI2(line, ras1_iref,bi2) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bi2,RAS1_IREF_BI2)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BC2(line, ras1_iref,bc2) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bc2,RAS1_IREF_BC2)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BI3(line, ras1_iref,bi3) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bi3,RAS1_IREF_BI3)
|
||||
|
||||
#define SC_RAS1_IREF_SET_BC3(line, ras1_iref,bc3) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,bc3,RAS1_IREF_BC3)
|
||||
|
||||
#define SC_RAS1_IREF_SET_RID(line, ras1_iref,rid) \
|
||||
FAST_GPFLAGSET(line, ras1_iref,rid,RAS1_IREF_RID)
|
||||
|
||||
#define SC_RAS1_TREF_SET_TI0(line, ras1_tref,ti0) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,ti0,RAS1_TREF_TI0)
|
||||
|
||||
#define SC_RAS1_TREF_SET_TC0(line, ras1_tref,tc0) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,tc0,RAS1_TREF_TC0)
|
||||
|
||||
#define SC_RAS1_TREF_SET_TE0(line, ras1_tref,te0) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,te0,RAS1_TREF_TE0)
|
||||
|
||||
#define SC_RAS1_TREF_SET_CC0(line, ras1_tref,cc0) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,cc0,RAS1_TREF_CC0)
|
||||
|
||||
#define SC_RAS1_TREF_SET_PAD0(line, ras1_tref,pad0) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,pad0,RAS1_TREF_PAD0)
|
||||
|
||||
#define SC_RAS1_TREF_SET_TI1(line, ras1_tref,ti1) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,ti1,RAS1_TREF_TI1)
|
||||
|
||||
#define SC_RAS1_TREF_SET_TC1(line, ras1_tref,tc1) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,tc1,RAS1_TREF_TC1)
|
||||
|
||||
#define SC_RAS1_TREF_SET_TE1(line, ras1_tref,te1) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,te1,RAS1_TREF_TE1)
|
||||
|
||||
#define SC_RAS1_TREF_SET_CC1(line, ras1_tref,cc1) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,cc1,RAS1_TREF_CC1)
|
||||
|
||||
#define SC_RAS1_TREF_SET_PAD1(line, ras1_tref,pad1) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,pad1,RAS1_TREF_PAD1)
|
||||
|
||||
#define SC_RAS1_TREF_SET_RID(line, ras1_tref,rid) \
|
||||
FAST_GPFLAGSET(line, ras1_tref,rid,RAS1_TREF_RID)
|
||||
|
||||
#define SC_RAS_PERF_SET_SELA(line, ras_perf,selA) \
|
||||
FAST_GPFLAGSET(line, ras_perf,selA,RAS_PERF_SELA)
|
||||
|
||||
#define SC_RAS_PERF_SET_SELB(line, ras_perf,selB) \
|
||||
FAST_GPFLAGSET(line, ras_perf,selB,RAS_PERF_SELB)
|
||||
|
||||
#define SC_RAS_PERF_SET_NTEV(line, ras_perf,ntev) \
|
||||
FAST_GPFLAGSET(line, ras_perf,ntev,RAS_PERF_NTEV)
|
||||
|
||||
#define SC_RAS_PERF_SET_NBMP(line, ras_perf,nbmp) \
|
||||
FAST_GPFLAGSET(line, ras_perf,nbmp,RAS_PERF_NBMP)
|
||||
|
||||
#define SC_RAS_PERF_SET_NBR(line, ras_perf,nbr) \
|
||||
FAST_GPFLAGSET(line, ras_perf,nbr,RAS_PERF_NBR)
|
||||
|
||||
#define SC_RAS_PERF_SET_PAD0(line, ras_perf,pad0) \
|
||||
FAST_GPFLAGSET(line, ras_perf,pad0,RAS_PERF_PAD0)
|
||||
|
||||
#define SC_RAS_PERF_SET_RID(line, ras_perf,rid) \
|
||||
FAST_GPFLAGSET(line, ras_perf,rid,RAS_PERF_RID)
|
||||
|
||||
|
||||
#endif // RAS_REG
|
||||
@@ -0,0 +1,387 @@
|
||||
#ifndef SU_REG_H
|
||||
#define SU_REG_H
|
||||
|
||||
#define SU_LPSIZE_RID_SIZE 8
|
||||
#define SU_LPSIZE_RID_SHIFT 24
|
||||
#define SU_LPSIZE_RID_MASK 0xff000000
|
||||
#define SU_LPSIZE_GET_RID(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_RID_MASK) >> SU_LPSIZE_RID_SHIFT)
|
||||
|
||||
|
||||
#define SU_TS0_RID_SIZE 8
|
||||
#define SU_TS0_RID_SHIFT 24
|
||||
#define SU_TS0_RID_MASK 0xff000000
|
||||
#define SU_TS0_GET_RID(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_RID_MASK) >> SU_TS0_RID_SHIFT)
|
||||
|
||||
#define SU_TS1_RID_SIZE 8
|
||||
#define SU_TS1_RID_SHIFT 24
|
||||
#define SU_TS1_RID_MASK 0xff000000
|
||||
#define SU_TS1_GET_RID(su_ts1) \
|
||||
((((unsigned long)(su_ts1)) & SU_TS1_RID_MASK) >> SU_TS1_RID_SHIFT)
|
||||
|
||||
#define SU_SCIS0_RID_SIZE 8
|
||||
#define SU_SCIS0_RID_SHIFT 24
|
||||
#define SU_SCIS0_RID_MASK 0xff000000
|
||||
#define SU_SCIS0_GET_RID(su_scis0) \
|
||||
((((unsigned long)(su_scis0)) & SU_SCIS0_RID_MASK) >> SU_SCIS0_RID_SHIFT)
|
||||
|
||||
#define SU_PERF_SELA_SIZE 3
|
||||
#define SU_PERF_SELA_SHIFT 0
|
||||
#define SU_PERF_SELA_MASK 0x00000007
|
||||
#define SU_PERF_GET_SELA(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_SELA_MASK) >> SU_PERF_SELA_SHIFT)
|
||||
|
||||
#define SU_SCIS1_RID_SIZE 8
|
||||
#define SU_SCIS1_RID_SHIFT 24
|
||||
#define SU_SCIS1_RID_MASK 0xff000000
|
||||
#define SU_SCIS1_GET_RID(su_scis1) \
|
||||
((((unsigned long)(su_scis1)) & SU_SCIS1_RID_MASK) >> SU_SCIS1_RID_SHIFT)
|
||||
|
||||
#define SU_PERF_NTEX_SIZE 4
|
||||
#define SU_PERF_NTEX_SHIFT 6
|
||||
#define SU_PERF_NTEX_MASK 0x000003c0
|
||||
#define SU_PERF_GET_NTEX(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_NTEX_MASK) >> SU_PERF_NTEX_SHIFT)
|
||||
|
||||
#define SU_PERF_NCOL_SIZE 2
|
||||
#define SU_PERF_NCOL_SHIFT 10
|
||||
#define SU_PERF_NCOL_MASK 0x00000c00
|
||||
#define SU_PERF_GET_NCOL(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_NCOL_MASK) >> SU_PERF_NCOL_SHIFT)
|
||||
|
||||
#define SU_PERF_SELB_SIZE 3
|
||||
#define SU_PERF_SELB_SHIFT 3
|
||||
#define SU_PERF_SELB_MASK 0x00000038
|
||||
#define SU_PERF_GET_SELB(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_SELB_MASK) >> SU_PERF_SELB_SHIFT)
|
||||
|
||||
#define SU_PERF_REJF_SIZE 2
|
||||
#define SU_PERF_REJF_SHIFT 12
|
||||
#define SU_PERF_REJF_MASK 0x00003000
|
||||
#define SU_PERF_GET_REJF(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_REJF_MASK) >> SU_PERF_REJF_SHIFT)
|
||||
|
||||
#define SU_PERF_REJS_SIZE 2
|
||||
#define SU_PERF_REJS_SHIFT 14
|
||||
#define SU_PERF_REJS_MASK 0x0000c000
|
||||
#define SU_PERF_GET_REJS(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_REJS_MASK) >> SU_PERF_REJS_SHIFT)
|
||||
|
||||
#define SU_PERF_CMD_SIZE 2
|
||||
#define SU_PERF_CMD_SHIFT 16
|
||||
#define SU_PERF_CMD_MASK 0x00030000
|
||||
#define SU_PERF_GET_CMD(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_CMD_MASK) >> SU_PERF_CMD_SHIFT)
|
||||
|
||||
#define SU_PERF_PAD0_SIZE 2
|
||||
#define SU_PERF_PAD0_SHIFT 18
|
||||
#define SU_PERF_PAD0_MASK 0x000c0000
|
||||
#define SU_PERF_GET_PAD0(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_PAD0_MASK) >> SU_PERF_PAD0_SHIFT)
|
||||
|
||||
#define SU_PERF_EN_SIZE 2
|
||||
#define SU_PERF_EN_SHIFT 20
|
||||
#define SU_PERF_EN_MASK 0x00300000
|
||||
#define SU_PERF_GET_EN(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_EN_MASK) >> SU_PERF_EN_SHIFT)
|
||||
|
||||
#define SU_PERF_PWR_EN_SIZE 2
|
||||
#define SU_PERF_PWR_EN_SHIFT 22
|
||||
#define SU_PERF_PWR_EN_MASK 0x00c00000
|
||||
#define SU_PERF_GET_PWR_EN(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_PWR_EN_MASK) >> SU_PERF_PWR_EN_SHIFT)
|
||||
|
||||
#define SU_PERF_RID_SIZE 8
|
||||
#define SU_PERF_RID_SHIFT 24
|
||||
#define SU_PERF_RID_MASK 0xff000000
|
||||
#define SU_PERF_GET_RID(su_perf) \
|
||||
((((unsigned long)(su_perf)) & SU_PERF_RID_MASK) >> SU_PERF_RID_SHIFT)
|
||||
|
||||
#define SU_PERF_TOTAL_SIZE 32
|
||||
#define SU_PERF(selA, selB, ntex, ncol, rejf, rejs, cmd, en, pwr_en, rid) \
|
||||
((((unsigned long)(selA)) << SU_PERF_SELA_SHIFT) | \
|
||||
(((unsigned long)(selB)) << SU_PERF_SELB_SHIFT) | \
|
||||
(((unsigned long)(ntex)) << SU_PERF_NTEX_SHIFT) | \
|
||||
(((unsigned long)(ncol)) << SU_PERF_NCOL_SHIFT) | \
|
||||
(((unsigned long)(rejf)) << SU_PERF_REJF_SHIFT) | \
|
||||
(((unsigned long)(rejs)) << SU_PERF_REJS_SHIFT) | \
|
||||
(((unsigned long)(cmd)) << SU_PERF_CMD_SHIFT) | \
|
||||
(((unsigned long)(en)) << SU_PERF_EN_SHIFT) | \
|
||||
(((unsigned long)(pwr_en)) << SU_PERF_PWR_EN_SHIFT) | \
|
||||
(((unsigned long)(rid)) << SU_PERF_RID_SHIFT))
|
||||
|
||||
#define SU_LPSIZE_LSIZE_SIZE 8
|
||||
#define SU_LPSIZE_LSIZE_SHIFT 0
|
||||
#define SU_LPSIZE_LSIZE_MASK 0x000000ff
|
||||
#define SU_LPSIZE_GET_LSIZE(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_LSIZE_MASK) >> SU_LPSIZE_LSIZE_SHIFT)
|
||||
|
||||
#define SU_LPSIZE_PSIZE_SIZE 8
|
||||
#define SU_LPSIZE_PSIZE_SHIFT 8
|
||||
#define SU_LPSIZE_PSIZE_MASK 0x0000ff00
|
||||
#define SU_LPSIZE_GET_PSIZE(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_PSIZE_MASK) >> SU_LPSIZE_PSIZE_SHIFT)
|
||||
|
||||
#define SU_LPSIZE_LTOFF_SIZE 3
|
||||
#define SU_LPSIZE_LTOFF_SHIFT 16
|
||||
#define SU_LPSIZE_LTOFF_MASK 0x00070000
|
||||
#define SU_LPSIZE_GET_LTOFF(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_LTOFF_MASK) >> SU_LPSIZE_LTOFF_SHIFT)
|
||||
|
||||
#define SU_LPSIZE_PTOFF_SIZE 3
|
||||
#define SU_LPSIZE_PTOFF_SHIFT 19
|
||||
#define SU_LPSIZE_PTOFF_MASK 0x00380000
|
||||
#define SU_LPSIZE_GET_PTOFF(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_PTOFF_MASK) >> SU_LPSIZE_PTOFF_SHIFT)
|
||||
|
||||
#define SU_LPSIZE_FIELDMODE_SIZE 1
|
||||
#define SU_LPSIZE_FIELDMODE_SHIFT 22
|
||||
#define SU_LPSIZE_FIELDMODE_MASK 0x00400000
|
||||
#define SU_LPSIZE_GET_FIELDMODE(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_FIELDMODE_MASK) >> SU_LPSIZE_FIELDMODE_SHIFT)
|
||||
|
||||
#define SU_LPSIZE_PAD0_SIZE 1
|
||||
#define SU_LPSIZE_PAD0_SHIFT 23
|
||||
#define SU_LPSIZE_PAD0_MASK 0x00800000
|
||||
#define SU_LPSIZE_GET_PAD0(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_PAD0_MASK) >> SU_LPSIZE_PAD0_SHIFT)
|
||||
|
||||
#define SU_LPSIZE_RID_SIZE 8
|
||||
#define SU_LPSIZE_RID_SHIFT 24
|
||||
#define SU_LPSIZE_RID_MASK 0xff000000
|
||||
#define SU_LPSIZE_GET_RID(su_lpsize) \
|
||||
((((unsigned long)(su_lpsize)) & SU_LPSIZE_RID_MASK) >> SU_LPSIZE_RID_SHIFT)
|
||||
|
||||
#define SU_TS0_SSIZE_SIZE 16
|
||||
#define SU_TS0_SSIZE_SHIFT 0
|
||||
#define SU_TS0_SSIZE_MASK 0x0000ffff
|
||||
#define SU_TS0_GET_SSIZE(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_SSIZE_MASK) >> SU_TS0_SSIZE_SHIFT)
|
||||
|
||||
#define SU_TS0_BS_SIZE 1
|
||||
#define SU_TS0_BS_SHIFT 16
|
||||
#define SU_TS0_BS_MASK 0x00010000
|
||||
#define SU_TS0_GET_BS(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_BS_MASK) >> SU_TS0_BS_SHIFT)
|
||||
|
||||
#define SU_TS0_WS_SIZE 1
|
||||
#define SU_TS0_WS_SHIFT 17
|
||||
#define SU_TS0_WS_MASK 0x00020000
|
||||
#define SU_TS0_GET_WS(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_WS_MASK) >> SU_TS0_WS_SHIFT)
|
||||
|
||||
#define SU_TS0_LF_SIZE 1
|
||||
#define SU_TS0_LF_SHIFT 18
|
||||
#define SU_TS0_LF_MASK 0x00040000
|
||||
#define SU_TS0_GET_LF(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_LF_MASK) >> SU_TS0_LF_SHIFT)
|
||||
|
||||
#define SU_TS0_PF_SIZE 1
|
||||
#define SU_TS0_PF_SHIFT 19
|
||||
#define SU_TS0_PF_MASK 0x00080000
|
||||
#define SU_TS0_GET_PF(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_PF_MASK) >> SU_TS0_PF_SHIFT)
|
||||
|
||||
#define SU_TS0_PAD0_SIZE 4
|
||||
#define SU_TS0_PAD0_SHIFT 20
|
||||
#define SU_TS0_PAD0_MASK 0x00f00000
|
||||
#define SU_TS0_GET_PAD0(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_PAD0_MASK) >> SU_TS0_PAD0_SHIFT)
|
||||
|
||||
#define SU_TS0_RID_SIZE 8
|
||||
#define SU_TS0_RID_SHIFT 24
|
||||
#define SU_TS0_RID_MASK 0xff000000
|
||||
#define SU_TS0_GET_RID(su_ts0) \
|
||||
((((unsigned long)(su_ts0)) & SU_TS0_RID_MASK) >> SU_TS0_RID_SHIFT)
|
||||
|
||||
#define SU_SSMASK_SSMASK_SIZE 24
|
||||
#define SU_SSMASK_SSMASK_SHIFT 0
|
||||
#define SU_SSMASK_SSMASK_MASK 0x00ffffff
|
||||
#define SU_SSMASK_GET_SSMASK(su_ssmask) \
|
||||
((((unsigned long)(su_ssmask)) & SU_SSMASK_SSMASK_MASK) >> SU_SSMASK_SSMASK_SHIFT)
|
||||
|
||||
#define SU_SSMASK_RID_SIZE 8
|
||||
#define SU_SSMASK_RID_SHIFT 24
|
||||
#define SU_SSMASK_RID_MASK 0xff000000
|
||||
#define SU_SSMASK_GET_RID(su_ssmask) \
|
||||
((((unsigned long)(su_ssmask)) & SU_SSMASK_RID_MASK) >> SU_SSMASK_RID_SHIFT)
|
||||
|
||||
#define SU_SSMASK_TOTAL_SIZE 32
|
||||
#define SU_SSMASK(ssmask, rid) \
|
||||
((((unsigned long)(ssmask)) << SU_SSMASK_SSMASK_SHIFT) | \
|
||||
(((unsigned long)(rid)) << SU_SSMASK_RID_SHIFT))
|
||||
|
||||
#define SU_SCIS0_SY0_SIZE 11
|
||||
#define SU_SCIS0_SY0_SHIFT 0
|
||||
#define SU_SCIS0_SY0_MASK 0x000007ff
|
||||
#define SU_SCIS0_GET_SY0(su_scis0) \
|
||||
((((unsigned long)(su_scis0)) & SU_SCIS0_SY0_MASK) >> SU_SCIS0_SY0_SHIFT)
|
||||
#define SU_SCIS0_SET_SY0(su_scis0, sy0) { \
|
||||
su_scis0 = (((unsigned long)(su_scis0)) & ~SU_SCIS0_SY0_MASK) | (((unsigned long)(sy0)) << SU_SCIS0_SY0_SHIFT);\
|
||||
}
|
||||
|
||||
#define SU_SCIS0_SX0_SIZE 11
|
||||
#define SU_SCIS0_SX0_SHIFT 12
|
||||
#define SU_SCIS0_SX0_MASK 0x007ff000
|
||||
#define SU_SCIS0_GET_SX0(su_scis0) \
|
||||
((((unsigned long)(su_scis0)) & SU_SCIS0_SX0_MASK) >> SU_SCIS0_SX0_SHIFT)
|
||||
#define SU_SCIS0_SET_SX0(su_scis0, sx0) { \
|
||||
su_scis0 = (((unsigned long)(su_scis0)) & ~SU_SCIS0_SX0_MASK) | (((unsigned long)(sx0)) << SU_SCIS0_SX0_SHIFT);\
|
||||
}
|
||||
|
||||
#define SU_SCIS0_PAD1_SIZE 1
|
||||
#define SU_SCIS0_PAD1_SHIFT 23
|
||||
#define SU_SCIS0_PAD1_MASK 0x00800000
|
||||
#define SU_SCIS0_GET_PAD1(su_scis0) \
|
||||
((((unsigned long)(su_scis0)) & SU_SCIS0_PAD1_MASK) >> SU_SCIS0_PAD1_SHIFT)
|
||||
#define SU_SCIS0_SET_PAD1(su_scis0, pad1) { \
|
||||
su_scis0 = (((unsigned long)(su_scis0)) & ~SU_SCIS0_PAD1_MASK) | (((unsigned long)(pad1)) << SU_SCIS0_PAD1_SHIFT);\
|
||||
}
|
||||
|
||||
#define SU_SCIS1_SY1_SIZE 11
|
||||
#define SU_SCIS1_SY1_SHIFT 0
|
||||
#define SU_SCIS1_SY1_MASK 0x000007ff
|
||||
#define SU_SCIS1_GET_SY1(su_scis1) \
|
||||
((((unsigned long)(su_scis1)) & SU_SCIS1_SY1_MASK) >> SU_SCIS1_SY1_SHIFT)
|
||||
#define SU_SCIS1_SET_SY1(su_scis1, sy1) { \
|
||||
su_scis1 = (((unsigned long)(su_scis1)) & ~SU_SCIS1_SY1_MASK) | (((unsigned long)(sy1)) << SU_SCIS1_SY1_SHIFT);\
|
||||
}
|
||||
|
||||
#define SU_SCIS1_SX1_SIZE 11
|
||||
#define SU_SCIS1_SX1_SHIFT 12
|
||||
#define SU_SCIS1_SX1_MASK 0x007ff000
|
||||
#define SU_SCIS1_GET_SX1(su_scis1) \
|
||||
((((unsigned long)(su_scis1)) & SU_SCIS1_SX1_MASK) >> SU_SCIS1_SX1_SHIFT)
|
||||
#define SU_SCIS1_SET_SX1(su_scis1, sx1) { \
|
||||
su_scis1 = (((unsigned long)(su_scis1)) & ~SU_SCIS1_SX1_MASK) | (((unsigned long)(sx1)) << SU_SCIS1_SX1_SHIFT);\
|
||||
}
|
||||
|
||||
#define SC_SU_SCIS0_SET_SY0(line, su_scis0,sy0) \
|
||||
FAST_GPFLAGSET(line, su_scis0,sy0,SU_SCIS0_SY0)
|
||||
|
||||
#define SC_SU_SCIS0_SET_PAD0(line, su_scis0,pad0) \
|
||||
FAST_GPFLAGSET(line, su_scis0,pad0,SU_SCIS0_PAD0)
|
||||
|
||||
#define SC_SU_SCIS0_SET_SX0(line, su_scis0,sx0) \
|
||||
FAST_GPFLAGSET(line, su_scis0,sx0,SU_SCIS0_SX0)
|
||||
|
||||
#define SC_SU_SCIS0_SET_PAD1(line, su_scis0,pad1) \
|
||||
FAST_GPFLAGSET(line, su_scis0,pad1,SU_SCIS0_PAD1)
|
||||
|
||||
#define SC_SU_SCIS0_SET_RID(line, su_scis0,rid) \
|
||||
FAST_GPFLAGSET(line, su_scis0,rid,SU_SCIS0_RID)
|
||||
|
||||
#define SC_SU_SCIS1_SET_SY1(line, su_scis1,sy1) \
|
||||
FAST_GPFLAGSET(line, su_scis1,sy1,SU_SCIS1_SY1)
|
||||
|
||||
#define SC_SU_SCIS1_SET_PAD0(line, su_scis1,pad0) \
|
||||
FAST_GPFLAGSET(line, su_scis1,pad0,SU_SCIS1_PAD0)
|
||||
|
||||
#define SC_SU_SCIS1_SET_SX1(line, su_scis1,sx1) \
|
||||
FAST_GPFLAGSET(line, su_scis1,sx1,SU_SCIS1_SX1)
|
||||
|
||||
#define SC_SU_SCIS1_SET_PAD1(line, su_scis1,pad1) \
|
||||
FAST_GPFLAGSET(line, su_scis1,pad1,SU_SCIS1_PAD1)
|
||||
|
||||
#define SC_SU_SCIS1_SET_RID(line, su_scis1,rid) \
|
||||
FAST_GPFLAGSET(line, su_scis1,rid,SU_SCIS1_RID)
|
||||
|
||||
#define SC_SU_LPSIZE_SET_LSIZE(line, su_lpsize,lsize) \
|
||||
FAST_GPFLAGSET(line, su_lpsize,lsize,SU_LPSIZE_LSIZE)
|
||||
|
||||
#define SC_SU_LPSIZE_SET_PSIZE(line, su_lpsize,psize) \
|
||||
FAST_GPFLAGSET(line, su_lpsize,psize,SU_LPSIZE_PSIZE)
|
||||
|
||||
#define SC_SU_LPSIZE_SET_LTOFF(line, su_lpsize,ltoff) \
|
||||
FAST_GPFLAGSET(line, su_lpsize,ltoff,SU_LPSIZE_LTOFF)
|
||||
|
||||
#define SC_SU_LPSIZE_SET_PTOFF(line, su_lpsize,ptoff) \
|
||||
FAST_GPFLAGSET(line, su_lpsize,ptoff,SU_LPSIZE_PTOFF)
|
||||
|
||||
#define SC_SU_LPSIZE_SET_FIELDMODE(line, su_lpsize,fieldmode) \
|
||||
FAST_GPFLAGSET(line, su_lpsize,fieldmode,SU_LPSIZE_FIELDMODE)
|
||||
|
||||
#define SC_SU_LPSIZE_SET_PAD0(line, su_lpsize,pad0) \
|
||||
FAST_GPFLAGSET(line, su_lpsize,pad0,SU_LPSIZE_PAD0)
|
||||
|
||||
#define SC_SU_LPSIZE_SET_RID(line, su_lpsize,rid) \
|
||||
FAST_GPFLAGSET(line, su_lpsize,rid,SU_LPSIZE_RID)
|
||||
|
||||
#define SC_SU_TS0_SET_SSIZE(line, su_ts0,ssize) \
|
||||
FAST_GPFLAGSET(line, su_ts0,ssize,SU_TS0_SSIZE)
|
||||
|
||||
#define SC_SU_TS0_SET_BS(line, su_ts0,bs) \
|
||||
FAST_GPFLAGSET(line, su_ts0,bs,SU_TS0_BS)
|
||||
|
||||
#define SC_SU_TS0_SET_WS(line, su_ts0,ws) \
|
||||
FAST_GPFLAGSET(line, su_ts0,ws,SU_TS0_WS)
|
||||
|
||||
#define SC_SU_TS0_SET_LF(line, su_ts0,lf) \
|
||||
FAST_GPFLAGSET(line, su_ts0,lf,SU_TS0_LF)
|
||||
|
||||
#define SC_SU_TS0_SET_PF(line, su_ts0,pf) \
|
||||
FAST_GPFLAGSET(line, su_ts0,pf,SU_TS0_PF)
|
||||
|
||||
#define SC_SU_TS0_SET_PAD0(line, su_ts0,pad0) \
|
||||
FAST_GPFLAGSET(line, su_ts0,pad0,SU_TS0_PAD0)
|
||||
|
||||
#define SC_SU_TS0_SET_RID(line, su_ts0,rid) \
|
||||
FAST_GPFLAGSET(line, su_ts0,rid,SU_TS0_RID)
|
||||
|
||||
#define SC_SU_TS1_SET_TSIZE(line, su_ts1,tsize) \
|
||||
FAST_GPFLAGSET(line, su_ts1,tsize,SU_TS1_TSIZE)
|
||||
|
||||
#define SC_SU_TS1_SET_BT(line, su_ts1,bt) \
|
||||
FAST_GPFLAGSET(line, su_ts1,bt,SU_TS1_BT)
|
||||
|
||||
#define SC_SU_TS1_SET_WT(line, su_ts1,wt) \
|
||||
FAST_GPFLAGSET(line, su_ts1,wt,SU_TS1_WT)
|
||||
|
||||
#define SC_SU_TS1_SET_PAD0(line, su_ts1,pad0) \
|
||||
FAST_GPFLAGSET(line, su_ts1,pad0,SU_TS1_PAD0)
|
||||
|
||||
#define SC_SU_TS1_SET_RID(line, su_ts1,rid) \
|
||||
FAST_GPFLAGSET(line, su_ts1,rid,SU_TS1_RID)
|
||||
|
||||
#define SC_SU_PERF_SET_SELA(line, su_perf,selA) \
|
||||
FAST_GPFLAGSET(line, su_perf,selA,SU_PERF_SELA)
|
||||
|
||||
#define SC_SU_PERF_SET_SELB(line, su_perf,selB) \
|
||||
FAST_GPFLAGSET(line, su_perf,selB,SU_PERF_SELB)
|
||||
|
||||
#define SC_SU_PERF_SET_NTEX(line, su_perf,ntex) \
|
||||
FAST_GPFLAGSET(line, su_perf,ntex,SU_PERF_NTEX)
|
||||
|
||||
#define SC_SU_PERF_SET_NCOL(line, su_perf,ncol) \
|
||||
FAST_GPFLAGSET(line, su_perf,ncol,SU_PERF_NCOL)
|
||||
|
||||
#define SC_SU_PERF_SET_REJF(line, su_perf,rejf) \
|
||||
FAST_GPFLAGSET(line, su_perf,rejf,SU_PERF_REJF)
|
||||
|
||||
#define SC_SU_PERF_SET_REJS(line, su_perf,rejs) \
|
||||
FAST_GPFLAGSET(line, su_perf,rejs,SU_PERF_REJS)
|
||||
|
||||
#define SC_SU_PERF_SET_CMD(line, su_perf,cmd) \
|
||||
FAST_GPFLAGSET(line, su_perf,cmd,SU_PERF_CMD)
|
||||
|
||||
#define SC_SU_PERF_SET_PAD0(line, su_perf,pad0) \
|
||||
FAST_GPFLAGSET(line, su_perf,pad0,SU_PERF_PAD0)
|
||||
|
||||
#define SC_SU_PERF_SET_EN(line, su_perf,en) \
|
||||
FAST_GPFLAGSET(line, su_perf,en,SU_PERF_EN)
|
||||
|
||||
#define SC_SU_PERF_SET_PWR_EN(line, su_perf,pwr_en) \
|
||||
FAST_GPFLAGSET(line, su_perf,pwr_en,SU_PERF_PWR_EN)
|
||||
|
||||
#define SC_SU_PERF_SET_RID(line, su_perf,rid) \
|
||||
FAST_GPFLAGSET(line, su_perf,rid,SU_PERF_RID)
|
||||
|
||||
#define SC_SU_SSMASK_SET_SSMASK(line, su_ssmask,ssmask) \
|
||||
FAST_GPFLAGSET(line, su_ssmask,ssmask,SU_SSMASK_SSMASK)
|
||||
|
||||
#define SC_SU_SSMASK_SET_RID(line, su_ssmask,rid) \
|
||||
FAST_GPFLAGSET(line, su_ssmask,rid,SU_SSMASK_RID)
|
||||
|
||||
|
||||
#endif // SU_REG_H
|
||||
@@ -0,0 +1,729 @@
|
||||
#ifndef TEV_REG_H
|
||||
#define TEV_REG_H
|
||||
|
||||
#define TEV_COLOR_ENV_RID_SIZE 8
|
||||
#define TEV_COLOR_ENV_RID_SHIFT 24
|
||||
#define TEV_COLOR_ENV_RID_MASK 0xff000000
|
||||
#define TEV_COLOR_ENV_GET_RID(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_RID_MASK) >> TEV_COLOR_ENV_RID_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_RID_SIZE 8
|
||||
#define TEV_ALPHA_ENV_RID_SHIFT 24
|
||||
#define TEV_ALPHA_ENV_RID_MASK 0xff000000
|
||||
#define TEV_ALPHA_ENV_GET_RID(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_RID_MASK) >> TEV_ALPHA_ENV_RID_SHIFT)
|
||||
|
||||
#define TEV_KSEL_RID_SIZE 8
|
||||
#define TEV_KSEL_RID_SHIFT 24
|
||||
#define TEV_KSEL_RID_MASK 0xff000000
|
||||
#define TEV_KSEL_GET_RID(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_RID_MASK) >> TEV_KSEL_RID_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELD_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELD_SHIFT 4
|
||||
#define TEV_ALPHA_ENV_SELD_MASK 0x00000070
|
||||
#define TEV_ALPHA_ENV_GET_SELD(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELD_MASK) >> TEV_ALPHA_ENV_SELD_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELC_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELC_SHIFT 7
|
||||
#define TEV_ALPHA_ENV_SELC_MASK 0x00000380
|
||||
#define TEV_ALPHA_ENV_GET_SELC(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELC_MASK) >> TEV_ALPHA_ENV_SELC_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELB_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELB_SHIFT 10
|
||||
#define TEV_ALPHA_ENV_SELB_MASK 0x00001c00
|
||||
#define TEV_ALPHA_ENV_GET_SELB(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELB_MASK) >> TEV_ALPHA_ENV_SELB_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELA_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELA_SHIFT 13
|
||||
#define TEV_ALPHA_ENV_SELA_MASK 0x0000e000
|
||||
#define TEV_ALPHA_ENV_GET_SELA(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELA_MASK) >> TEV_ALPHA_ENV_SELA_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_SELD_SIZE 4
|
||||
#define TEV_COLOR_ENV_SELD_SHIFT 0
|
||||
#define TEV_COLOR_ENV_SELD_MASK 0x0000000f
|
||||
#define TEV_COLOR_ENV_GET_SELD(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_SELD_MASK) >> TEV_COLOR_ENV_SELD_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_SELC_SIZE 4
|
||||
#define TEV_COLOR_ENV_SELC_SHIFT 4
|
||||
#define TEV_COLOR_ENV_SELC_MASK 0x000000f0
|
||||
#define TEV_COLOR_ENV_GET_SELC(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_SELC_MASK) >> TEV_COLOR_ENV_SELC_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_SELB_SIZE 4
|
||||
#define TEV_COLOR_ENV_SELB_SHIFT 8
|
||||
#define TEV_COLOR_ENV_SELB_MASK 0x00000f00
|
||||
#define TEV_COLOR_ENV_GET_SELB(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_SELB_MASK) >> TEV_COLOR_ENV_SELB_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_SELA_SIZE 4
|
||||
#define TEV_COLOR_ENV_SELA_SHIFT 12
|
||||
#define TEV_COLOR_ENV_SELA_MASK 0x0000f000
|
||||
#define TEV_COLOR_ENV_GET_SELA(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_SELA_MASK) >> TEV_COLOR_ENV_SELA_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_BIAS_SIZE 2
|
||||
#define TEV_COLOR_ENV_BIAS_SHIFT 16
|
||||
#define TEV_COLOR_ENV_BIAS_MASK 0x00030000
|
||||
#define TEV_COLOR_ENV_GET_BIAS(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_BIAS_MASK) >> TEV_COLOR_ENV_BIAS_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_SUB_SIZE 1
|
||||
#define TEV_COLOR_ENV_SUB_SHIFT 18
|
||||
#define TEV_COLOR_ENV_SUB_MASK 0x00040000
|
||||
#define TEV_COLOR_ENV_GET_SUB(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_SUB_MASK) >> TEV_COLOR_ENV_SUB_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_CLAMP_SIZE 1
|
||||
#define TEV_COLOR_ENV_CLAMP_SHIFT 19
|
||||
#define TEV_COLOR_ENV_CLAMP_MASK 0x00080000
|
||||
#define TEV_COLOR_ENV_GET_CLAMP(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_CLAMP_MASK) >> TEV_COLOR_ENV_CLAMP_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_SHIFT_SIZE 2
|
||||
#define TEV_COLOR_ENV_SHIFT_SHIFT 20
|
||||
#define TEV_COLOR_ENV_SHIFT_MASK 0x00300000
|
||||
#define TEV_COLOR_ENV_GET_SHIFT(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_SHIFT_MASK) >> TEV_COLOR_ENV_SHIFT_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_DEST_SIZE 2
|
||||
#define TEV_COLOR_ENV_DEST_SHIFT 22
|
||||
#define TEV_COLOR_ENV_DEST_MASK 0x00c00000
|
||||
#define TEV_COLOR_ENV_GET_DEST(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_DEST_MASK) >> TEV_COLOR_ENV_DEST_SHIFT)
|
||||
|
||||
#define TEV_COLOR_ENV_RID_SIZE 8
|
||||
#define TEV_COLOR_ENV_RID_SHIFT 24
|
||||
#define TEV_COLOR_ENV_RID_MASK 0xff000000
|
||||
#define TEV_COLOR_ENV_GET_RID(tev_color_env) \
|
||||
((((unsigned long)(tev_color_env)) & TEV_COLOR_ENV_RID_MASK) >> TEV_COLOR_ENV_RID_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_MODE_SIZE 2
|
||||
#define TEV_ALPHA_ENV_MODE_SHIFT 0
|
||||
#define TEV_ALPHA_ENV_MODE_MASK 0x00000003
|
||||
#define TEV_ALPHA_ENV_GET_MODE(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_MODE_MASK) >> TEV_ALPHA_ENV_MODE_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SWAP_SIZE 2
|
||||
#define TEV_ALPHA_ENV_SWAP_SHIFT 2
|
||||
#define TEV_ALPHA_ENV_SWAP_MASK 0x0000000c
|
||||
#define TEV_ALPHA_ENV_GET_SWAP(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SWAP_MASK) >> TEV_ALPHA_ENV_SWAP_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELD_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELD_SHIFT 4
|
||||
#define TEV_ALPHA_ENV_SELD_MASK 0x00000070
|
||||
#define TEV_ALPHA_ENV_GET_SELD(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELD_MASK) >> TEV_ALPHA_ENV_SELD_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELC_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELC_SHIFT 7
|
||||
#define TEV_ALPHA_ENV_SELC_MASK 0x00000380
|
||||
#define TEV_ALPHA_ENV_GET_SELC(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELC_MASK) >> TEV_ALPHA_ENV_SELC_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELB_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELB_SHIFT 10
|
||||
#define TEV_ALPHA_ENV_SELB_MASK 0x00001c00
|
||||
#define TEV_ALPHA_ENV_GET_SELB(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELB_MASK) >> TEV_ALPHA_ENV_SELB_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SELA_SIZE 3
|
||||
#define TEV_ALPHA_ENV_SELA_SHIFT 13
|
||||
#define TEV_ALPHA_ENV_SELA_MASK 0x0000e000
|
||||
#define TEV_ALPHA_ENV_GET_SELA(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SELA_MASK) >> TEV_ALPHA_ENV_SELA_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_BIAS_SIZE 2
|
||||
#define TEV_ALPHA_ENV_BIAS_SHIFT 16
|
||||
#define TEV_ALPHA_ENV_BIAS_MASK 0x00030000
|
||||
#define TEV_ALPHA_ENV_GET_BIAS(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_BIAS_MASK) >> TEV_ALPHA_ENV_BIAS_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SUB_SIZE 1
|
||||
#define TEV_ALPHA_ENV_SUB_SHIFT 18
|
||||
#define TEV_ALPHA_ENV_SUB_MASK 0x00040000
|
||||
#define TEV_ALPHA_ENV_GET_SUB(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SUB_MASK) >> TEV_ALPHA_ENV_SUB_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_CLAMP_SIZE 1
|
||||
#define TEV_ALPHA_ENV_CLAMP_SHIFT 19
|
||||
#define TEV_ALPHA_ENV_CLAMP_MASK 0x00080000
|
||||
#define TEV_ALPHA_ENV_GET_CLAMP(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_CLAMP_MASK) >> TEV_ALPHA_ENV_CLAMP_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_SHIFT_SIZE 2
|
||||
#define TEV_ALPHA_ENV_SHIFT_SHIFT 20
|
||||
#define TEV_ALPHA_ENV_SHIFT_MASK 0x00300000
|
||||
#define TEV_ALPHA_ENV_GET_SHIFT(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_SHIFT_MASK) >> TEV_ALPHA_ENV_SHIFT_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_DEST_SIZE 2
|
||||
#define TEV_ALPHA_ENV_DEST_SHIFT 22
|
||||
#define TEV_ALPHA_ENV_DEST_MASK 0x00c00000
|
||||
#define TEV_ALPHA_ENV_GET_DEST(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_DEST_MASK) >> TEV_ALPHA_ENV_DEST_SHIFT)
|
||||
|
||||
#define TEV_ALPHA_ENV_RID_SIZE 8
|
||||
#define TEV_ALPHA_ENV_RID_SHIFT 24
|
||||
#define TEV_ALPHA_ENV_RID_MASK 0xff000000
|
||||
#define TEV_ALPHA_ENV_GET_RID(tev_alpha_env) \
|
||||
((((unsigned long)(tev_alpha_env)) & TEV_ALPHA_ENV_RID_MASK) >> TEV_ALPHA_ENV_RID_SHIFT)
|
||||
|
||||
#define TEV_REGISTERL_R_SIZE 11
|
||||
#define TEV_REGISTERL_R_SHIFT 0
|
||||
#define TEV_REGISTERL_R_MASK 0x000007ff
|
||||
#define TEV_REGISTERL_GET_R(tev_registerl) \
|
||||
((((unsigned long)(tev_registerl)) & TEV_REGISTERL_R_MASK) >> TEV_REGISTERL_R_SHIFT)
|
||||
|
||||
#define TEV_REGISTERL_PAD0_SIZE 1
|
||||
#define TEV_REGISTERL_PAD0_SHIFT 11
|
||||
#define TEV_REGISTERL_PAD0_MASK 0x00000800
|
||||
#define TEV_REGISTERL_GET_PAD0(tev_registerl) \
|
||||
((((unsigned long)(tev_registerl)) & TEV_REGISTERL_PAD0_MASK) >> TEV_REGISTERL_PAD0_SHIFT)
|
||||
|
||||
#define TEV_REGISTERL_A_SIZE 11
|
||||
#define TEV_REGISTERL_A_SHIFT 12
|
||||
#define TEV_REGISTERL_A_MASK 0x007ff000
|
||||
#define TEV_REGISTERL_GET_A(tev_registerl) \
|
||||
((((unsigned long)(tev_registerl)) & TEV_REGISTERL_A_MASK) >> TEV_REGISTERL_A_SHIFT)
|
||||
|
||||
#define TEV_REGISTERL_PAD1_SIZE 1
|
||||
#define TEV_REGISTERL_PAD1_SHIFT 23
|
||||
#define TEV_REGISTERL_PAD1_MASK 0x00800000
|
||||
#define TEV_REGISTERL_GET_PAD1(tev_registerl) \
|
||||
((((unsigned long)(tev_registerl)) & TEV_REGISTERL_PAD1_MASK) >> TEV_REGISTERL_PAD1_SHIFT)
|
||||
|
||||
#define TEV_REGISTERL_RID_SIZE 8
|
||||
#define TEV_REGISTERL_RID_SHIFT 24
|
||||
#define TEV_REGISTERL_RID_MASK 0xff000000
|
||||
#define TEV_REGISTERL_GET_RID(tev_registerl) \
|
||||
((((unsigned long)(tev_registerl)) & TEV_REGISTERL_RID_MASK) >> TEV_REGISTERL_RID_SHIFT)
|
||||
|
||||
#define TEV_REGISTERL_TOTAL_SIZE 32
|
||||
#define TEV_REGISTERL(r, a, rid) \
|
||||
((((unsigned long)(r)) << TEV_REGISTERL_R_SHIFT) | \
|
||||
(((unsigned long)(a)) << TEV_REGISTERL_A_SHIFT) | \
|
||||
(((unsigned long)(rid)) << TEV_REGISTERL_RID_SHIFT))
|
||||
|
||||
#define TEV_KREGISTERL_R_SIZE 8
|
||||
#define TEV_KREGISTERL_R_SHIFT 0
|
||||
#define TEV_KREGISTERL_R_MASK 0x000000ff
|
||||
#define TEV_KREGISTERL_GET_R(tev_kregisterl) \
|
||||
((((unsigned long)(tev_kregisterl)) & TEV_KREGISTERL_R_MASK) >> TEV_KREGISTERL_R_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERL_PAD0_SIZE 4
|
||||
#define TEV_KREGISTERL_PAD0_SHIFT 8
|
||||
#define TEV_KREGISTERL_PAD0_MASK 0x00000f00
|
||||
#define TEV_KREGISTERL_GET_PAD0(tev_kregisterl) \
|
||||
((((unsigned long)(tev_kregisterl)) & TEV_KREGISTERL_PAD0_MASK) >> TEV_KREGISTERL_PAD0_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERL_A_SIZE 8
|
||||
#define TEV_KREGISTERL_A_SHIFT 12
|
||||
#define TEV_KREGISTERL_A_MASK 0x000ff000
|
||||
#define TEV_KREGISTERL_GET_A(tev_kregisterl) \
|
||||
((((unsigned long)(tev_kregisterl)) & TEV_KREGISTERL_A_MASK) >> TEV_KREGISTERL_A_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERL_PAD1_SIZE 4
|
||||
#define TEV_KREGISTERL_PAD1_SHIFT 20
|
||||
#define TEV_KREGISTERL_PAD1_MASK 0x00f00000
|
||||
#define TEV_KREGISTERL_GET_PAD1(tev_kregisterl) \
|
||||
((((unsigned long)(tev_kregisterl)) & TEV_KREGISTERL_PAD1_MASK) >> TEV_KREGISTERL_PAD1_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERL_RID_SIZE 8
|
||||
#define TEV_KREGISTERL_RID_SHIFT 24
|
||||
#define TEV_KREGISTERL_RID_MASK 0xff000000
|
||||
#define TEV_KREGISTERL_GET_RID(tev_kregisterl) \
|
||||
((((unsigned long)(tev_kregisterl)) & TEV_KREGISTERL_RID_MASK) >> TEV_KREGISTERL_RID_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERL_TOTAL_SIZE 32
|
||||
#define TEV_KREGISTERL(r, a, rid) \
|
||||
((((unsigned long)(r)) << TEV_KREGISTERL_R_SHIFT) | \
|
||||
(((unsigned long)(a)) << TEV_KREGISTERL_A_SHIFT) | \
|
||||
(((unsigned long)(rid)) << TEV_KREGISTERL_RID_SHIFT))
|
||||
|
||||
#define TEV_REGISTERH_B_SIZE 11
|
||||
#define TEV_REGISTERH_B_SHIFT 0
|
||||
#define TEV_REGISTERH_B_MASK 0x000007ff
|
||||
#define TEV_REGISTERH_GET_B(tev_registerh) \
|
||||
((((unsigned long)(tev_registerh)) & TEV_REGISTERH_B_MASK) >> TEV_REGISTERH_B_SHIFT)
|
||||
|
||||
#define TEV_REGISTERH_PAD0_SIZE 1
|
||||
#define TEV_REGISTERH_PAD0_SHIFT 11
|
||||
#define TEV_REGISTERH_PAD0_MASK 0x00000800
|
||||
#define TEV_REGISTERH_GET_PAD0(tev_registerh) \
|
||||
((((unsigned long)(tev_registerh)) & TEV_REGISTERH_PAD0_MASK) >> TEV_REGISTERH_PAD0_SHIFT)
|
||||
|
||||
#define TEV_REGISTERH_G_SIZE 11
|
||||
#define TEV_REGISTERH_G_SHIFT 12
|
||||
#define TEV_REGISTERH_G_MASK 0x007ff000
|
||||
#define TEV_REGISTERH_GET_G(tev_registerh) \
|
||||
((((unsigned long)(tev_registerh)) & TEV_REGISTERH_G_MASK) >> TEV_REGISTERH_G_SHIFT)
|
||||
|
||||
#define TEV_REGISTERH_PAD1_SIZE 1
|
||||
#define TEV_REGISTERH_PAD1_SHIFT 23
|
||||
#define TEV_REGISTERH_PAD1_MASK 0x00800000
|
||||
#define TEV_REGISTERH_GET_PAD1(tev_registerh) \
|
||||
((((unsigned long)(tev_registerh)) & TEV_REGISTERH_PAD1_MASK) >> TEV_REGISTERH_PAD1_SHIFT)
|
||||
|
||||
#define TEV_REGISTERH_RID_SIZE 8
|
||||
#define TEV_REGISTERH_RID_SHIFT 24
|
||||
#define TEV_REGISTERH_RID_MASK 0xff000000
|
||||
#define TEV_REGISTERH_GET_RID(tev_registerh) \
|
||||
((((unsigned long)(tev_registerh)) & TEV_REGISTERH_RID_MASK) >> TEV_REGISTERH_RID_SHIFT)
|
||||
|
||||
#define TEV_REGISTERH_TOTAL_SIZE 32
|
||||
#define TEV_REGISTERH(b, g, rid) \
|
||||
((((unsigned long)(b)) << TEV_REGISTERH_B_SHIFT) | \
|
||||
(((unsigned long)(g)) << TEV_REGISTERH_G_SHIFT) | \
|
||||
(((unsigned long)(rid)) << TEV_REGISTERH_RID_SHIFT))
|
||||
|
||||
#define TEV_KREGISTERH_B_SIZE 8
|
||||
#define TEV_KREGISTERH_B_SHIFT 0
|
||||
#define TEV_KREGISTERH_B_MASK 0x000000ff
|
||||
#define TEV_KREGISTERH_GET_B(tev_kregisterh) \
|
||||
((((unsigned long)(tev_kregisterh)) & TEV_KREGISTERH_B_MASK) >> TEV_KREGISTERH_B_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERH_PAD0_SIZE 4
|
||||
#define TEV_KREGISTERH_PAD0_SHIFT 8
|
||||
#define TEV_KREGISTERH_PAD0_MASK 0x00000f00
|
||||
#define TEV_KREGISTERH_GET_PAD0(tev_kregisterh) \
|
||||
((((unsigned long)(tev_kregisterh)) & TEV_KREGISTERH_PAD0_MASK) >> TEV_KREGISTERH_PAD0_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERH_G_SIZE 8
|
||||
#define TEV_KREGISTERH_G_SHIFT 12
|
||||
#define TEV_KREGISTERH_G_MASK 0x000ff000
|
||||
#define TEV_KREGISTERH_GET_G(tev_kregisterh) \
|
||||
((((unsigned long)(tev_kregisterh)) & TEV_KREGISTERH_G_MASK) >> TEV_KREGISTERH_G_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERH_PAD1_SIZE 4
|
||||
#define TEV_KREGISTERH_PAD1_SHIFT 20
|
||||
#define TEV_KREGISTERH_PAD1_MASK 0x00f00000
|
||||
#define TEV_KREGISTERH_GET_PAD1(tev_kregisterh) \
|
||||
((((unsigned long)(tev_kregisterh)) & TEV_KREGISTERH_PAD1_MASK) >> TEV_KREGISTERH_PAD1_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERH_RID_SIZE 8
|
||||
#define TEV_KREGISTERH_RID_SHIFT 24
|
||||
#define TEV_KREGISTERH_RID_MASK 0xff000000
|
||||
#define TEV_KREGISTERH_GET_RID(tev_kregisterh) \
|
||||
((((unsigned long)(tev_kregisterh)) & TEV_KREGISTERH_RID_MASK) >> TEV_KREGISTERH_RID_SHIFT)
|
||||
|
||||
#define TEV_KREGISTERH_TOTAL_SIZE 32
|
||||
#define TEV_KREGISTERH(b, g, rid) \
|
||||
((((unsigned long)(b)) << TEV_KREGISTERH_B_SHIFT) | \
|
||||
(((unsigned long)(g)) << TEV_KREGISTERH_G_SHIFT) | \
|
||||
(((unsigned long)(rid)) << TEV_KREGISTERH_RID_SHIFT))
|
||||
|
||||
#define TEV_KSEL_XRB_SIZE 2
|
||||
#define TEV_KSEL_XRB_SHIFT 0
|
||||
#define TEV_KSEL_XRB_MASK 0x00000003
|
||||
#define TEV_KSEL_GET_XRB(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_XRB_MASK) >> TEV_KSEL_XRB_SHIFT)
|
||||
|
||||
#define TEV_KSEL_XGA_SIZE 2
|
||||
#define TEV_KSEL_XGA_SHIFT 2
|
||||
#define TEV_KSEL_XGA_MASK 0x0000000c
|
||||
#define TEV_KSEL_GET_XGA(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_XGA_MASK) >> TEV_KSEL_XGA_SHIFT)
|
||||
|
||||
#define TEV_KSEL_KCSEL0_SIZE 5
|
||||
#define TEV_KSEL_KCSEL0_SHIFT 4
|
||||
#define TEV_KSEL_KCSEL0_MASK 0x000001f0
|
||||
#define TEV_KSEL_GET_KCSEL0(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_KCSEL0_MASK) >> TEV_KSEL_KCSEL0_SHIFT)
|
||||
|
||||
#define TEV_KSEL_KASEL0_SIZE 5
|
||||
#define TEV_KSEL_KASEL0_SHIFT 9
|
||||
#define TEV_KSEL_KASEL0_MASK 0x00003e00
|
||||
#define TEV_KSEL_GET_KASEL0(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_KASEL0_MASK) >> TEV_KSEL_KASEL0_SHIFT)
|
||||
|
||||
#define TEV_KSEL_KCSEL1_SIZE 5
|
||||
#define TEV_KSEL_KCSEL1_SHIFT 14
|
||||
#define TEV_KSEL_KCSEL1_MASK 0x0007c000
|
||||
#define TEV_KSEL_GET_KCSEL1(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_KCSEL1_MASK) >> TEV_KSEL_KCSEL1_SHIFT)
|
||||
|
||||
#define TEV_KSEL_KASEL1_SIZE 5
|
||||
#define TEV_KSEL_KASEL1_SHIFT 19
|
||||
#define TEV_KSEL_KASEL1_MASK 0x00f80000
|
||||
#define TEV_KSEL_GET_KASEL1(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_KASEL1_MASK) >> TEV_KSEL_KASEL1_SHIFT)
|
||||
|
||||
#define TEV_KSEL_RID_SIZE 8
|
||||
#define TEV_KSEL_RID_SHIFT 24
|
||||
#define TEV_KSEL_RID_MASK 0xff000000
|
||||
#define TEV_KSEL_GET_RID(tev_ksel) \
|
||||
((((unsigned long)(tev_ksel)) & TEV_KSEL_RID_MASK) >> TEV_KSEL_RID_SHIFT)
|
||||
|
||||
#define TEV_ALPHAFUNC_A0_SIZE 8
|
||||
#define TEV_ALPHAFUNC_A0_SHIFT 0
|
||||
#define TEV_ALPHAFUNC_A0_MASK 0x000000ff
|
||||
#define TEV_ALPHAFUNC_GET_A0(tev_alphafunc) \
|
||||
((((unsigned long)(tev_alphafunc)) & TEV_ALPHAFUNC_A0_MASK) >> TEV_ALPHAFUNC_A0_SHIFT)
|
||||
|
||||
#define TEV_ALPHAFUNC_A1_SIZE 8
|
||||
#define TEV_ALPHAFUNC_A1_SHIFT 8
|
||||
#define TEV_ALPHAFUNC_A1_MASK 0x0000ff00
|
||||
#define TEV_ALPHAFUNC_GET_A1(tev_alphafunc) \
|
||||
((((unsigned long)(tev_alphafunc)) & TEV_ALPHAFUNC_A1_MASK) >> TEV_ALPHAFUNC_A1_SHIFT)
|
||||
|
||||
#define TEV_ALPHAFUNC_OP0_SIZE 3
|
||||
#define TEV_ALPHAFUNC_OP0_SHIFT 16
|
||||
#define TEV_ALPHAFUNC_OP0_MASK 0x00070000
|
||||
#define TEV_ALPHAFUNC_GET_OP0(tev_alphafunc) \
|
||||
((((unsigned long)(tev_alphafunc)) & TEV_ALPHAFUNC_OP0_MASK) >> TEV_ALPHAFUNC_OP0_SHIFT)
|
||||
|
||||
#define TEV_ALPHAFUNC_OP1_SIZE 3
|
||||
#define TEV_ALPHAFUNC_OP1_SHIFT 19
|
||||
#define TEV_ALPHAFUNC_OP1_MASK 0x00380000
|
||||
#define TEV_ALPHAFUNC_GET_OP1(tev_alphafunc) \
|
||||
((((unsigned long)(tev_alphafunc)) & TEV_ALPHAFUNC_OP1_MASK) >> TEV_ALPHAFUNC_OP1_SHIFT)
|
||||
|
||||
#define TEV_ALPHAFUNC_LOGIC_SIZE 2
|
||||
#define TEV_ALPHAFUNC_LOGIC_SHIFT 22
|
||||
#define TEV_ALPHAFUNC_LOGIC_MASK 0x00c00000
|
||||
#define TEV_ALPHAFUNC_GET_LOGIC(tev_alphafunc) \
|
||||
((((unsigned long)(tev_alphafunc)) & TEV_ALPHAFUNC_LOGIC_MASK) >> TEV_ALPHAFUNC_LOGIC_SHIFT)
|
||||
|
||||
#define TEV_ALPHAFUNC_RID_SIZE 8
|
||||
#define TEV_ALPHAFUNC_RID_SHIFT 24
|
||||
#define TEV_ALPHAFUNC_RID_MASK 0xff000000
|
||||
#define TEV_ALPHAFUNC_GET_RID(tev_alphafunc) \
|
||||
((((unsigned long)(tev_alphafunc)) & TEV_ALPHAFUNC_RID_MASK) >> TEV_ALPHAFUNC_RID_SHIFT)
|
||||
|
||||
#define TEV_Z_ENV_0_ZOFF_SIZE 24
|
||||
#define TEV_Z_ENV_0_ZOFF_SHIFT 0
|
||||
#define TEV_Z_ENV_0_ZOFF_MASK 0x00ffffff
|
||||
#define TEV_Z_ENV_0_GET_ZOFF(tev_z_env_0) \
|
||||
((((unsigned long)(tev_z_env_0)) & TEV_Z_ENV_0_ZOFF_MASK) >> TEV_Z_ENV_0_ZOFF_SHIFT)
|
||||
|
||||
#define TEV_Z_ENV_0_RID_SIZE 8
|
||||
#define TEV_Z_ENV_0_RID_SHIFT 24
|
||||
#define TEV_Z_ENV_0_RID_MASK 0xff000000
|
||||
#define TEV_Z_ENV_0_GET_RID(tev_z_env_0) \
|
||||
((((unsigned long)(tev_z_env_0)) & TEV_Z_ENV_0_RID_MASK) >> TEV_Z_ENV_0_RID_SHIFT)
|
||||
|
||||
#define TEV_Z_ENV_1_TYPE_SIZE 2
|
||||
#define TEV_Z_ENV_1_TYPE_SHIFT 0
|
||||
#define TEV_Z_ENV_1_TYPE_MASK 0x00000003
|
||||
#define TEV_Z_ENV_1_GET_TYPE(tev_z_env_1) \
|
||||
((((unsigned long)(tev_z_env_1)) & TEV_Z_ENV_1_TYPE_MASK) >> TEV_Z_ENV_1_TYPE_SHIFT)
|
||||
|
||||
#define TEV_Z_ENV_1_OP_SIZE 2
|
||||
#define TEV_Z_ENV_1_OP_SHIFT 2
|
||||
#define TEV_Z_ENV_1_OP_MASK 0x0000000c
|
||||
#define TEV_Z_ENV_1_GET_OP(tev_z_env_1) \
|
||||
((((unsigned long)(tev_z_env_1)) & TEV_Z_ENV_1_OP_MASK) >> TEV_Z_ENV_1_OP_SHIFT)
|
||||
|
||||
#define TEV_Z_ENV_1_PAD0_SIZE 20
|
||||
#define TEV_Z_ENV_1_PAD0_SHIFT 4
|
||||
#define TEV_Z_ENV_1_PAD0_MASK 0x00fffff0
|
||||
#define TEV_Z_ENV_1_GET_PAD0(tev_z_env_1) \
|
||||
((((unsigned long)(tev_z_env_1)) & TEV_Z_ENV_1_PAD0_MASK) >> TEV_Z_ENV_1_PAD0_SHIFT)
|
||||
|
||||
#define TEV_Z_ENV_1_RID_SIZE 8
|
||||
#define TEV_Z_ENV_1_RID_SHIFT 24
|
||||
#define TEV_Z_ENV_1_RID_MASK 0xff000000
|
||||
#define TEV_Z_ENV_1_GET_RID(tev_z_env_1) \
|
||||
((((unsigned long)(tev_z_env_1)) & TEV_Z_ENV_1_RID_MASK) >> TEV_Z_ENV_1_RID_SHIFT)
|
||||
|
||||
typedef struct {
|
||||
unsigned long rid : 8;
|
||||
unsigned long dest : 2;
|
||||
unsigned long shift : 2;
|
||||
unsigned long clamp : 1;
|
||||
unsigned long sub : 1;
|
||||
unsigned long bias : 2;
|
||||
unsigned long sela : 4;
|
||||
unsigned long selb : 4;
|
||||
unsigned long selc : 4;
|
||||
unsigned long seld : 4;
|
||||
} tev_color_env_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned long rid : 8;
|
||||
unsigned long dest : 2;
|
||||
unsigned long shift : 2;
|
||||
unsigned long clamp : 1;
|
||||
unsigned long sub : 1;
|
||||
unsigned long bias : 2;
|
||||
unsigned long sela : 3;
|
||||
unsigned long selb : 3;
|
||||
unsigned long selc : 3;
|
||||
unsigned long seld : 3;
|
||||
unsigned long swap : 2;
|
||||
unsigned long mode : 2;
|
||||
} tev_alpha_env_t;
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_SELD(line, tev_color_env,seld) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,seld,TEV_COLOR_ENV_SELD)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_SELC(line, tev_color_env,selc) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,selc,TEV_COLOR_ENV_SELC)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_SELB(line, tev_color_env,selb) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,selb,TEV_COLOR_ENV_SELB)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_SELA(line, tev_color_env,sela) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,sela,TEV_COLOR_ENV_SELA)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_BIAS(line, tev_color_env,bias) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,bias,TEV_COLOR_ENV_BIAS)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_SUB(line, tev_color_env,sub) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,sub,TEV_COLOR_ENV_SUB)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_CLAMP(line, tev_color_env,clamp) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,clamp,TEV_COLOR_ENV_CLAMP)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_SHIFT(line, tev_color_env,shift) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,shift,TEV_COLOR_ENV_SHIFT)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_DEST(line, tev_color_env,dest) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,dest,TEV_COLOR_ENV_DEST)
|
||||
|
||||
#define SC_TEV_COLOR_ENV_SET_RID(line, tev_color_env,rid) \
|
||||
FAST_GPFLAGSET(line, tev_color_env,rid,TEV_COLOR_ENV_RID)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_MODE(line, tev_alpha_env,mode) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,mode,TEV_ALPHA_ENV_MODE)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_SWAP(line, tev_alpha_env,swap) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,swap,TEV_ALPHA_ENV_SWAP)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_SELD(line, tev_alpha_env,seld) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,seld,TEV_ALPHA_ENV_SELD)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_SELC(line, tev_alpha_env,selc) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,selc,TEV_ALPHA_ENV_SELC)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_SELB(line, tev_alpha_env,selb) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,selb,TEV_ALPHA_ENV_SELB)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_SELA(line, tev_alpha_env,sela) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,sela,TEV_ALPHA_ENV_SELA)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_BIAS(line, tev_alpha_env,bias) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,bias,TEV_ALPHA_ENV_BIAS)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_SUB(line, tev_alpha_env,sub) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,sub,TEV_ALPHA_ENV_SUB)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_CLAMP(line, tev_alpha_env,clamp) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,clamp,TEV_ALPHA_ENV_CLAMP)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_SHIFT(line, tev_alpha_env,shift) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,shift,TEV_ALPHA_ENV_SHIFT)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_DEST(line, tev_alpha_env,dest) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,dest,TEV_ALPHA_ENV_DEST)
|
||||
|
||||
#define SC_TEV_ALPHA_ENV_SET_RID(line, tev_alpha_env,rid) \
|
||||
FAST_GPFLAGSET(line, tev_alpha_env,rid,TEV_ALPHA_ENV_RID)
|
||||
|
||||
#define SC_TEV_REGISTERL_SET_R(line, tev_registerl,r) \
|
||||
FAST_GPFLAGSET(line, tev_registerl,r,TEV_REGISTERL_R)
|
||||
|
||||
#define SC_TEV_REGISTERL_SET_PAD0(line, tev_registerl,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_registerl,pad0,TEV_REGISTERL_PAD0)
|
||||
|
||||
#define SC_TEV_REGISTERL_SET_A(line, tev_registerl,a) \
|
||||
FAST_GPFLAGSET(line, tev_registerl,a,TEV_REGISTERL_A)
|
||||
|
||||
#define SC_TEV_REGISTERL_SET_PAD1(line, tev_registerl,pad1) \
|
||||
FAST_GPFLAGSET(line, tev_registerl,pad1,TEV_REGISTERL_PAD1)
|
||||
|
||||
#define SC_TEV_REGISTERL_SET_RID(line, tev_registerl,rid) \
|
||||
FAST_GPFLAGSET(line, tev_registerl,rid,TEV_REGISTERL_RID)
|
||||
|
||||
#define SC_TEV_REGISTERH_SET_B(line, tev_registerh,b) \
|
||||
FAST_GPFLAGSET(line, tev_registerh,b,TEV_REGISTERH_B)
|
||||
|
||||
#define SC_TEV_REGISTERH_SET_PAD0(line, tev_registerh,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_registerh,pad0,TEV_REGISTERH_PAD0)
|
||||
|
||||
#define SC_TEV_REGISTERH_SET_G(line, tev_registerh,g) \
|
||||
FAST_GPFLAGSET(line, tev_registerh,g,TEV_REGISTERH_G)
|
||||
|
||||
#define SC_TEV_REGISTERH_SET_PAD1(line, tev_registerh,pad1) \
|
||||
FAST_GPFLAGSET(line, tev_registerh,pad1,TEV_REGISTERH_PAD1)
|
||||
|
||||
#define SC_TEV_REGISTERH_SET_RID(line, tev_registerh,rid) \
|
||||
FAST_GPFLAGSET(line, tev_registerh,rid,TEV_REGISTERH_RID)
|
||||
|
||||
#define SC_TEV_KREGISTERL_SET_R(line, tev_kregisterl,r) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterl,r,TEV_KREGISTERL_R)
|
||||
|
||||
#define SC_TEV_KREGISTERL_SET_PAD0(line, tev_kregisterl,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterl,pad0,TEV_KREGISTERL_PAD0)
|
||||
|
||||
#define SC_TEV_KREGISTERL_SET_A(line, tev_kregisterl,a) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterl,a,TEV_KREGISTERL_A)
|
||||
|
||||
#define SC_TEV_KREGISTERL_SET_PAD1(line, tev_kregisterl,pad1) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterl,pad1,TEV_KREGISTERL_PAD1)
|
||||
|
||||
#define SC_TEV_KREGISTERL_SET_RID(line, tev_kregisterl,rid) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterl,rid,TEV_KREGISTERL_RID)
|
||||
|
||||
#define SC_TEV_KREGISTERH_SET_B(line, tev_kregisterh,b) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterh,b,TEV_KREGISTERH_B)
|
||||
|
||||
#define SC_TEV_KREGISTERH_SET_PAD0(line, tev_kregisterh,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterh,pad0,TEV_KREGISTERH_PAD0)
|
||||
|
||||
#define SC_TEV_KREGISTERH_SET_G(line, tev_kregisterh,g) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterh,g,TEV_KREGISTERH_G)
|
||||
|
||||
#define SC_TEV_KREGISTERH_SET_PAD1(line, tev_kregisterh,pad1) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterh,pad1,TEV_KREGISTERH_PAD1)
|
||||
|
||||
#define SC_TEV_KREGISTERH_SET_RID(line, tev_kregisterh,rid) \
|
||||
FAST_GPFLAGSET(line, tev_kregisterh,rid,TEV_KREGISTERH_RID)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_0_SET_A_MANT(line, tev_fog_param_0,a_mant) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_0,a_mant,TEV_FOG_PARAM_0_A_MANT)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_0_SET_A_EXPN(line, tev_fog_param_0,a_expn) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_0,a_expn,TEV_FOG_PARAM_0_A_EXPN)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_0_SET_A_SIGN(line, tev_fog_param_0,a_sign) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_0,a_sign,TEV_FOG_PARAM_0_A_SIGN)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_0_SET_PAD0(line, tev_fog_param_0,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_0,pad0,TEV_FOG_PARAM_0_PAD0)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_0_SET_RID(line, tev_fog_param_0,rid) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_0,rid,TEV_FOG_PARAM_0_RID)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_1_SET_B_MAG(line, tev_fog_param_1,b_mag) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_1,b_mag,TEV_FOG_PARAM_1_B_MAG)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_1_SET_RID(line, tev_fog_param_1,rid) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_1,rid,TEV_FOG_PARAM_1_RID)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_2_SET_B_SHF(line, tev_fog_param_2,b_shf) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_2,b_shf,TEV_FOG_PARAM_2_B_SHF)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_2_SET_PAD0(line, tev_fog_param_2,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_2,pad0,TEV_FOG_PARAM_2_PAD0)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_2_SET_RID(line, tev_fog_param_2,rid) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_2,rid,TEV_FOG_PARAM_2_RID)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_3_SET_C_MANT(line, tev_fog_param_3,c_mant) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_3,c_mant,TEV_FOG_PARAM_3_C_MANT)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_3_SET_C_EXPN(line, tev_fog_param_3,c_expn) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_3,c_expn,TEV_FOG_PARAM_3_C_EXPN)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_3_SET_C_SIGN(line, tev_fog_param_3,c_sign) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_3,c_sign,TEV_FOG_PARAM_3_C_SIGN)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_3_SET_PROJ(line, tev_fog_param_3,proj) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_3,proj,TEV_FOG_PARAM_3_PROJ)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_3_SET_FSEL(line, tev_fog_param_3,fsel) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_3,fsel,TEV_FOG_PARAM_3_FSEL)
|
||||
|
||||
#define SC_TEV_FOG_PARAM_3_SET_RID(line, tev_fog_param_3,rid) \
|
||||
FAST_GPFLAGSET(line, tev_fog_param_3,rid,TEV_FOG_PARAM_3_RID)
|
||||
|
||||
#define SC_TEV_RANGE_ADJ_C_SET_CENTER(line, tev_range_adj_c,center) \
|
||||
FAST_GPFLAGSET(line, tev_range_adj_c,center,TEV_RANGE_ADJ_C_CENTER)
|
||||
|
||||
#define SC_TEV_RANGE_ADJ_C_SET_ENB(line, tev_range_adj_c,enb) \
|
||||
FAST_GPFLAGSET(line, tev_range_adj_c,enb,TEV_RANGE_ADJ_C_ENB)
|
||||
|
||||
#define SC_TEV_RANGE_ADJ_C_SET_PAD0(line, tev_range_adj_c,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_range_adj_c,pad0,TEV_RANGE_ADJ_C_PAD0)
|
||||
|
||||
#define SC_TEV_RANGE_ADJ_C_SET_RID(line, tev_range_adj_c,rid) \
|
||||
FAST_GPFLAGSET(line, tev_range_adj_c,rid,TEV_RANGE_ADJ_C_RID)
|
||||
|
||||
#define SC_TEV_RANGE_ADJ_SET_R0(line, tev_range_adj,r0) \
|
||||
FAST_GPFLAGSET(line, tev_range_adj,r0,TEV_RANGE_ADJ_R0)
|
||||
|
||||
#define SC_TEV_RANGE_ADJ_SET_R1(line, tev_range_adj,r1) \
|
||||
FAST_GPFLAGSET(line, tev_range_adj,r1,TEV_RANGE_ADJ_R1)
|
||||
|
||||
#define SC_TEV_RANGE_ADJ_SET_RID(line, tev_range_adj,rid) \
|
||||
FAST_GPFLAGSET(line, tev_range_adj,rid,TEV_RANGE_ADJ_RID)
|
||||
|
||||
#define SC_TEV_FOG_COLOR_SET_B(line, tev_fog_color,b) \
|
||||
FAST_GPFLAGSET(line, tev_fog_color,b,TEV_FOG_COLOR_B)
|
||||
|
||||
#define SC_TEV_FOG_COLOR_SET_G(line, tev_fog_color,g) \
|
||||
FAST_GPFLAGSET(line, tev_fog_color,g,TEV_FOG_COLOR_G)
|
||||
|
||||
#define SC_TEV_FOG_COLOR_SET_R(line, tev_fog_color,r) \
|
||||
FAST_GPFLAGSET(line, tev_fog_color,r,TEV_FOG_COLOR_R)
|
||||
|
||||
#define SC_TEV_FOG_COLOR_SET_RID(line, tev_fog_color,rid) \
|
||||
FAST_GPFLAGSET(line, tev_fog_color,rid,TEV_FOG_COLOR_RID)
|
||||
|
||||
#define SC_TEV_ALPHAFUNC_SET_A0(line, tev_alphafunc,a0) \
|
||||
FAST_GPFLAGSET(line, tev_alphafunc,a0,TEV_ALPHAFUNC_A0)
|
||||
|
||||
#define SC_TEV_ALPHAFUNC_SET_A1(line, tev_alphafunc,a1) \
|
||||
FAST_GPFLAGSET(line, tev_alphafunc,a1,TEV_ALPHAFUNC_A1)
|
||||
|
||||
#define SC_TEV_ALPHAFUNC_SET_OP0(line, tev_alphafunc,op0) \
|
||||
FAST_GPFLAGSET(line, tev_alphafunc,op0,TEV_ALPHAFUNC_OP0)
|
||||
|
||||
#define SC_TEV_ALPHAFUNC_SET_OP1(line, tev_alphafunc,op1) \
|
||||
FAST_GPFLAGSET(line, tev_alphafunc,op1,TEV_ALPHAFUNC_OP1)
|
||||
|
||||
#define SC_TEV_ALPHAFUNC_SET_LOGIC(line, tev_alphafunc,logic) \
|
||||
FAST_GPFLAGSET(line, tev_alphafunc,logic,TEV_ALPHAFUNC_LOGIC)
|
||||
|
||||
#define SC_TEV_ALPHAFUNC_SET_RID(line, tev_alphafunc,rid) \
|
||||
FAST_GPFLAGSET(line, tev_alphafunc,rid,TEV_ALPHAFUNC_RID)
|
||||
|
||||
#define SC_TEV_Z_ENV_0_SET_ZOFF(line, tev_z_env_0,zoff) \
|
||||
FAST_GPFLAGSET(line, tev_z_env_0,zoff,TEV_Z_ENV_0_ZOFF)
|
||||
|
||||
#define SC_TEV_Z_ENV_0_SET_RID(line, tev_z_env_0,rid) \
|
||||
FAST_GPFLAGSET(line, tev_z_env_0,rid,TEV_Z_ENV_0_RID)
|
||||
|
||||
#define SC_TEV_Z_ENV_1_SET_TYPE(line, tev_z_env_1,type) \
|
||||
FAST_GPFLAGSET(line, tev_z_env_1,type,TEV_Z_ENV_1_TYPE)
|
||||
|
||||
#define SC_TEV_Z_ENV_1_SET_OP(line, tev_z_env_1,op) \
|
||||
FAST_GPFLAGSET(line, tev_z_env_1,op,TEV_Z_ENV_1_OP)
|
||||
|
||||
#define SC_TEV_Z_ENV_1_SET_PAD0(line, tev_z_env_1,pad0) \
|
||||
FAST_GPFLAGSET(line, tev_z_env_1,pad0,TEV_Z_ENV_1_PAD0)
|
||||
|
||||
#define SC_TEV_Z_ENV_1_SET_RID(line, tev_z_env_1,rid) \
|
||||
FAST_GPFLAGSET(line, tev_z_env_1,rid,TEV_Z_ENV_1_RID)
|
||||
|
||||
#define SC_TEV_KSEL_SET_XRB(line, tev_ksel,xrb) \
|
||||
FAST_GPFLAGSET(line, tev_ksel,xrb,TEV_KSEL_XRB)
|
||||
|
||||
#define SC_TEV_KSEL_SET_XGA(line, tev_ksel,xga) \
|
||||
FAST_GPFLAGSET(line, tev_ksel,xga,TEV_KSEL_XGA)
|
||||
|
||||
#define SC_TEV_KSEL_SET_KCSEL0(line, tev_ksel,kcsel0) \
|
||||
FAST_GPFLAGSET(line, tev_ksel,kcsel0,TEV_KSEL_KCSEL0)
|
||||
|
||||
#define SC_TEV_KSEL_SET_KASEL0(line, tev_ksel,kasel0) \
|
||||
FAST_GPFLAGSET(line, tev_ksel,kasel0,TEV_KSEL_KASEL0)
|
||||
|
||||
#define SC_TEV_KSEL_SET_KCSEL1(line, tev_ksel,kcsel1) \
|
||||
FAST_GPFLAGSET(line, tev_ksel,kcsel1,TEV_KSEL_KCSEL1)
|
||||
|
||||
#define SC_TEV_KSEL_SET_KASEL1(line, tev_ksel,kasel1) \
|
||||
FAST_GPFLAGSET(line, tev_ksel,kasel1,TEV_KSEL_KASEL1)
|
||||
|
||||
#define SC_TEV_KSEL_SET_RID(line, tev_ksel,rid) \
|
||||
FAST_GPFLAGSET(line, tev_ksel,rid,TEV_KSEL_RID)
|
||||
|
||||
|
||||
#endif // TEV_REG_H
|
||||
@@ -0,0 +1,125 @@
|
||||
#ifndef TX_REG_H
|
||||
#define TX_REG_H
|
||||
|
||||
#define TX_REFRESH_INTERVAL_SIZE 10
|
||||
#define TX_REFRESH_INTERVAL_SHIFT 0
|
||||
#define TX_REFRESH_INTERVAL_MASK 0x000003ff
|
||||
#define TX_REFRESH_GET_INTERVAL(tx_refresh) \
|
||||
((((unsigned long)(tx_refresh)) & TX_REFRESH_INTERVAL_MASK) >> TX_REFRESH_INTERVAL_SHIFT)
|
||||
|
||||
#define TX_REFRESH_ENABLE_SIZE 1
|
||||
#define TX_REFRESH_ENABLE_SHIFT 10
|
||||
#define TX_REFRESH_ENABLE_MASK 0x00000400
|
||||
#define TX_REFRESH_GET_ENABLE(tx_refresh) \
|
||||
((((unsigned long)(tx_refresh)) & TX_REFRESH_ENABLE_MASK) >> TX_REFRESH_ENABLE_SHIFT)
|
||||
|
||||
#define TX_REFRESH_PAD0_SIZE 13
|
||||
#define TX_REFRESH_PAD0_SHIFT 11
|
||||
#define TX_REFRESH_PAD0_MASK 0x00fff800
|
||||
#define TX_REFRESH_GET_PAD0(tx_refresh) \
|
||||
((((unsigned long)(tx_refresh)) & TX_REFRESH_PAD0_MASK) >> TX_REFRESH_PAD0_SHIFT)
|
||||
#define TX_REFRESH_SET_PAD0(tx_refresh, pad0) { \
|
||||
FDL_ASSERT(!((pad0) & ~((1 << TX_REFRESH_PAD0_SIZE)-1))); \
|
||||
tx_refresh = (((unsigned long)(tx_refresh)) & ~TX_REFRESH_PAD0_MASK) | (((unsigned long)(pad0)) << TX_REFRESH_PAD0_SHIFT);\
|
||||
}
|
||||
#define TX_REFRESH_RID_SIZE 8
|
||||
#define TX_REFRESH_RID_SHIFT 24
|
||||
#define TX_REFRESH_RID_MASK 0xff000000
|
||||
#define TX_REFRESH_GET_RID(tx_refresh) \
|
||||
((((unsigned long)(tx_refresh)) & TX_REFRESH_RID_MASK) >> TX_REFRESH_RID_SHIFT)
|
||||
#define TX_REFRESH_SET_RID(tx_refresh, rid) { \
|
||||
FDL_ASSERT(!((rid) & ~((1 << TX_REFRESH_RID_SIZE)-1))); \
|
||||
tx_refresh = (((unsigned long)(tx_refresh)) & ~TX_REFRESH_RID_MASK) | (((unsigned long)(rid)) << TX_REFRESH_RID_SHIFT);\
|
||||
}
|
||||
#define TX_REFRESH_TOTAL_SIZE 32
|
||||
#define TX_REFRESH(interval, enable, rid) \
|
||||
((((unsigned long)(interval)) << TX_REFRESH_INTERVAL_SHIFT) | \
|
||||
(((unsigned long)(enable)) << TX_REFRESH_ENABLE_SHIFT) | \
|
||||
(((unsigned long)(rid)) << TX_REFRESH_RID_SHIFT))
|
||||
|
||||
#define TX_PERFMODE_SEL3_SIZE 5
|
||||
#define TX_PERFMODE_SEL3_SHIFT 0
|
||||
#define TX_PERFMODE_SEL3_MASK 0x0000001f
|
||||
#define TX_PERFMODE_GET_SEL3(tx_perfmode) \
|
||||
((((unsigned long)(tx_perfmode)) & TX_PERFMODE_SEL3_MASK) >> TX_PERFMODE_SEL3_SHIFT)
|
||||
|
||||
#define TX_PERFMODE_SEL2_SIZE 5
|
||||
#define TX_PERFMODE_SEL2_SHIFT 5
|
||||
#define TX_PERFMODE_SEL2_MASK 0x000003e0
|
||||
#define TX_PERFMODE_GET_SEL2(tx_perfmode) \
|
||||
((((unsigned long)(tx_perfmode)) & TX_PERFMODE_SEL2_MASK) >> TX_PERFMODE_SEL2_SHIFT)
|
||||
|
||||
#define TX_PERFMODE_SEL1_SIZE 5
|
||||
#define TX_PERFMODE_SEL1_SHIFT 10
|
||||
#define TX_PERFMODE_SEL1_MASK 0x00007c00
|
||||
#define TX_PERFMODE_GET_SEL1(tx_perfmode) \
|
||||
((((unsigned long)(tx_perfmode)) & TX_PERFMODE_SEL1_MASK) >> TX_PERFMODE_SEL1_SHIFT)
|
||||
|
||||
#define TX_PERFMODE_SEL0_SIZE 5
|
||||
#define TX_PERFMODE_SEL0_SHIFT 15
|
||||
#define TX_PERFMODE_SEL0_MASK 0x000f8000
|
||||
#define TX_PERFMODE_GET_SEL0(tx_perfmode) \
|
||||
((((unsigned long)(tx_perfmode)) & TX_PERFMODE_SEL0_MASK) >> TX_PERFMODE_SEL0_SHIFT)
|
||||
|
||||
#define TX_PERFMODE_PAD0_SIZE 4
|
||||
#define TX_PERFMODE_PAD0_SHIFT 20
|
||||
#define TX_PERFMODE_PAD0_MASK 0x00f00000
|
||||
#define TX_PERFMODE_GET_PAD0(tx_perfmode) \
|
||||
((((unsigned long)(tx_perfmode)) & TX_PERFMODE_PAD0_MASK) >> TX_PERFMODE_PAD0_SHIFT)
|
||||
|
||||
#define TX_PERFMODE_RID_SIZE 8
|
||||
#define TX_PERFMODE_RID_SHIFT 24
|
||||
#define TX_PERFMODE_RID_MASK 0xff000000
|
||||
#define TX_PERFMODE_GET_RID(tx_perfmode) \
|
||||
((((unsigned long)(tx_perfmode)) & TX_PERFMODE_RID_MASK) >> TX_PERFMODE_RID_SHIFT)
|
||||
|
||||
#define TX_PERFMODE_TOTAL_SIZE 32
|
||||
#define TX_PERFMODE(sel3, sel2, sel1, sel0, rid) \
|
||||
((((unsigned long)(sel3)) << TX_PERFMODE_SEL3_SHIFT) | \
|
||||
(((unsigned long)(sel2)) << TX_PERFMODE_SEL2_SHIFT) | \
|
||||
(((unsigned long)(sel1)) << TX_PERFMODE_SEL1_SHIFT) | \
|
||||
(((unsigned long)(sel0)) << TX_PERFMODE_SEL0_SHIFT) | \
|
||||
(((unsigned long)(rid)) << TX_PERFMODE_RID_SHIFT))
|
||||
|
||||
#define TX_LOADBLOCK3_COUNT_SIZE 15
|
||||
#define TX_LOADBLOCK3_COUNT_SHIFT 0
|
||||
#define TX_LOADBLOCK3_COUNT_MASK 0x00007fff
|
||||
#define TX_LOADBLOCK3_GET_COUNT(tx_loadblock3) \
|
||||
((((unsigned long)(tx_loadblock3)) & TX_LOADBLOCK3_COUNT_MASK) >> TX_LOADBLOCK3_COUNT_SHIFT)
|
||||
#define TX_LOADBLOCK3_SET_COUNT(tx_loadblock3, count) { \
|
||||
FDL_ASSERT(!((count) & ~((1 << TX_LOADBLOCK3_COUNT_SIZE)-1))); \
|
||||
tx_loadblock3 = (((unsigned long)(tx_loadblock3)) & ~TX_LOADBLOCK3_COUNT_MASK) | (((unsigned long)(count)) << TX_LOADBLOCK3_COUNT_SHIFT);\
|
||||
}
|
||||
#define TX_LOADBLOCK3_FORMAT_SIZE 2
|
||||
#define TX_LOADBLOCK3_FORMAT_SHIFT 15
|
||||
#define TX_LOADBLOCK3_FORMAT_MASK 0x00018000
|
||||
#define TX_LOADBLOCK3_GET_FORMAT(tx_loadblock3) \
|
||||
((((unsigned long)(tx_loadblock3)) & TX_LOADBLOCK3_FORMAT_MASK) >> TX_LOADBLOCK3_FORMAT_SHIFT)
|
||||
#define TX_LOADBLOCK3_SET_FORMAT(tx_loadblock3, format) { \
|
||||
FDL_ASSERT(!((format) & ~((1 << TX_LOADBLOCK3_FORMAT_SIZE)-1))); \
|
||||
tx_loadblock3 = (((unsigned long)(tx_loadblock3)) & ~TX_LOADBLOCK3_FORMAT_MASK) | (((unsigned long)(format)) << TX_LOADBLOCK3_FORMAT_SHIFT);\
|
||||
}
|
||||
#define TX_LOADBLOCK3_PAD0_SIZE 7
|
||||
#define TX_LOADBLOCK3_PAD0_SHIFT 17
|
||||
#define TX_LOADBLOCK3_PAD0_MASK 0x00fe0000
|
||||
#define TX_LOADBLOCK3_GET_PAD0(tx_loadblock3) \
|
||||
((((unsigned long)(tx_loadblock3)) & TX_LOADBLOCK3_PAD0_MASK) >> TX_LOADBLOCK3_PAD0_SHIFT)
|
||||
#define TX_LOADBLOCK3_SET_PAD0(tx_loadblock3, pad0) { \
|
||||
FDL_ASSERT(!((pad0) & ~((1 << TX_LOADBLOCK3_PAD0_SIZE)-1))); \
|
||||
tx_loadblock3 = (((unsigned long)(tx_loadblock3)) & ~TX_LOADBLOCK3_PAD0_MASK) | (((unsigned long)(pad0)) << TX_LOADBLOCK3_PAD0_SHIFT);\
|
||||
}
|
||||
#define TX_LOADBLOCK3_RID_SIZE 8
|
||||
#define TX_LOADBLOCK3_RID_SHIFT 24
|
||||
#define TX_LOADBLOCK3_RID_MASK 0xff000000
|
||||
#define TX_LOADBLOCK3_GET_RID(tx_loadblock3) \
|
||||
((((unsigned long)(tx_loadblock3)) & TX_LOADBLOCK3_RID_MASK) >> TX_LOADBLOCK3_RID_SHIFT)
|
||||
#define TX_LOADBLOCK3_SET_RID(tx_loadblock3, rid) { \
|
||||
FDL_ASSERT(!((rid) & ~((1 << TX_LOADBLOCK3_RID_SIZE)-1))); \
|
||||
tx_loadblock3 = (((unsigned long)(tx_loadblock3)) & ~TX_LOADBLOCK3_RID_MASK) | (((unsigned long)(rid)) << TX_LOADBLOCK3_RID_SHIFT);\
|
||||
}
|
||||
#define TX_LOADBLOCK3_TOTAL_SIZE 32
|
||||
#define TX_LOADBLOCK3(count, format, rid) \
|
||||
((((unsigned long)(count)) << TX_LOADBLOCK3_COUNT_SHIFT) | \
|
||||
(((unsigned long)(format)) << TX_LOADBLOCK3_FORMAT_SHIFT) | \
|
||||
(((unsigned long)(rid)) << TX_LOADBLOCK3_RID_SHIFT))
|
||||
#endif // TX_REG_H
|
||||
@@ -0,0 +1,749 @@
|
||||
#ifndef XF_MEM_H
|
||||
#define XF_MEM_H
|
||||
|
||||
#define XF_TEXGEN_REGULAR 0x00000000
|
||||
#define XF_TEXGEN_BUMP_MAP 0x00000001
|
||||
#define XF_TEXGEN_COLOR_STRGBC0 0x00000002
|
||||
#define XF_TEXGEN_COLOR_STRGBC1 0x00000003
|
||||
#define XF_TEX_TEXGEN_TYPE_F_UNUSED_4 0x00000004
|
||||
#define XF_TEX_TEXGEN_TYPE_F_UNUSED_5 0x00000005
|
||||
#define XF_TEX_TEXGEN_TYPE_F_UNUSED_6 0x00000006
|
||||
#define XF_TEX_TEXGEN_TYPE_F_UNUSED_7 0x00000007
|
||||
|
||||
#define XF_ERROR_F_CTEX_BUG_ENABLE_SIZE 1
|
||||
#define XF_ERROR_F_CTEX_BUG_ENABLE_SHIFT 0
|
||||
#define XF_ERROR_F_CTEX_BUG_ENABLE_MASK 0x00000001
|
||||
#define XF_ERROR_F_GET_CTEX_BUG_ENABLE(xf_error_f) \
|
||||
((((unsigned long)(xf_error_f)) & XF_ERROR_F_CTEX_BUG_ENABLE_MASK) >> XF_ERROR_F_CTEX_BUG_ENABLE_SHIFT)
|
||||
|
||||
#define XF_ERROR_F_TFAN4_BUG_ENABLE_SIZE 1
|
||||
#define XF_ERROR_F_TFAN4_BUG_ENABLE_SHIFT 1
|
||||
#define XF_ERROR_F_TFAN4_BUG_ENABLE_MASK 0x00000002
|
||||
#define XF_ERROR_F_GET_TFAN4_BUG_ENABLE(xf_error_f) \
|
||||
((((unsigned long)(xf_error_f)) & XF_ERROR_F_TFAN4_BUG_ENABLE_MASK) >> XF_ERROR_F_TFAN4_BUG_ENABLE_SHIFT)
|
||||
|
||||
#define XF_ERROR_F_TFAN16_BUG_ENABLE_SIZE 1
|
||||
#define XF_ERROR_F_TFAN16_BUG_ENABLE_SHIFT 2
|
||||
#define XF_ERROR_F_TFAN16_BUG_ENABLE_MASK 0x00000004
|
||||
#define XF_ERROR_F_GET_TFAN16_BUG_ENABLE(xf_error_f) \
|
||||
((((unsigned long)(xf_error_f)) & XF_ERROR_F_TFAN16_BUG_ENABLE_MASK) >> XF_ERROR_F_TFAN16_BUG_ENABLE_SHIFT)
|
||||
|
||||
#define XF_ERROR_F_DUALTRAN_REG_ENABLE_SIZE 1
|
||||
#define XF_ERROR_F_DUALTRAN_REG_ENABLE_SHIFT 3
|
||||
#define XF_ERROR_F_DUALTRAN_REG_ENABLE_MASK 0x00000008
|
||||
#define XF_ERROR_F_GET_DUALTRAN_REG_ENABLE(xf_error_f) \
|
||||
((((unsigned long)(xf_error_f)) & XF_ERROR_F_DUALTRAN_REG_ENABLE_MASK) >> XF_ERROR_F_DUALTRAN_REG_ENABLE_SHIFT)
|
||||
|
||||
#define XF_ERROR_F_BYPASS_BUG_ENABLE_SIZE 1
|
||||
#define XF_ERROR_F_BYPASS_BUG_ENABLE_SHIFT 4
|
||||
#define XF_ERROR_F_BYPASS_BUG_ENABLE_MASK 0x00000010
|
||||
#define XF_ERROR_F_GET_BYPASS_BUG_ENABLE(xf_error_f) \
|
||||
((((unsigned long)(xf_error_f)) & XF_ERROR_F_BYPASS_BUG_ENABLE_MASK) >> XF_ERROR_F_BYPASS_BUG_ENABLE_SHIFT)
|
||||
|
||||
#define XF_ERROR_F_FAST_MATRIX_ENABLE_SIZE 1
|
||||
#define XF_ERROR_F_FAST_MATRIX_ENABLE_SHIFT 5
|
||||
#define XF_ERROR_F_FAST_MATRIX_ENABLE_MASK 0x00000020
|
||||
#define XF_ERROR_F_GET_FAST_MATRIX_ENABLE(xf_error_f) \
|
||||
((((unsigned long)(xf_error_f)) & XF_ERROR_F_FAST_MATRIX_ENABLE_MASK) >> XF_ERROR_F_FAST_MATRIX_ENABLE_SHIFT)
|
||||
|
||||
#define XF_DUALTEXTRAN_F_DUALTEXTRAN_ENABLE_SIZE 1
|
||||
#define XF_DUALTEXTRAN_F_DUALTEXTRAN_ENABLE_SHIFT 0
|
||||
#define XF_DUALTEXTRAN_F_DUALTEXTRAN_ENABLE_MASK 0x00000001
|
||||
#define XF_DUALTEXTRAN_F_GET_DUALTEXTRAN_ENABLE(xf_dualtextran_f) \
|
||||
((((unsigned long)(xf_dualtextran_f)) & XF_DUALTEXTRAN_F_DUALTEXTRAN_ENABLE_MASK) >> XF_DUALTEXTRAN_F_DUALTEXTRAN_ENABLE_SHIFT)
|
||||
|
||||
#define XF_PERF0_F(perf_a, perf_b, perf_c, perf_d) \
|
||||
((((unsigned long)(perf_a)) << XF_PERF0_F_PERF_A_SHIFT) | \
|
||||
(((unsigned long)(perf_b)) << XF_PERF0_F_PERF_B_SHIFT) | \
|
||||
(((unsigned long)(perf_c)) << XF_PERF0_F_PERF_C_SHIFT) | \
|
||||
(((unsigned long)(perf_d)) << XF_PERF0_F_PERF_D_SHIFT))
|
||||
|
||||
#define XF_INVERTEXSPEC_F_HOST_COLORS_SIZE 2
|
||||
#define XF_INVERTEXSPEC_F_HOST_COLORS_SHIFT 0
|
||||
#define XF_INVERTEXSPEC_F_HOST_COLORS_MASK 0x00000003
|
||||
#define XF_INVERTEXSPEC_F_GET_HOST_COLORS(xf_invertexspec_f) \
|
||||
((((unsigned long)(xf_invertexspec_f)) & XF_INVERTEXSPEC_F_HOST_COLORS_MASK) >> XF_INVERTEXSPEC_F_HOST_COLORS_SHIFT)
|
||||
|
||||
#define XF_INVERTEXSPEC_F_HOST_NORMAL_SIZE 2
|
||||
#define XF_INVERTEXSPEC_F_HOST_NORMAL_SHIFT 2
|
||||
#define XF_INVERTEXSPEC_F_HOST_NORMAL_MASK 0x0000000c
|
||||
#define XF_INVERTEXSPEC_F_GET_HOST_NORMAL(xf_invertexspec_f) \
|
||||
((((unsigned long)(xf_invertexspec_f)) & XF_INVERTEXSPEC_F_HOST_NORMAL_MASK) >> XF_INVERTEXSPEC_F_HOST_NORMAL_SHIFT)
|
||||
|
||||
#define XF_INVERTEXSPEC_F_HOST_TEXTURES_SIZE 4
|
||||
#define XF_INVERTEXSPEC_F_HOST_TEXTURES_SHIFT 4
|
||||
#define XF_INVERTEXSPEC_F_HOST_TEXTURES_MASK 0x000000f0
|
||||
#define XF_INVERTEXSPEC_F_GET_HOST_TEXTURES(xf_invertexspec_f) \
|
||||
((((unsigned long)(xf_invertexspec_f)) & XF_INVERTEXSPEC_F_HOST_TEXTURES_MASK) >> XF_INVERTEXSPEC_F_HOST_TEXTURES_SHIFT)
|
||||
|
||||
#define XF_INVERTEXSPEC_F_TOTAL_SIZE 8
|
||||
#define XF_INVERTEXSPEC_F_UNUSED_SIZE 24
|
||||
|
||||
#define XF_INVERTEXSPEC_F(host_colors, host_normal, host_textures) \
|
||||
((((unsigned long)(host_colors)) << XF_INVERTEXSPEC_F_HOST_COLORS_SHIFT) | \
|
||||
(((unsigned long)(host_normal)) << XF_INVERTEXSPEC_F_HOST_NORMAL_SHIFT) | \
|
||||
(((unsigned long)(host_textures)) << XF_INVERTEXSPEC_F_HOST_TEXTURES_SHIFT))
|
||||
|
||||
#define XF_TEX_RESERVED0_SIZE 1
|
||||
#define XF_TEX_RESERVED0_SHIFT 0
|
||||
#define XF_TEX_RESERVED0_MASK 0x00000001
|
||||
#define XF_TEX_GET_RESERVED0(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_RESERVED0_MASK) >> XF_TEX_RESERVED0_SHIFT)
|
||||
|
||||
#define XF_TEX_PROJECTION_SIZE 1
|
||||
#define XF_TEX_PROJECTION_SHIFT 1
|
||||
#define XF_TEX_PROJECTION_MASK 0x00000002
|
||||
#define XF_TEX_GET_PROJECTION(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_PROJECTION_MASK) >> XF_TEX_PROJECTION_SHIFT)
|
||||
|
||||
#define XF_TEX_INPUT_FORM_SIZE 1
|
||||
#define XF_TEX_INPUT_FORM_SHIFT 2
|
||||
#define XF_TEX_INPUT_FORM_MASK 0x00000004
|
||||
#define XF_TEX_GET_INPUT_FORM(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_INPUT_FORM_MASK) >> XF_TEX_INPUT_FORM_SHIFT)
|
||||
|
||||
#define XF_TEX_RESERVED1_SIZE 1
|
||||
#define XF_TEX_RESERVED1_SHIFT 3
|
||||
#define XF_TEX_RESERVED1_MASK 0x00000008
|
||||
#define XF_TEX_GET_RESERVED1(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_RESERVED1_MASK) >> XF_TEX_RESERVED1_SHIFT)
|
||||
|
||||
#define XF_TEX_TEXGEN_TYPE_SIZE 3
|
||||
#define XF_TEX_TEXGEN_TYPE_SHIFT 4
|
||||
#define XF_TEX_TEXGEN_TYPE_MASK 0x00000070
|
||||
#define XF_TEX_GET_TEXGEN_TYPE(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_TEXGEN_TYPE_MASK) >> XF_TEX_TEXGEN_TYPE_SHIFT)
|
||||
|
||||
#define XF_TEX_SOURCE_ROW_SIZE 5
|
||||
#define XF_TEX_SOURCE_ROW_SHIFT 7
|
||||
#define XF_TEX_SOURCE_ROW_MASK 0x00000f80
|
||||
#define XF_TEX_GET_SOURCE_ROW(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_SOURCE_ROW_MASK) >> XF_TEX_SOURCE_ROW_SHIFT)
|
||||
|
||||
#define XF_TEX_BUMP_MAP_SOURCE_SIZE 3
|
||||
#define XF_TEX_BUMP_MAP_SOURCE_SHIFT 12
|
||||
#define XF_TEX_BUMP_MAP_SOURCE_MASK 0x00007000
|
||||
#define XF_TEX_GET_BUMP_MAP_SOURCE(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_BUMP_MAP_SOURCE_MASK) >> XF_TEX_BUMP_MAP_SOURCE_SHIFT)
|
||||
|
||||
#define XF_TEX_BUMP_MAP_LIGHT_SIZE 3
|
||||
#define XF_TEX_BUMP_MAP_LIGHT_SHIFT 15
|
||||
#define XF_TEX_BUMP_MAP_LIGHT_MASK 0x00038000
|
||||
#define XF_TEX_GET_BUMP_MAP_LIGHT(xf_tex) \
|
||||
((((unsigned long)(xf_tex)) & XF_TEX_BUMP_MAP_LIGHT_MASK) >> XF_TEX_BUMP_MAP_LIGHT_SHIFT)
|
||||
|
||||
#define XF_TEX_TOTAL_SIZE 18
|
||||
#define XF_TEX_UNUSED_SIZE 14
|
||||
|
||||
#define XF_TEX(reserved0, projection, input_form, reserved1, texgen_type, source_row, bump_map_source, bump_map_light) \
|
||||
((((unsigned long)(reserved0)) << XF_TEX_RESERVED0_SHIFT) | \
|
||||
(((unsigned long)(projection)) << XF_TEX_PROJECTION_SHIFT) | \
|
||||
(((unsigned long)(input_form)) << XF_TEX_INPUT_FORM_SHIFT) | \
|
||||
(((unsigned long)(reserved1)) << XF_TEX_RESERVED1_SHIFT) | \
|
||||
(((unsigned long)(texgen_type)) << XF_TEX_TEXGEN_TYPE_SHIFT) | \
|
||||
(((unsigned long)(source_row)) << XF_TEX_SOURCE_ROW_SHIFT) | \
|
||||
(((unsigned long)(bump_map_source)) << XF_TEX_BUMP_MAP_SOURCE_SHIFT) | \
|
||||
(((unsigned long)(bump_map_light)) << XF_TEX_BUMP_MAP_LIGHT_SHIFT))
|
||||
|
||||
#define XF_DUALTEX_F_DUALMATRIX_ADRS_SIZE 6
|
||||
#define XF_DUALTEX_F_DUALMATRIX_ADRS_SHIFT 0
|
||||
#define XF_DUALTEX_F_DUALMATRIX_ADRS_MASK 0x0000003f
|
||||
#define XF_DUALTEX_F_GET_DUALMATRIX_ADRS(xf_dualtex_f) \
|
||||
((((unsigned long)(xf_dualtex_f)) & XF_DUALTEX_F_DUALMATRIX_ADRS_MASK) >> XF_DUALTEX_F_DUALMATRIX_ADRS_SHIFT)
|
||||
|
||||
#define XF_DUALTEX_F_RESERVED0_SIZE 2
|
||||
#define XF_DUALTEX_F_RESERVED0_SHIFT 6
|
||||
#define XF_DUALTEX_F_RESERVED0_MASK 0x000000c0
|
||||
#define XF_DUALTEX_F_GET_RESERVED0(xf_dualtex_f) \
|
||||
((((unsigned long)(xf_dualtex_f)) & XF_DUALTEX_F_RESERVED0_MASK) >> XF_DUALTEX_F_RESERVED0_SHIFT)
|
||||
|
||||
#define XF_DUALTEX_F_NORMAL_ENABLE_SIZE 1
|
||||
#define XF_DUALTEX_F_NORMAL_ENABLE_SHIFT 8
|
||||
#define XF_DUALTEX_F_NORMAL_ENABLE_MASK 0x00000100
|
||||
#define XF_DUALTEX_F_GET_NORMAL_ENABLE(xf_dualtex_f) \
|
||||
((((unsigned long)(xf_dualtex_f)) & XF_DUALTEX_F_NORMAL_ENABLE_MASK) >> XF_DUALTEX_F_NORMAL_ENABLE_SHIFT)
|
||||
|
||||
#define XF_DUALTEX_F_TOTAL_SIZE 9
|
||||
#define XF_DUALTEX_F_UNUSED_SIZE 23
|
||||
|
||||
#define XF_DUALTEX_F(dualmatrix_adrs, reserved0, normal_enable) \
|
||||
((((unsigned long)(dualmatrix_adrs)) << XF_DUALTEX_F_DUALMATRIX_ADRS_SHIFT) | \
|
||||
(((unsigned long)(reserved0)) << XF_DUALTEX_F_RESERVED0_SHIFT) | \
|
||||
(((unsigned long)(normal_enable)) << XF_DUALTEX_F_NORMAL_ENABLE_SHIFT))
|
||||
|
||||
#define XF_PERF0_F_PERF_A_SIZE 5
|
||||
#define XF_PERF0_F_PERF_A_SHIFT 0
|
||||
#define XF_PERF0_F_PERF_A_MASK 0x0000001f
|
||||
#define XF_PERF0_F_GET_PERF_A(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_A_MASK) >> XF_PERF0_F_PERF_A_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_PERF_B_SIZE 5
|
||||
#define XF_PERF0_F_PERF_B_SHIFT 5
|
||||
#define XF_PERF0_F_PERF_B_MASK 0x000003e0
|
||||
#define XF_PERF0_F_GET_PERF_B(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_B_MASK) >> XF_PERF0_F_PERF_B_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_PERF_C_SIZE 5
|
||||
#define XF_PERF0_F_PERF_C_SHIFT 10
|
||||
#define XF_PERF0_F_PERF_C_MASK 0x00007c00
|
||||
#define XF_PERF0_F_GET_PERF_C(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_C_MASK) >> XF_PERF0_F_PERF_C_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_PERF_D_SIZE 5
|
||||
#define XF_PERF0_F_PERF_D_SHIFT 15
|
||||
#define XF_PERF0_F_PERF_D_MASK 0x000f8000
|
||||
#define XF_PERF0_F_GET_PERF_D(xf_perf0_f) \
|
||||
((((unsigned long)(xf_perf0_f)) & XF_PERF0_F_PERF_D_MASK) >> XF_PERF0_F_PERF_D_SHIFT)
|
||||
|
||||
#define XF_PERF0_F_TOTAL_SIZE 20
|
||||
#define XF_PERF0_F_UNUSED_SIZE 12
|
||||
|
||||
#define XF_PERF0_F(perf_a, perf_b, perf_c, perf_d) \
|
||||
((((unsigned long)(perf_a)) << XF_PERF0_F_PERF_A_SHIFT) | \
|
||||
(((unsigned long)(perf_b)) << XF_PERF0_F_PERF_B_SHIFT) | \
|
||||
(((unsigned long)(perf_c)) << XF_PERF0_F_PERF_C_SHIFT) | \
|
||||
(((unsigned long)(perf_d)) << XF_PERF0_F_PERF_D_SHIFT))
|
||||
|
||||
#define XF_PERF1_F_PERF_TARGET_SIZE 7
|
||||
#define XF_PERF1_F_PERF_TARGET_SHIFT 0
|
||||
#define XF_PERF1_F_PERF_TARGET_MASK 0x0000007f
|
||||
#define XF_PERF1_F_GET_PERF_TARGET(xf_perf1_f) \
|
||||
((((unsigned long)(xf_perf1_f)) & XF_PERF1_F_PERF_TARGET_MASK) >> XF_PERF1_F_PERF_TARGET_SHIFT)
|
||||
|
||||
#define XF_PERF1_F_TOTAL_SIZE 7
|
||||
#define XF_PERF1_F_UNUSED_SIZE 25
|
||||
|
||||
#define XF_PERF1_F(perf_target) \
|
||||
((((unsigned long)(perf_target)) << XF_PERF1_F_PERF_TARGET_SHIFT))
|
||||
|
||||
#define XF_MATERIAL0_F_ALPHA_SIZE 8
|
||||
#define XF_MATERIAL0_F_ALPHA_SHIFT 0
|
||||
#define XF_MATERIAL0_F_ALPHA_MASK 0x000000ff
|
||||
#define XF_MATERIAL0_F_GET_ALPHA(xf_material0_f) \
|
||||
((((unsigned long)(xf_material0_f)) & XF_MATERIAL0_F_ALPHA_MASK) >> XF_MATERIAL0_F_ALPHA_SHIFT)
|
||||
#define XF_MATERIAL0_F_SET_ALPHA(xf_material0_f, alpha) { \
|
||||
xf_material0_f = (((unsigned long)(xf_material0_f)) & ~XF_MATERIAL0_F_ALPHA_MASK) | (((unsigned long)(alpha)) << XF_MATERIAL0_F_ALPHA_SHIFT);\
|
||||
}
|
||||
#define XF_MATERIAL0_F_BLUE_SIZE 8
|
||||
#define XF_MATERIAL0_F_BLUE_SHIFT 8
|
||||
#define XF_MATERIAL0_F_BLUE_MASK 0x0000ff00
|
||||
#define XF_MATERIAL0_F_GET_BLUE(xf_material0_f) \
|
||||
((((unsigned long)(xf_material0_f)) & XF_MATERIAL0_F_BLUE_MASK) >> XF_MATERIAL0_F_BLUE_SHIFT)
|
||||
#define XF_MATERIAL0_F_SET_BLUE(xf_material0_f, blue) { \
|
||||
xf_material0_f = (((unsigned long)(xf_material0_f)) & ~XF_MATERIAL0_F_BLUE_MASK) | (((unsigned long)(blue)) << XF_MATERIAL0_F_BLUE_SHIFT);\
|
||||
|
||||
#define XF_MATERIAL0_F_GREEN_SIZE 8
|
||||
#define XF_MATERIAL0_F_GREEN_SHIFT 16
|
||||
#define XF_MATERIAL0_F_GREEN_MASK 0x00ff0000
|
||||
#define XF_MATERIAL0_F_GET_GREEN(xf_material0_f) \
|
||||
((((unsigned long)(xf_material0_f)) & XF_MATERIAL0_F_GREEN_MASK) >> XF_MATERIAL0_F_GREEN_SHIFT)
|
||||
#define XF_MATERIAL0_F_SET_GREEN(xf_material0_f, green) { \
|
||||
xf_material0_f = (((unsigned long)(xf_material0_f)) & ~XF_MATERIAL0_F_GREEN_MASK) | (((unsigned long)(green)) << XF_MATERIAL0_F_GREEN_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_MATERIAL0_F_RED_SIZE 8
|
||||
#define XF_MATERIAL0_F_RED_SHIFT 24
|
||||
#define XF_MATERIAL0_F_RED_MASK 0xff000000
|
||||
#define XF_MATERIAL0_F_GET_RED(xf_material0_f) \
|
||||
((((unsigned long)(xf_material0_f)) & XF_MATERIAL0_F_RED_MASK) >> XF_MATERIAL0_F_RED_SHIFT)
|
||||
#define XF_MATERIAL0_F_SET_RED(xf_material0_f, red) { \
|
||||
xf_material0_f = (((unsigned long)(xf_material0_f)) & ~XF_MATERIAL0_F_RED_MASK) | (((unsigned long)(red)) << XF_MATERIAL0_F_RED_SHIFT);\
|
||||
}
|
||||
#define XF_MATERIAL0_F_TOTAL_SIZE 32
|
||||
#define XF_MATERIAL0_F(alpha, blue, green, red) \
|
||||
((((unsigned long)(alpha)) << XF_MATERIAL0_F_ALPHA_SHIFT) | \
|
||||
(((unsigned long)(blue)) << XF_MATERIAL0_F_BLUE_SHIFT) | \
|
||||
(((unsigned long)(green)) << XF_MATERIAL0_F_GREEN_SHIFT) | \
|
||||
(((unsigned long)(red)) << XF_MATERIAL0_F_RED_SHIFT))
|
||||
|
||||
#define XF_MATERIAL1_F_ALPHA_SIZE 8
|
||||
#define XF_MATERIAL1_F_ALPHA_SHIFT 0
|
||||
#define XF_MATERIAL1_F_ALPHA_MASK 0x000000ff
|
||||
#define XF_MATERIAL1_F_GET_ALPHA(xf_material1_f) \
|
||||
((((unsigned long)(xf_material1_f)) & XF_MATERIAL1_F_ALPHA_MASK) >> XF_MATERIAL1_F_ALPHA_SHIFT)
|
||||
#define XF_MATERIAL1_F_SET_ALPHA(xf_material1_f, alpha) { \
|
||||
xf_material1_f = (((unsigned long)(xf_material1_f)) & ~XF_MATERIAL1_F_ALPHA_MASK) | (((unsigned long)(alpha)) << XF_MATERIAL1_F_ALPHA_SHIFT);\
|
||||
}
|
||||
#define XF_MATERIAL1_F_BLUE_SIZE 8
|
||||
#define XF_MATERIAL1_F_BLUE_SHIFT 8
|
||||
#define XF_MATERIAL1_F_BLUE_MASK 0x0000ff00
|
||||
#define XF_MATERIAL1_F_GET_BLUE(xf_material1_f) \
|
||||
((((unsigned long)(xf_material1_f)) & XF_MATERIAL1_F_BLUE_MASK) >> XF_MATERIAL1_F_BLUE_SHIFT)
|
||||
#define XF_MATERIAL1_F_SET_BLUE(xf_material1_f, blue) { \
|
||||
xf_material1_f = (((unsigned long)(xf_material1_f)) & ~XF_MATERIAL1_F_BLUE_MASK) | (((unsigned long)(blue)) << XF_MATERIAL1_F_BLUE_SHIFT);\
|
||||
}
|
||||
#define XF_MATERIAL1_F_GREEN_SIZE 8
|
||||
#define XF_MATERIAL1_F_GREEN_SHIFT 16
|
||||
#define XF_MATERIAL1_F_GREEN_MASK 0x00ff0000
|
||||
#define XF_MATERIAL1_F_GET_GREEN(xf_material1_f) \
|
||||
((((unsigned long)(xf_material1_f)) & XF_MATERIAL1_F_GREEN_MASK) >> XF_MATERIAL1_F_GREEN_SHIFT)
|
||||
#define XF_MATERIAL1_F_SET_GREEN(xf_material1_f, green) { \
|
||||
xf_material1_f = (((unsigned long)(xf_material1_f)) & ~XF_MATERIAL1_F_GREEN_MASK) | (((unsigned long)(green)) << XF_MATERIAL1_F_GREEN_SHIFT);\
|
||||
}
|
||||
#define XF_MATERIAL1_F_RED_SIZE 8
|
||||
#define XF_MATERIAL1_F_RED_SHIFT 24
|
||||
#define XF_MATERIAL1_F_RED_MASK 0xff000000
|
||||
#define XF_MATERIAL1_F_GET_RED(xf_material1_f) \
|
||||
((((unsigned long)(xf_material1_f)) & XF_MATERIAL1_F_RED_MASK) >> XF_MATERIAL1_F_RED_SHIFT)
|
||||
#define XF_MATERIAL1_F_SET_RED(xf_material1_f, red) { \
|
||||
xf_material1_f = (((unsigned long)(xf_material1_f)) & ~XF_MATERIAL1_F_RED_MASK) | (((unsigned long)(red)) << XF_MATERIAL1_F_RED_SHIFT);\
|
||||
}
|
||||
#define XF_MATERIAL1_F_TOTAL_SIZE 32
|
||||
#define XF_MATERIAL1_F(alpha, blue, green, red) \
|
||||
((((unsigned long)(alpha)) << XF_MATERIAL1_F_ALPHA_SHIFT) | \
|
||||
(((unsigned long)(blue)) << XF_MATERIAL1_F_BLUE_SHIFT) | \
|
||||
(((unsigned long)(green)) << XF_MATERIAL1_F_GREEN_SHIFT) | \
|
||||
(((unsigned long)(red)) << XF_MATERIAL1_F_RED_SHIFT))
|
||||
|
||||
#define XF_COLOR0CNTRL_F_MATERIAL_SRC_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_MATERIAL_SRC_SHIFT 0
|
||||
#define XF_COLOR0CNTRL_F_MATERIAL_SRC_MASK 0x00000001
|
||||
#define XF_COLOR0CNTRL_F_GET_MATERIAL_SRC(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_MATERIAL_SRC_MASK) >> XF_COLOR0CNTRL_F_MATERIAL_SRC_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_MATERIAL_SRC(xf_color0cntrl_f, material_src) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_MATERIAL_SRC_MASK) | (((unsigned long)(material_src)) << XF_COLOR0CNTRL_F_MATERIAL_SRC_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHTFUNC_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHTFUNC_SHIFT 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHTFUNC_MASK 0x00000002
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHTFUNC(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHTFUNC_MASK) >> XF_COLOR0CNTRL_F_LIGHTFUNC_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHTFUNC(xf_color0cntrl_f, lightfunc) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHTFUNC_MASK) | (((unsigned long)(lightfunc)) << XF_COLOR0CNTRL_F_LIGHTFUNC_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_AMBIENT_SRC_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_AMBIENT_SRC_SHIFT 6
|
||||
#define XF_COLOR0CNTRL_F_AMBIENT_SRC_MASK 0x00000040
|
||||
#define XF_COLOR0CNTRL_F_GET_AMBIENT_SRC(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_AMBIENT_SRC_MASK) >> XF_COLOR0CNTRL_F_AMBIENT_SRC_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_AMBIENT_SRC(xf_color0cntrl_f, ambient_src) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_AMBIENT_SRC_MASK) | (((unsigned long)(ambient_src)) << XF_COLOR0CNTRL_F_AMBIENT_SRC_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_DIFFUSEATTEN_SIZE 2
|
||||
#define XF_COLOR0CNTRL_F_DIFFUSEATTEN_SHIFT 7
|
||||
#define XF_COLOR0CNTRL_F_DIFFUSEATTEN_MASK 0x00000180
|
||||
#define XF_COLOR0CNTRL_F_GET_DIFFUSEATTEN(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_DIFFUSEATTEN_MASK) >> XF_COLOR0CNTRL_F_DIFFUSEATTEN_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_DIFFUSEATTEN(xf_color0cntrl_f, diffuseatten) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_DIFFUSEATTEN_MASK) | (((unsigned long)(diffuseatten)) << XF_COLOR0CNTRL_F_DIFFUSEATTEN_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT0_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT0_SHIFT 2
|
||||
#define XF_COLOR0CNTRL_F_LIGHT0_MASK 0x00000004
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT0(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT0_MASK) >> XF_COLOR0CNTRL_F_LIGHT0_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT0(xf_color0cntrl_f, light0) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT0_MASK) | (((unsigned long)(light0)) << XF_COLOR0CNTRL_F_LIGHT0_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT1_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT1_SHIFT 3
|
||||
#define XF_COLOR0CNTRL_F_LIGHT1_MASK 0x00000008
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT1(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT1_MASK) >> XF_COLOR0CNTRL_F_LIGHT1_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT1(xf_color0cntrl_f, light1) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT1_MASK) | (((unsigned long)(light1)) << XF_COLOR0CNTRL_F_LIGHT1_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT2_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT2_SHIFT 4
|
||||
#define XF_COLOR0CNTRL_F_LIGHT2_MASK 0x00000010
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT2(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT2_MASK) >> XF_COLOR0CNTRL_F_LIGHT2_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT2(xf_color0cntrl_f, light2) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT2_MASK) | (((unsigned long)(light2)) << XF_COLOR0CNTRL_F_LIGHT2_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT3_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT3_SHIFT 5
|
||||
#define XF_COLOR0CNTRL_F_LIGHT3_MASK 0x00000020
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT3(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT3_MASK) >> XF_COLOR0CNTRL_F_LIGHT3_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT3(xf_color0cntrl_f, light3) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT3_MASK) | (((unsigned long)(light3)) << XF_COLOR0CNTRL_F_LIGHT3_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT4_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT4_SHIFT 11
|
||||
#define XF_COLOR0CNTRL_F_LIGHT4_MASK 0x00000800
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT4(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT4_MASK) >> XF_COLOR0CNTRL_F_LIGHT4_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT4(xf_color0cntrl_f, light4) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT4_MASK) | (((unsigned long)(light4)) << XF_COLOR0CNTRL_F_LIGHT4_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT5_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT5_SHIFT 12
|
||||
#define XF_COLOR0CNTRL_F_LIGHT5_MASK 0x00001000
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT5(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT5_MASK) >> XF_COLOR0CNTRL_F_LIGHT5_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT5(xf_color0cntrl_f, light5) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT5_MASK) | (((unsigned long)(light5)) << XF_COLOR0CNTRL_F_LIGHT5_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT6_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT6_SHIFT 13
|
||||
#define XF_COLOR0CNTRL_F_LIGHT6_MASK 0x00002000
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT6(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT6_MASK) >> XF_COLOR0CNTRL_F_LIGHT6_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT6(xf_color0cntrl_f, light6) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT6_MASK) | (((unsigned long)(light6)) << XF_COLOR0CNTRL_F_LIGHT6_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_LIGHT7_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_LIGHT7_SHIFT 14
|
||||
#define XF_COLOR0CNTRL_F_LIGHT7_MASK 0x00004000
|
||||
#define XF_COLOR0CNTRL_F_GET_LIGHT7(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_LIGHT7_MASK) >> XF_COLOR0CNTRL_F_LIGHT7_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_LIGHT7(xf_color0cntrl_f, light7) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_LIGHT7_MASK) | (((unsigned long)(light7)) << XF_COLOR0CNTRL_F_LIGHT7_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_ATTENENABLE_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_ATTENENABLE_SHIFT 9
|
||||
#define XF_COLOR0CNTRL_F_ATTENENABLE_MASK 0x00000200
|
||||
#define XF_COLOR0CNTRL_F_GET_ATTENENABLE(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_ATTENENABLE_MASK) >> XF_COLOR0CNTRL_F_ATTENENABLE_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_ATTENENABLE(xf_color0cntrl_f, attenenable) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_ATTENENABLE_MASK) | (((unsigned long)(attenenable)) << XF_COLOR0CNTRL_F_ATTENENABLE_SHIFT);\
|
||||
}
|
||||
|
||||
#define XF_COLOR0CNTRL_F_ATTENSELECT_SIZE 1
|
||||
#define XF_COLOR0CNTRL_F_ATTENSELECT_SHIFT 10
|
||||
#define XF_COLOR0CNTRL_F_ATTENSELECT_MASK 0x00000400
|
||||
#define XF_COLOR0CNTRL_F_GET_ATTENSELECT(xf_color0cntrl_f) \
|
||||
((((unsigned long)(xf_color0cntrl_f)) & XF_COLOR0CNTRL_F_ATTENSELECT_MASK) >> XF_COLOR0CNTRL_F_ATTENSELECT_SHIFT)
|
||||
#define XF_COLOR0CNTRL_F_SET_ATTENSELECT(xf_color0cntrl_f, attenselect) { \
|
||||
xf_color0cntrl_f = (((unsigned long)(xf_color0cntrl_f)) & ~XF_COLOR0CNTRL_F_ATTENSELECT_MASK) | (((unsigned long)(attenselect)) << XF_COLOR0CNTRL_F_ATTENSELECT_SHIFT);\
|
||||
}
|
||||
|
||||
#define SC_XF_AMBIENT0_F_SET_ALPHA(line, xf_ambient0_f,alpha) \
|
||||
FAST_GPFLAGSET(line, xf_ambient0_f,alpha,XF_AMBIENT0_F_ALPHA)
|
||||
|
||||
#define SC_XF_AMBIENT0_F_SET_BLUE(line, xf_ambient0_f,blue) \
|
||||
FAST_GPFLAGSET(line, xf_ambient0_f,blue,XF_AMBIENT0_F_BLUE)
|
||||
|
||||
#define SC_XF_AMBIENT0_F_SET_GREEN(line, xf_ambient0_f,green) \
|
||||
FAST_GPFLAGSET(line, xf_ambient0_f,green,XF_AMBIENT0_F_GREEN)
|
||||
|
||||
#define SC_XF_AMBIENT0_F_SET_RED(line, xf_ambient0_f,red) \
|
||||
FAST_GPFLAGSET(line, xf_ambient0_f,red,XF_AMBIENT0_F_RED)
|
||||
|
||||
#define SC_XF_AMBIENT1_F_SET_ALPHA(line, xf_ambient1_f,alpha) \
|
||||
FAST_GPFLAGSET(line, xf_ambient1_f,alpha,XF_AMBIENT1_F_ALPHA)
|
||||
|
||||
#define SC_XF_AMBIENT1_F_SET_BLUE(line, xf_ambient1_f,blue) \
|
||||
FAST_GPFLAGSET(line, xf_ambient1_f,blue,XF_AMBIENT1_F_BLUE)
|
||||
|
||||
#define SC_XF_AMBIENT1_F_SET_GREEN(line, xf_ambient1_f,green) \
|
||||
FAST_GPFLAGSET(line, xf_ambient1_f,green,XF_AMBIENT1_F_GREEN)
|
||||
|
||||
#define SC_XF_AMBIENT1_F_SET_RED(line, xf_ambient1_f,red) \
|
||||
FAST_GPFLAGSET(line, xf_ambient1_f,red,XF_AMBIENT1_F_RED)
|
||||
|
||||
#define SC_XF_MATERIAL0_F_SET_ALPHA(line, xf_material0_f,alpha) \
|
||||
FAST_GPFLAGSET(line, xf_material0_f,alpha,XF_MATERIAL0_F_ALPHA)
|
||||
|
||||
#define SC_XF_MATERIAL0_F_SET_BLUE(line, xf_material0_f,blue) \
|
||||
FAST_GPFLAGSET(line, xf_material0_f,blue,XF_MATERIAL0_F_BLUE)
|
||||
|
||||
#define SC_XF_MATERIAL0_F_SET_GREEN(line, xf_material0_f,green) \
|
||||
FAST_GPFLAGSET(line, xf_material0_f,green,XF_MATERIAL0_F_GREEN)
|
||||
|
||||
#define SC_XF_MATERIAL0_F_SET_RED(line, xf_material0_f,red) \
|
||||
FAST_GPFLAGSET(line, xf_material0_f,red,XF_MATERIAL0_F_RED)
|
||||
|
||||
#define SC_XF_MATERIAL1_F_SET_ALPHA(line, xf_material1_f,alpha) \
|
||||
FAST_GPFLAGSET(line, xf_material1_f,alpha,XF_MATERIAL1_F_ALPHA)
|
||||
|
||||
#define SC_XF_MATERIAL1_F_SET_BLUE(line, xf_material1_f,blue) \
|
||||
FAST_GPFLAGSET(line, xf_material1_f,blue,XF_MATERIAL1_F_BLUE)
|
||||
|
||||
#define SC_XF_MATERIAL1_F_SET_GREEN(line, xf_material1_f,green) \
|
||||
FAST_GPFLAGSET(line, xf_material1_f,green,XF_MATERIAL1_F_GREEN)
|
||||
|
||||
#define SC_XF_MATERIAL1_F_SET_RED(line, xf_material1_f,red) \
|
||||
FAST_GPFLAGSET(line, xf_material1_f,red,XF_MATERIAL1_F_RED)
|
||||
|
||||
#define SC_XF_MATRIXINDEX0_F_SET_GEOM(line, xf_matrixindex0_f,geom) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex0_f,geom,XF_MATRIXINDEX0_F_GEOM)
|
||||
|
||||
#define SC_XF_MATRIXINDEX0_F_SET_TEX0(line, xf_matrixindex0_f,tex0) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex0_f,tex0,XF_MATRIXINDEX0_F_TEX0)
|
||||
|
||||
#define SC_XF_MATRIXINDEX0_F_SET_TEX1(line, xf_matrixindex0_f,tex1) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex0_f,tex1,XF_MATRIXINDEX0_F_TEX1)
|
||||
|
||||
#define SC_XF_MATRIXINDEX0_F_SET_TEX2(line, xf_matrixindex0_f,tex2) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex0_f,tex2,XF_MATRIXINDEX0_F_TEX2)
|
||||
|
||||
#define SC_XF_MATRIXINDEX0_F_SET_TEX3(line, xf_matrixindex0_f,tex3) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex0_f,tex3,XF_MATRIXINDEX0_F_TEX3)
|
||||
|
||||
#define SC_XF_MATRIXINDEX1_F_SET_TEX4(line, xf_matrixindex1_f,tex4) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex1_f,tex4,XF_MATRIXINDEX1_F_TEX4)
|
||||
|
||||
#define SC_XF_MATRIXINDEX1_F_SET_TEX5(line, xf_matrixindex1_f,tex5) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex1_f,tex5,XF_MATRIXINDEX1_F_TEX5)
|
||||
|
||||
#define SC_XF_MATRIXINDEX1_F_SET_TEX6(line, xf_matrixindex1_f,tex6) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex1_f,tex6,XF_MATRIXINDEX1_F_TEX6)
|
||||
|
||||
#define SC_XF_MATRIXINDEX1_F_SET_TEX7(line, xf_matrixindex1_f,tex7) \
|
||||
FAST_GPFLAGSET(line, xf_matrixindex1_f,tex7,XF_MATRIXINDEX1_F_TEX7)
|
||||
|
||||
#define SC_XF_INVERTEXSPEC_F_SET_HOST_COLORS(line, xf_invertexspec_f,host_colors) \
|
||||
FAST_GPFLAGSET(line, xf_invertexspec_f,host_colors,XF_INVERTEXSPEC_F_HOST_COLORS)
|
||||
|
||||
#define SC_XF_INVERTEXSPEC_F_SET_HOST_NORMAL(line, xf_invertexspec_f,host_normal) \
|
||||
FAST_GPFLAGSET(line, xf_invertexspec_f,host_normal,XF_INVERTEXSPEC_F_HOST_NORMAL)
|
||||
|
||||
#define SC_XF_INVERTEXSPEC_F_SET_HOST_TEXTURES(line, xf_invertexspec_f,host_textures) \
|
||||
FAST_GPFLAGSET(line, xf_invertexspec_f,host_textures,XF_INVERTEXSPEC_F_HOST_TEXTURES)
|
||||
|
||||
#define SC_XF_NUMCOLORS_F_SET_GEN_NUMCOLORS(line, xf_numcolors_f,gen_numcolors) \
|
||||
FAST_GPFLAGSET(line, xf_numcolors_f,gen_numcolors,XF_NUMCOLORS_F_GEN_NUMCOLORS)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_MATERIAL_SRC(line, xf_color0cntrl_f,material_src) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,material_src,XF_COLOR0CNTRL_F_MATERIAL_SRC)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHTFUNC(line, xf_color0cntrl_f,lightfunc) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,lightfunc,XF_COLOR0CNTRL_F_LIGHTFUNC)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT0(line, xf_color0cntrl_f,light0) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light0,XF_COLOR0CNTRL_F_LIGHT0)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT1(line, xf_color0cntrl_f,light1) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light1,XF_COLOR0CNTRL_F_LIGHT1)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT2(line, xf_color0cntrl_f,light2) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light2,XF_COLOR0CNTRL_F_LIGHT2)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT3(line, xf_color0cntrl_f,light3) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light3,XF_COLOR0CNTRL_F_LIGHT3)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_AMBIENT_SRC(line, xf_color0cntrl_f,ambient_src) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,ambient_src,XF_COLOR0CNTRL_F_AMBIENT_SRC)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_DIFFUSEATTEN(line, xf_color0cntrl_f,diffuseatten) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,diffuseatten,XF_COLOR0CNTRL_F_DIFFUSEATTEN)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_ATTENENABLE(line, xf_color0cntrl_f,attenenable) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,attenenable,XF_COLOR0CNTRL_F_ATTENENABLE)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_ATTENSELECT(line, xf_color0cntrl_f,attenselect) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,attenselect,XF_COLOR0CNTRL_F_ATTENSELECT)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT4(line, xf_color0cntrl_f,light4) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light4,XF_COLOR0CNTRL_F_LIGHT4)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT5(line, xf_color0cntrl_f,light5) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light5,XF_COLOR0CNTRL_F_LIGHT5)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT6(line, xf_color0cntrl_f,light6) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light6,XF_COLOR0CNTRL_F_LIGHT6)
|
||||
|
||||
#define SC_XF_COLOR0CNTRL_F_SET_LIGHT7(line, xf_color0cntrl_f,light7) \
|
||||
FAST_GPFLAGSET(line, xf_color0cntrl_f,light7,XF_COLOR0CNTRL_F_LIGHT7)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_MATERIAL_SRC(line, xf_color1cntrl_f,material_src) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,material_src,XF_COLOR1CNTRL_F_MATERIAL_SRC)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHTFUNC(line, xf_color1cntrl_f,lightfunc) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,lightfunc,XF_COLOR1CNTRL_F_LIGHTFUNC)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT0(line, xf_color1cntrl_f,light0) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light0,XF_COLOR1CNTRL_F_LIGHT0)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT1(line, xf_color1cntrl_f,light1) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light1,XF_COLOR1CNTRL_F_LIGHT1)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT2(line, xf_color1cntrl_f,light2) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light2,XF_COLOR1CNTRL_F_LIGHT2)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT3(line, xf_color1cntrl_f,light3) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light3,XF_COLOR1CNTRL_F_LIGHT3)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_AMBIENT_SRC(line, xf_color1cntrl_f,ambient_src) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,ambient_src,XF_COLOR1CNTRL_F_AMBIENT_SRC)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_DIFFUSEATTEN(line, xf_color1cntrl_f,diffuseatten) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,diffuseatten,XF_COLOR1CNTRL_F_DIFFUSEATTEN)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_ATTENENABLE(line, xf_color1cntrl_f,attenenable) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,attenenable,XF_COLOR1CNTRL_F_ATTENENABLE)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_ATTENSELECT(line, xf_color1cntrl_f,attenselect) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,attenselect,XF_COLOR1CNTRL_F_ATTENSELECT)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT4(line, xf_color1cntrl_f,light4) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light4,XF_COLOR1CNTRL_F_LIGHT4)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT5(line, xf_color1cntrl_f,light5) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light5,XF_COLOR1CNTRL_F_LIGHT5)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT6(line, xf_color1cntrl_f,light6) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light6,XF_COLOR1CNTRL_F_LIGHT6)
|
||||
|
||||
#define SC_XF_COLOR1CNTRL_F_SET_LIGHT7(line, xf_color1cntrl_f,light7) \
|
||||
FAST_GPFLAGSET(line, xf_color1cntrl_f,light7,XF_COLOR1CNTRL_F_LIGHT7)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_MATERIAL_SRC(line, xf_alpha0cntrl_f,material_src) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,material_src,XF_ALPHA0CNTRL_F_MATERIAL_SRC)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHTFUNC(line, xf_alpha0cntrl_f,lightfunc) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,lightfunc,XF_ALPHA0CNTRL_F_LIGHTFUNC)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT0(line, xf_alpha0cntrl_f,light0) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light0,XF_ALPHA0CNTRL_F_LIGHT0)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT1(line, xf_alpha0cntrl_f,light1) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light1,XF_ALPHA0CNTRL_F_LIGHT1)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT2(line, xf_alpha0cntrl_f,light2) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light2,XF_ALPHA0CNTRL_F_LIGHT2)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT3(line, xf_alpha0cntrl_f,light3) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light3,XF_ALPHA0CNTRL_F_LIGHT3)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_AMBIENT_SRC(line, xf_alpha0cntrl_f,ambient_src) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,ambient_src,XF_ALPHA0CNTRL_F_AMBIENT_SRC)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_DIFFUSEATTEN(line, xf_alpha0cntrl_f,diffuseatten) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,diffuseatten,XF_ALPHA0CNTRL_F_DIFFUSEATTEN)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_ATTENENABLE(line, xf_alpha0cntrl_f,attenenable) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,attenenable,XF_ALPHA0CNTRL_F_ATTENENABLE)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_ATTENSELECT(line, xf_alpha0cntrl_f,attenselect) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,attenselect,XF_ALPHA0CNTRL_F_ATTENSELECT)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT4(line, xf_alpha0cntrl_f,light4) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light4,XF_ALPHA0CNTRL_F_LIGHT4)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT5(line, xf_alpha0cntrl_f,light5) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light5,XF_ALPHA0CNTRL_F_LIGHT5)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT6(line, xf_alpha0cntrl_f,light6) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light6,XF_ALPHA0CNTRL_F_LIGHT6)
|
||||
|
||||
#define SC_XF_ALPHA0CNTRL_F_SET_LIGHT7(line, xf_alpha0cntrl_f,light7) \
|
||||
FAST_GPFLAGSET(line, xf_alpha0cntrl_f,light7,XF_ALPHA0CNTRL_F_LIGHT7)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_MATERIAL_SRC(line, xf_alpha1cntrl_f,material_src) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,material_src,XF_ALPHA1CNTRL_F_MATERIAL_SRC)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHTFUNC(line, xf_alpha1cntrl_f,lightfunc) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,lightfunc,XF_ALPHA1CNTRL_F_LIGHTFUNC)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT0(line, xf_alpha1cntrl_f,light0) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light0,XF_ALPHA1CNTRL_F_LIGHT0)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT1(line, xf_alpha1cntrl_f,light1) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light1,XF_ALPHA1CNTRL_F_LIGHT1)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT2(line, xf_alpha1cntrl_f,light2) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light2,XF_ALPHA1CNTRL_F_LIGHT2)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT3(line, xf_alpha1cntrl_f,light3) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light3,XF_ALPHA1CNTRL_F_LIGHT3)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_AMBIENT_SRC(line, xf_alpha1cntrl_f,ambient_src) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,ambient_src,XF_ALPHA1CNTRL_F_AMBIENT_SRC)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_DIFFUSEATTEN(line, xf_alpha1cntrl_f,diffuseatten) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,diffuseatten,XF_ALPHA1CNTRL_F_DIFFUSEATTEN)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_ATTENENABLE(line, xf_alpha1cntrl_f,attenenable) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,attenenable,XF_ALPHA1CNTRL_F_ATTENENABLE)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_ATTENSELECT(line, xf_alpha1cntrl_f,attenselect) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,attenselect,XF_ALPHA1CNTRL_F_ATTENSELECT)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT4(line, xf_alpha1cntrl_f,light4) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light4,XF_ALPHA1CNTRL_F_LIGHT4)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT5(line, xf_alpha1cntrl_f,light5) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light5,XF_ALPHA1CNTRL_F_LIGHT5)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT6(line, xf_alpha1cntrl_f,light6) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light6,XF_ALPHA1CNTRL_F_LIGHT6)
|
||||
|
||||
#define SC_XF_ALPHA1CNTRL_F_SET_LIGHT7(line, xf_alpha1cntrl_f,light7) \
|
||||
FAST_GPFLAGSET(line, xf_alpha1cntrl_f,light7,XF_ALPHA1CNTRL_F_LIGHT7)
|
||||
|
||||
#define SC_XF_TEX_SET_RESERVED0(line, xf_tex,reserved0) \
|
||||
FAST_GPFLAGSET(line, xf_tex,reserved0,XF_TEX_RESERVED0)
|
||||
|
||||
#define SC_XF_TEX_SET_PROJECTION(line, xf_tex,projection) \
|
||||
FAST_GPFLAGSET(line, xf_tex,projection,XF_TEX_PROJECTION)
|
||||
|
||||
#define SC_XF_TEX_SET_INPUT_FORM(line, xf_tex,input_form) \
|
||||
FAST_GPFLAGSET(line, xf_tex,input_form,XF_TEX_INPUT_FORM)
|
||||
|
||||
#define SC_XF_TEX_SET_RESERVED1(line, xf_tex,reserved1) \
|
||||
FAST_GPFLAGSET(line, xf_tex,reserved1,XF_TEX_RESERVED1)
|
||||
|
||||
#define SC_XF_TEX_SET_TEXGEN_TYPE(line, xf_tex,texgen_type) \
|
||||
FAST_GPFLAGSET(line, xf_tex,texgen_type,XF_TEX_TEXGEN_TYPE)
|
||||
|
||||
#define SC_XF_TEX_SET_SOURCE_ROW(line, xf_tex,source_row) \
|
||||
FAST_GPFLAGSET(line, xf_tex,source_row,XF_TEX_SOURCE_ROW)
|
||||
|
||||
#define SC_XF_TEX_SET_BUMP_MAP_SOURCE(line, xf_tex,bump_map_source) \
|
||||
FAST_GPFLAGSET(line, xf_tex,bump_map_source,XF_TEX_BUMP_MAP_SOURCE)
|
||||
|
||||
#define SC_XF_TEX_SET_BUMP_MAP_LIGHT(line, xf_tex,bump_map_light) \
|
||||
FAST_GPFLAGSET(line, xf_tex,bump_map_light,XF_TEX_BUMP_MAP_LIGHT)
|
||||
|
||||
#define SC_XF_PERF0_F_SET_PERF_A(line, xf_perf0_f,perf_a) \
|
||||
FAST_GPFLAGSET(line, xf_perf0_f,perf_a,XF_PERF0_F_PERF_A)
|
||||
|
||||
#define SC_XF_PERF0_F_SET_PERF_B(line, xf_perf0_f,perf_b) \
|
||||
FAST_GPFLAGSET(line, xf_perf0_f,perf_b,XF_PERF0_F_PERF_B)
|
||||
|
||||
#define SC_XF_PERF0_F_SET_PERF_C(line, xf_perf0_f,perf_c) \
|
||||
FAST_GPFLAGSET(line, xf_perf0_f,perf_c,XF_PERF0_F_PERF_C)
|
||||
|
||||
#define SC_XF_PERF0_F_SET_PERF_D(line, xf_perf0_f,perf_d) \
|
||||
FAST_GPFLAGSET(line, xf_perf0_f,perf_d,XF_PERF0_F_PERF_D)
|
||||
|
||||
#define SC_XF_PERF1_F_SET_PERF_TARGET(line, xf_perf1_f,perf_target) \
|
||||
FAST_GPFLAGSET(line, xf_perf1_f,perf_target,XF_PERF1_F_PERF_TARGET)
|
||||
|
||||
#define SC_XF_ERROR_F_SET_CTEX_BUG_ENABLE(line, xf_error_f,ctex_bug_enable) \
|
||||
FAST_GPFLAGSET(line, xf_error_f,ctex_bug_enable,XF_ERROR_F_CTEX_BUG_ENABLE)
|
||||
|
||||
#define SC_XF_ERROR_F_SET_TFAN4_BUG_ENABLE(line, xf_error_f,tfan4_bug_enable) \
|
||||
FAST_GPFLAGSET(line, xf_error_f,tfan4_bug_enable,XF_ERROR_F_TFAN4_BUG_ENABLE)
|
||||
|
||||
#define SC_XF_ERROR_F_SET_TFAN16_BUG_ENABLE(line, xf_error_f,tfan16_bug_enable) \
|
||||
FAST_GPFLAGSET(line, xf_error_f,tfan16_bug_enable,XF_ERROR_F_TFAN16_BUG_ENABLE)
|
||||
|
||||
#define SC_XF_ERROR_F_SET_DUALTRAN_REG_ENABLE(line, xf_error_f,dualtran_reg_enable) \
|
||||
FAST_GPFLAGSET(line, xf_error_f,dualtran_reg_enable,XF_ERROR_F_DUALTRAN_REG_ENABLE)
|
||||
|
||||
#define SC_XF_ERROR_F_SET_BYPASS_BUG_ENABLE(line, xf_error_f,bypass_bug_enable) \
|
||||
FAST_GPFLAGSET(line, xf_error_f,bypass_bug_enable,XF_ERROR_F_BYPASS_BUG_ENABLE)
|
||||
|
||||
#define SC_XF_ERROR_F_SET_FAST_MATRIX_ENABLE(line, xf_error_f,fast_matrix_enable) \
|
||||
FAST_GPFLAGSET(line, xf_error_f,fast_matrix_enable,XF_ERROR_F_FAST_MATRIX_ENABLE)
|
||||
|
||||
#define SC_XF_DUALTEXTRAN_F_SET_DUALTEXTRAN_ENABLE(line, xf_dualtextran_f,dualtextran_enable) \
|
||||
FAST_GPFLAGSET(line, xf_dualtextran_f,dualtextran_enable,XF_DUALTEXTRAN_F_DUALTEXTRAN_ENABLE)
|
||||
|
||||
#define SC_XF_DUALTEX_F_SET_DUALMATRIX_ADRS(line, xf_dualtex_f,dualmatrix_adrs) \
|
||||
FAST_GPFLAGSET(line, xf_dualtex_f,dualmatrix_adrs,XF_DUALTEX_F_DUALMATRIX_ADRS)
|
||||
|
||||
#define SC_XF_DUALTEX_F_SET_RESERVED0(line, xf_dualtex_f,reserved0) \
|
||||
FAST_GPFLAGSET(line, xf_dualtex_f,reserved0,XF_DUALTEX_F_RESERVED0)
|
||||
|
||||
#define SC_XF_DUALTEX_F_SET_NORMAL_ENABLE(line, xf_dualtex_f,normal_enable) \
|
||||
FAST_GPFLAGSET(line, xf_dualtex_f,normal_enable,XF_DUALTEX_F_NORMAL_ENABLE)
|
||||
|
||||
|
||||
#endif // XF_MEM_H
|
||||
+40
-30
@@ -77,35 +77,36 @@ typedef enum {
|
||||
SC_ITEM_ID_BT_SENSOR_BAR_POSITION,
|
||||
SC_ITEM_ID_DVD_CONFIG,
|
||||
SC_ITEM_ID_WWW_RESTRICTION,
|
||||
SC_ITEM_ID_MOTION_PLUS_MOVIE,
|
||||
SC_ITEM_ID_TEMPORARY_TITLE_ID,
|
||||
|
||||
SC_ITEM_ID_MAX_PLUS1
|
||||
} SCItemID;
|
||||
|
||||
typedef struct {
|
||||
OSThreadQueue threadQueue;
|
||||
NANDFileInfo nandFileInfo;
|
||||
NANDCommandBlock nandCommandBlock;
|
||||
OSThreadQueue threadQueue;
|
||||
NANDFileInfo nandFileInfo;
|
||||
NANDCommandBlock nandCommandBlock;
|
||||
|
||||
union {
|
||||
u8 nandType;
|
||||
NANDStatus nandStatus;
|
||||
} u;
|
||||
union {
|
||||
u8 nandType;
|
||||
NANDStatus nandStatus;
|
||||
} u;
|
||||
|
||||
u8 nandStep;
|
||||
u8 nandNeedClose;
|
||||
u8 reloadFileCount;
|
||||
SCReloadConfFileCallback reloadCallback;
|
||||
s32 reloadResult;
|
||||
const char* reloadFileName[2];
|
||||
u8* reloadBufp[2];
|
||||
u32 reloadSizeExpected[2];
|
||||
u32 reloadedSize[2];
|
||||
SCFlushCallback flushCallback;
|
||||
u32 flushResult;
|
||||
u32 flushSize;
|
||||
u8 nandStep;
|
||||
u8 nandNeedClose;
|
||||
u8 reloadFileCount;
|
||||
SCReloadConfFileCallback reloadCallback;
|
||||
s32 reloadResult;
|
||||
const char* reloadFileName[2];
|
||||
u8* reloadBufp[2];
|
||||
u32 reloadSizeExpected[2];
|
||||
u32 reloadedSize[2];
|
||||
SCFlushCallback flushCallback;
|
||||
u32 flushResult;
|
||||
u32 flushSize;
|
||||
} SCControl;
|
||||
|
||||
|
||||
|
||||
#define SC_LANG_JAPANESE 0u
|
||||
#define SC_LANG_ENGLISH 1u
|
||||
#define SC_LANG_GERMAN 2u
|
||||
@@ -117,26 +118,35 @@ typedef struct {
|
||||
#define SC_LANG_TRAD_CHINESE 8u
|
||||
#define SC_LANG_KOREAN 9u
|
||||
|
||||
void SCInit(void);
|
||||
u32 SCCheckStatus(void);
|
||||
s32 SCReloadConfFileAsync(u8* bufp, u32 bufSize, SCReloadConfFileCallback);
|
||||
BOOL SCFindByteArrayItem(void* data, u32, SCItemID itemID);
|
||||
BOOL SCFindIntegerItem(int* data, SCItemID itemID, u8 type);
|
||||
BOOL SCFindU8Item(u8* data, SCItemID itemID);
|
||||
BOOL SCFindS8Item(s8* data, SCItemID itemID);
|
||||
BOOL SCFindU32Item(u32* data, SCItemID itemID);
|
||||
// scapi
|
||||
u8 SCGetAspectRatio(void);
|
||||
s8 SCGetDisplayOffsetH(void);
|
||||
u8 SCGetEuRgb60Mode(void);
|
||||
BOOL SCGetIdleMode(SCIdleModeInfo* data);
|
||||
u8 SCGetLanguage(void);
|
||||
u8 SCGetProgressiveMode(void);
|
||||
u8 SCGetScreenSaverMode(void);
|
||||
u8 SCGetSoundMode(void);
|
||||
u32 SCGetCounterBias(void);
|
||||
BOOL SCGetProductAreaString(const char*, int);
|
||||
|
||||
// scapi_prdinfo
|
||||
BOOL SCGetProductAreaString(char* buf, u32 bufSize);
|
||||
s8 SCGetProductArea(void);
|
||||
s8 SCGetProductGameRegion(void);
|
||||
|
||||
// scsystem
|
||||
void SCInit(void);
|
||||
BOOL SCFindByteArrayItem(void* data, u32 size, SCItemID id);
|
||||
BOOL SCReplaceByteArrayItem(const void* data, u32 size, SCItemID id);
|
||||
BOOL SCFindIntegerItem(void* data, SCItemID id, SCType type);
|
||||
BOOL SCReplaceIntegerItem(const void* data, SCItemID id, SCType type);
|
||||
BOOL SCFindU8Item(u8* data, SCItemID id);
|
||||
BOOL SCFindS8Item(s8* data, SCItemID id);
|
||||
BOOL SCFindU32Item(u32* data, SCItemID id);
|
||||
BOOL SCReplaceU8Item(u8 data, SCItemID id);
|
||||
u32 SCCheckStatus(void);
|
||||
s32 SCReloadConfFileAsync(u8* bufp, u32 bufSize, SCReloadConfFileCallback callback);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -30,8 +30,10 @@ u32 VIGetScanMode(void);
|
||||
u32 VIGetDTVStatus(void);
|
||||
|
||||
void VISetTrapFilter(u8);
|
||||
void VIEnableDimming(BOOL);
|
||||
void VISetGamma(int);
|
||||
BOOL VIEnableDimming(BOOL);
|
||||
void VISetGamma(VIGamma);
|
||||
void VISetRGBModeImm(void);
|
||||
BOOL VIEnableDVDStopMotor(BOOL enable);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -13,8 +13,18 @@
|
||||
#define VI_PAL 1
|
||||
#define VI_MPAL 2
|
||||
#define VI_DEBUG 3
|
||||
#define VI_3D 3
|
||||
#define VI_DEBUG_PAL 4
|
||||
#define VI_EURGB60 5
|
||||
#define VI_GCA 6
|
||||
#define VI_EXTRA 7
|
||||
#define VI_HD720 8
|
||||
|
||||
typedef u8 VIBool;
|
||||
#define VI_FALSE ((VIBool)0)
|
||||
#define VI_TRUE ((VIBool)1)
|
||||
#define VI_DISABLE ((VIBool)0)
|
||||
#define VI_ENABLE ((VIBool)1)
|
||||
|
||||
typedef enum {
|
||||
VI_TVMODE_NTSC_INT = VI_TVMODE(VI_NTSC, VI_INTERLACE),
|
||||
@@ -27,9 +37,18 @@ typedef enum {
|
||||
VI_TVMODE_EURGB60_PROG = VI_TVMODE(VI_EURGB60, VI_PROGRESSIVE),
|
||||
VI_TVMODE_MPAL_INT = VI_TVMODE(VI_MPAL, VI_INTERLACE),
|
||||
VI_TVMODE_MPAL_DS = VI_TVMODE(VI_MPAL, VI_NON_INTERLACE),
|
||||
VI_TVMODE_MPAL_PROG = VI_TVMODE(VI_MPAL, VI_PROGRESSIVE),
|
||||
VI_TVMODE_DEBUG_INT = VI_TVMODE(VI_DEBUG, VI_INTERLACE),
|
||||
VI_TVMODE_DEBUG_PAL_INT = VI_TVMODE(VI_DEBUG_PAL, VI_INTERLACE),
|
||||
VI_TVMODE_DEBUG_PAL_DS = VI_TVMODE(VI_DEBUG_PAL, VI_NON_INTERLACE)
|
||||
VI_TVMODE_DEBUG_PAL_DS = VI_TVMODE(VI_DEBUG_PAL, VI_NON_INTERLACE),
|
||||
VI_TVMODE_NTSC_3D = VI_TVMODE(VI_NTSC, VI_3D),
|
||||
VI_TVMODE_GCA_INT = VI_TVMODE(VI_GCA, VI_INTERLACE),
|
||||
VI_TVMODE_GCA_PROG = VI_TVMODE(VI_GCA, VI_PROGRESSIVE),
|
||||
VI_TVMODE_PAL_PROG = 6,
|
||||
VI_TVMODE_EXTRA_INT = VI_TVMODE(VI_EXTRA, VI_INTERLACE),
|
||||
VI_TVMODE_EXTRA_DS = VI_TVMODE(VI_EXTRA, VI_NON_INTERLACE),
|
||||
VI_TVMODE_EXTRA_PROG = VI_TVMODE(VI_EXTRA, VI_PROGRESSIVE),
|
||||
VI_TVMODE_HD720_PROG = VI_TVMODE(VI_HD720, VI_PROGRESSIVE)
|
||||
} VITVMode;
|
||||
|
||||
typedef enum {
|
||||
@@ -37,6 +56,83 @@ typedef enum {
|
||||
VI_XFBMODE_DF
|
||||
} VIXFBMode;
|
||||
|
||||
typedef enum _VITimeToDIM {
|
||||
VI_DM_DEFAULT = 0,
|
||||
VI_DM_10M,
|
||||
VI_DM_15M
|
||||
} VITimeToDIM;
|
||||
|
||||
typedef enum _VIVideo {
|
||||
VI_VMODE_NTSC = 0,
|
||||
VI_VMODE_MPAL = 1,
|
||||
VI_VMODE_PAL = 2,
|
||||
VI_VMODE_RGB = 3
|
||||
} VIVideo;
|
||||
|
||||
typedef enum _VIACPType {
|
||||
VI_ACP_OFF = 1,
|
||||
VI_ACP_TYPE1 = 2,
|
||||
VI_ACP_TYPE2 = 3,
|
||||
VI_ACP_TYPE3 = 4
|
||||
} VIACPType;
|
||||
|
||||
typedef enum _VIGamma {
|
||||
VI_GM_0_1 = 1,
|
||||
VI_GM_0_2,
|
||||
VI_GM_0_3,
|
||||
VI_GM_0_4,
|
||||
VI_GM_0_5,
|
||||
VI_GM_0_6,
|
||||
VI_GM_0_7,
|
||||
VI_GM_0_8,
|
||||
VI_GM_0_9,
|
||||
VI_GM_1_0,
|
||||
VI_GM_1_1,
|
||||
VI_GM_1_2,
|
||||
VI_GM_1_3,
|
||||
VI_GM_1_4,
|
||||
VI_GM_1_5,
|
||||
VI_GM_1_6,
|
||||
VI_GM_1_7,
|
||||
VI_GM_1_8,
|
||||
VI_GM_1_9,
|
||||
VI_GM_2_0,
|
||||
VI_GM_2_1,
|
||||
VI_GM_2_2,
|
||||
VI_GM_2_3,
|
||||
VI_GM_2_4,
|
||||
VI_GM_2_5,
|
||||
VI_GM_2_6,
|
||||
VI_GM_2_7,
|
||||
VI_GM_2_8,
|
||||
VI_GM_2_9,
|
||||
VI_GM_3_0
|
||||
} VIGamma;
|
||||
|
||||
typedef enum _VITiming {
|
||||
VI_TMG_GAME = 0,
|
||||
VI_TMG_DVD = 1
|
||||
} VITiming;
|
||||
|
||||
typedef enum _VIOverDrive {
|
||||
VI_ODV_L1 = 0,
|
||||
VI_ODV_L2 = 1,
|
||||
VI_ODV_L3 = 2,
|
||||
VI_ODV_L4 = 3,
|
||||
VI_ODV_L5 = 4,
|
||||
VI_ODV_L6 = 5
|
||||
} VIOverDrive;
|
||||
|
||||
typedef void (*VIRetraceCallback)(u32 retraceCount);
|
||||
|
||||
typedef struct VIGammaObj {
|
||||
u16 a[6];
|
||||
u8 yin[7];
|
||||
u16 yout[7];
|
||||
} VIGammaObj;
|
||||
|
||||
typedef struct VIMacroVisionObj {
|
||||
u8 m[26];
|
||||
} VIMacroVisionObj;
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,30 @@
|
||||
#ifndef _REVOLUTION_WENC_H_
|
||||
#define _REVOLUTION_WENC_H_
|
||||
|
||||
#include <revolution/types.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
WENC_FLAG_USER_INFO = (1 << 0),
|
||||
} WENCFlag;
|
||||
|
||||
typedef struct WENCInfo {
|
||||
/* 0x00 */ s32 xn;
|
||||
/* 0x04 */ s32 dl;
|
||||
/* 0x08 */ s32 qn;
|
||||
/* 0x0C */ s32 dn;
|
||||
/* 0x10 */ s32 dlh;
|
||||
/* 0x14 */ s32 dlq;
|
||||
/* 0x18 */ u8 padding[8];
|
||||
} WENCInfo;
|
||||
|
||||
s32 WENCGetEncodeData(WENCInfo* info, u32 flag, const s16* pcmData, s32 samples, u8* adpcmData);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
+234
-15
@@ -21,23 +21,209 @@ extern "C" {
|
||||
#define WPAD_BUTTON_C 0x4000
|
||||
#define WPAD_BUTTON_HOME 0x8000
|
||||
|
||||
typedef s32 WPADResult;
|
||||
typedef s32 WPADChannel;
|
||||
typedef u32 WPADDeviceType;
|
||||
#define WPAD_MAX_DPD_OBJECTS 4
|
||||
|
||||
typedef void WPADExtensionCallback(WPADChannel chan, s32 devType);
|
||||
#define WPAD_CHAN0 0
|
||||
#define WPAD_CHAN1 1
|
||||
#define WPAD_CHAN2 2
|
||||
#define WPAD_CHAN3 3
|
||||
#define WPAD_CHAN_INVALID -1
|
||||
|
||||
// for ease of use in for loops
|
||||
enum WPADChannel_et {
|
||||
WPAD_CHAN0,
|
||||
WPAD_CHAN1,
|
||||
WPAD_CHAN2,
|
||||
WPAD_CHAN3,
|
||||
#define WPAD_MAX_CONTROLLERS 4
|
||||
|
||||
WPAD_MAX_CONTROLLERS,
|
||||
WPAD_CHAN_INVALID = -1,
|
||||
enum WPADResult_et {
|
||||
WPAD_ERR_OK = 0,
|
||||
|
||||
WPAD_ERR_NO_CONTROLLER = -1,
|
||||
WPAD_ERR_BUSY = -2,
|
||||
WPAD_ERR_TRANSFER = -3,
|
||||
WPAD_ERR_INVALID = -4,
|
||||
WPAD_ERR_5 = -5,
|
||||
WPAD_ERR_6 = -6,
|
||||
WPAD_ERR_CORRUPTED = -7,
|
||||
};
|
||||
|
||||
#define WPAD_ESUCCESS WPAD_ERR_OK
|
||||
#define WPAD_ENODEV WPAD_ERR_NO_CONTROLLER
|
||||
#define WPAD_EBUSY WPAD_ERR_BUSY
|
||||
#define WPAD_ETRANSFER WPAD_ERR_TRANSFER // I don't know what the POSIX equivalent is
|
||||
#define WPAD_EINVAL WPAD_ERR_INVALID
|
||||
#define WPAD_E5 WPAD_ERR_5
|
||||
#define WPAD_E6 WPAD_ERR_6
|
||||
#define WPAD_EBADE WPAD_ERR_CORRUPTED
|
||||
|
||||
// apparently enum vs constant is a thing. cool
|
||||
#define WPAD_CESUCCESS (WPAD_ESUCCESS + 0)
|
||||
#define WPAD_CENODEV (WPAD_ENODEV + 0)
|
||||
#define WPAD_CEBUSY (WPAD_EBUSY + 0)
|
||||
#define WPAD_CETRANSFER (WPAD_ETRANSFER + 0)
|
||||
#define WPAD_CEINVAL (WPAD_EINVAL + 0)
|
||||
#define WPAD_CE5 (WPAD_E5 + 0)
|
||||
#define WPAD_CE6 (WPAD_E6 + 0)
|
||||
#define WPAD_CEBADE (WPAD_EBADE + 0)
|
||||
|
||||
typedef void WPADInitFunc(void);
|
||||
typedef void WPADCallback(s32 chan, s32 result);
|
||||
typedef void WPADExtensionCallback(s32 chan, s32 devType);
|
||||
typedef void WPADSamplingCallback(s32 chan);
|
||||
typedef void WPADConnectCallback(s32 chan, s32 result);
|
||||
|
||||
typedef struct DPDObject {
|
||||
/* 0x00 */ s16 x;
|
||||
/* 0x02 */ s16 y;
|
||||
/* 0x04 */ u16 size;
|
||||
/* 0x06 */ u8 traceId;
|
||||
} DPDObject;
|
||||
|
||||
typedef struct WPADStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
} WPADStatus;
|
||||
|
||||
typedef struct DPDObjEx {
|
||||
/* 0x00 */ s16 range_x1;
|
||||
/* 0x02 */ s16 range_y1;
|
||||
/* 0x04 */ s16 range_x2;
|
||||
/* 0x06 */ s16 range_y2;
|
||||
/* 0x08 */ u16 pixel;
|
||||
/* 0x0A */ s8 radius;
|
||||
} DPDObjEx;
|
||||
|
||||
typedef struct WPADStatusEx {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
/* 0x2a */ DPDObjEx exp[WPAD_MAX_DPD_OBJECTS];
|
||||
} WPADStatusEx;
|
||||
|
||||
typedef struct WPADFSStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
/* 0x2a */ s16 fsAccX;
|
||||
/* 0x2c */ s16 fsAccY;
|
||||
/* 0x2e */ s16 fsAccZ;
|
||||
/* 0x30 */ s8 fsStickX;
|
||||
/* 0x31 */ s8 fsStickY;
|
||||
} WPADFSStatus;
|
||||
|
||||
typedef struct WPADCLStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
/* 0x2a */ u16 clButton;
|
||||
/* 0x2c */ s16 clLStickX;
|
||||
/* 0x2e */ s16 clLStickY;
|
||||
/* 0x30 */ s16 clRStickX;
|
||||
/* 0x32 */ s16 clRStickY;
|
||||
/* 0x34 */ u8 clTriggerL;
|
||||
/* 0x35 */ u8 clTriggerR;
|
||||
} WPADCLStatus;
|
||||
|
||||
typedef struct WPADBKStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
/* 0x2a */ u8 bulk[21];
|
||||
/* 0x3f */ u8 padding[1];
|
||||
} WPADBKStatus;
|
||||
|
||||
typedef struct WPADTRStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
/* 0x2a */ u16 trButton;
|
||||
/* 0x2c */ u8 brake;
|
||||
/* 0x2d */ u8 mascon;
|
||||
} WPADTRStatus;
|
||||
|
||||
typedef struct WPADVSStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
/* 0x2a */ u16 at_0x2a[5];
|
||||
/* 0x34 */ u8 at_0x34;
|
||||
/* 0x36 */ u16 at_0x36[5];
|
||||
/* 0x40 */ u8 at_0x40;
|
||||
/* 0x42 */ u16 at_0x42;
|
||||
/* 0x44 */ u8 at_0x44;
|
||||
} WPADVSStatus;
|
||||
|
||||
typedef struct WPADMPStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
union {
|
||||
struct {
|
||||
/* 0x00 */ s16 fsAccX;
|
||||
/* 0x02 */ s16 fsAccY;
|
||||
/* 0x04 */ s16 fsAccZ;
|
||||
/* 0x06 */ s8 fsStickX;
|
||||
/* 0x07 */ s8 fsStickY;
|
||||
} fs;
|
||||
struct {
|
||||
/* 0x00 */ u16 clButton;
|
||||
/* 0x02 */ s16 clLStickX;
|
||||
/* 0x04 */ s16 clLStickY;
|
||||
/* 0x06 */ s16 clRStickX;
|
||||
/* 0x08 */ s16 clRStickY;
|
||||
/* 0x0a */ u8 clTriggerL;
|
||||
/* 0x0b */ u8 clTriggerR;
|
||||
} cl;
|
||||
} ext;
|
||||
/* 0x36 */ u8 stat;
|
||||
/* 0x37 */ u8 reserved;
|
||||
/* 0x38 */ s16 pitch;
|
||||
/* 0x3a */ s16 yaw;
|
||||
/* 0x3c */ s16 roll;
|
||||
} WPADMPStatus;
|
||||
|
||||
typedef struct WPADBLStatus {
|
||||
/* 0x00 */ u16 button;
|
||||
/* 0x02 */ s16 accX;
|
||||
/* 0x04 */ s16 accY;
|
||||
/* 0x06 */ s16 accZ;
|
||||
/* 0x08 */ DPDObject obj[WPAD_MAX_DPD_OBJECTS];
|
||||
/* 0x28 */ u8 dev;
|
||||
/* 0x29 */ s8 err;
|
||||
/* 0x2a */ u16 press[4];
|
||||
/* 0x32 */ s8 temp;
|
||||
/* 0x33 */ u8 battery;
|
||||
} WPADBLStatus;
|
||||
|
||||
typedef struct WPADInfo {
|
||||
/* 0x00 */ BOOL dpd;
|
||||
/* 0x04 */ BOOL speaker;
|
||||
@@ -48,11 +234,44 @@ typedef struct WPADInfo {
|
||||
/* 0x15 */ u8 led;
|
||||
/* 0x16 */ u8 protocol;
|
||||
/* 0x17 */ u8 firmware;
|
||||
} WPADInfo; // size 0x18
|
||||
} WPADInfo;
|
||||
|
||||
WPADResult WPADProbe(WPADChannel chan, WPADDeviceType* devType);
|
||||
#define WPAD_FMT_CORE_BTN 0
|
||||
#define WPAD_FMT_CORE_BTN_ACC 1
|
||||
#define WPAD_FMT_CORE_BTN_ACC_DPD 2
|
||||
#define WPAD_FMT_FS_BTN 3
|
||||
#define WPAD_FMT_FS_BTN_ACC 4
|
||||
#define WPAD_FMT_FS_BTN_ACC_DPD 5
|
||||
#define WPAD_FMT_CLASSIC_BTN 6
|
||||
#define WPAD_FMT_CLASSIC_BTN_ACC 7
|
||||
#define WPAD_FMT_CLASSIC_BTN_ACC_DPD 8
|
||||
#define WPAD_FMT_BTN_ACC_DPD_EXTENDED 9
|
||||
// extensions
|
||||
#define WPAD_FMT_TRAIN 10
|
||||
#define WPAD_FMT_GUITAR 11
|
||||
#define WPAD_FMT_BALANCE_CHECKER 12
|
||||
#define WPAD_FMT_VSM 13
|
||||
#define WPAD_FMT_DRUM 15
|
||||
#define WPAD_FMT_MOTION_PLUS 16
|
||||
#define WPAD_FMT_TAIKO 17
|
||||
#define WPAD_FMT_TURNTABLE 18
|
||||
#define WPAD_FMT_BULK 19
|
||||
|
||||
WPADExtensionCallback* WPADSetExtensionCallback(WPADChannel chan, WPADExtensionCallback* cb);
|
||||
#define WPAD_SPEAKER_DISABLE 0
|
||||
#define WPAD_SPEAKER_ENABLE 1 // might be ON? see HBMRemoteSpk.cpp
|
||||
#define WPAD_SPEAKER_MUTE 2
|
||||
#define WPAD_SPEAKER_UNMUTE 3
|
||||
#define WPAD_SPEAKER_PLAY 4
|
||||
#define WPAD_SPEAKER_CMD_05 5 // does the same thing as ENABLE? unless i'm missing something. not used so i don't know the context
|
||||
|
||||
s32 WPADProbe(s32 chan, u32* devType);
|
||||
u8 WPADGetRadioSensitivity(s32 chan);
|
||||
void WPADRead(s32 chan, WPADStatus* status);
|
||||
BOOL WPADIsSpeakerEnabled(s32 chan);
|
||||
s32 WPADControlSpeaker(s32 chan, u32 command, WPADCallback* cb);
|
||||
s32 WPADSendStreamData(s32 chan, void* p_buf, u16 len);
|
||||
|
||||
WPADExtensionCallback* WPADSetExtensionCallback(s32 chan, WPADExtensionCallback* cb);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,53 @@
|
||||
#ifndef _REVOLUTION_WUD_H_
|
||||
#define _REVOLUTION_WUD_H_
|
||||
|
||||
#include <revolution/types.h>
|
||||
#include <revolution/wpad/bte.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define WUD_CHAN0 0
|
||||
#define WUD_CHAN1 1
|
||||
#define WUD_CHAN2 2
|
||||
#define WUD_CHAN3 3
|
||||
#define WUD_MAX_CHANNELS 4
|
||||
|
||||
#define WUD_CHAN_INVALID -1
|
||||
|
||||
typedef void* WUDAllocFunc(u32 size);
|
||||
typedef int WUDFreeFunc(void* ptr); // signature from petari. not sure what the int is, though
|
||||
|
||||
typedef void WUDSyncDeviceCallback(s32 result, s32 num); // what is result?
|
||||
typedef void WUDClearDeviceCallback(signed);
|
||||
|
||||
typedef struct WUDDevInfo WUDDevInfo;
|
||||
typedef void WUDHidConnectCallback(WUDDevInfo* devInfo, u8 isOpenEvent);
|
||||
typedef void WUDHidReceiveCallback(u8 dev_handle, u8* p_rpt, u16 len);
|
||||
|
||||
struct WUDDevInfo {
|
||||
/* 0x00 */ struct small_dev_info small;
|
||||
/* 0x40 */ BD_ADDR devAddr;
|
||||
/* 0x46 */ LINK_KEY linkKey;
|
||||
/* 0x56 */ u8 devHandle;
|
||||
/* 0x57 */ u8 subclass;
|
||||
/* 0x58 */ u8 appID;
|
||||
/* 0x59 */ u8 at_0x59;
|
||||
/* 0x5a */ u8 at_0x5a; /* unknown */
|
||||
/* 0x5b */ u8 at_0x5b;
|
||||
/* 0x5c */ u8 at_0x5c;
|
||||
u8 at_0x5d[1]; // padding?
|
||||
/* 0x5e */ tBTA_HH_ATTR_MASK hhAttrMask;
|
||||
}; // size 0x60
|
||||
|
||||
u8 WUDGetBufferStatus(void);
|
||||
u8 _WUDGetLinkNumber(void);
|
||||
u16 _WUDGetQueuedSize(s8 dev_handle);
|
||||
u16 _WUDGetNotAckedSize(s8 dev_handle);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _REVOLUTION_WUD_H_
|
||||
Reference in New Issue
Block a user