- s2 (the head, with R16/R17 added): search: 0 of 140 exemplars matched lever-free in 0.24 h (0 of 7,085 bodies behind
them; 23,689 compiles). The two new generators closed nothing on the head; recorded as measured.
- agent a2's "284 constant-holder pins of 10,958" verified against the source rather than believed (R14), and my first
instrument was wrong (R40): asking R16 directly answered 33, because R16 only fires on a split declaration while most
pins carry their value as an initialiser. R3 converts one form to the other, so the reachable family is R3+R16.
Corrected, both figures derived: 537 constant-holder pin sites of 17,302, in 510 bodies (152 initialiser, 385 separate
assignment; by register $2 282, $20 136, $3 28).
- s3 drew exactly those 99 function names and closed 10 bodies before crashing with
AttributeError: 'Namespace' object has no attribute 'allow_residue'
in propagate — the a2 fix read the flag off the caller's namespace and the search engine builds its own Namespace for
that in-process call. Fixed with getattr(a, "allow_residue", False): a library must not assume its caller's namespace
shape (R43).
- the ten banks were real, proven by gating the tree the crash left:
check-all: 218 passed, 0 failed of 218
lever_census --check: 29,533 pin/asm sites, 29,533 marked !FAKE, 0 UNMARKED — OK
- by first move the ten are R15 x3, R6 x4, R7 x2, R9 x1 — the draw was right about the family even though R16 did not fire.
- snapshot row 13; s3 re-runs from the top with the fix.
- pinned since S79 as "mflo destination $t0 vs $a2 (REGALLOC-PERM), pinning regresses to 79"; 5 attempts 51->20->14->8->2 +
permuter_ils null (S80); T4 re-probed DIFF 2; the S83 hand pass measured the variable-reuse form at 80
- mechanism (dumps + source): the mult results are GLOBAL allocnos (mulsi3_internal '=l', mips.md:848; 'pref LO_REG');
global.c parks m3/m8/m13 in LO, reload spills LO ("Spilling reg 65") and retries via retry_global_alloc (reload1.c:3497)
with losers = forbidden_regs, seeded from bad_spill_regs = regs_explicitly_used = regs_ever_live at reload entry
(reload1.c:486, 3651-3660, 709) — the S76 `register s32 e0 __asm__("$6")` made $a2 ever-live, so m13's retry could not
take it and first-fit gave $t0 ("Register 102 now in 8")
- fix: unpin e0; `__asm__("" : "=r"(e1) : "0"(e1))` immediately before `dst[6] = -e1` (e1's qty 6666 -> 8750, allocated
before e0's 7894, holds $v1, e0's first fit drops to $a2) + `__asm__("" : "=r"(p1) : "0"(p1))` between p1's andi and sll
(undoes the global-allocno tie the first launder created; the $t6/$t7/$t8 rotation). Ladder 2 (pinned) -> 37 (unpinned)
-> 15 -> 6 -> MATCH; a byte-identical alternate launders addr1 after its addu
- draft .run/P32/t5x/fable/func_80020DA4.c; report .run/P32/t5x/reports/func_80020DA4.md; coordinator rtu_match MATCH
100/100 in src/800.c; gate_main slate_20DA4: BANKED, 143dbb89 BYTE-IDENTICAL
- main open 4 -> 3 (2 pinned walls + func_80039308 NEAR)
- seed: the Opus NEAR-6 draft (.run/P32/t3/opus/func_8001BC6C.c; §500-C REGALLOC-PERM $v0<->$v1 across the six OT-chain insns,
local-alloc qty_compare one span unit). permuter_ils 8x150s -j3 --klass REGALLOC: cycles 6/7/8 = 6, 5, 1 (output-1-1)
- R63 read of the "1": three mutations — (a) `idx` computed AFTER `color`, (b) an early dead `tag = (a1 << 8) | k;` before
k's assignment, (c) `(D_800B9A02 & 0xFFu) << 14` — and (c) turns the target's `lhu` into an `lbu` (semantically WRONG:
the masked score rewards it; second witness after S80). (a)+(b) alone = leaf MATCH 69/69; (a) alone 8, (b) alone 21
- well-defined re-spelling: `k = 0; tag = (a1 << 8) | k;` at the top (I1) MATCHES; k-initialised-first (15), tag=a1<<8 (19),
tag=a1 (8), tag=(a1<<8)|K (20), tag=0 (8), tag-then-k (8) all regress — the lever is the early BIRTH of the tag/k pseudos
(§47 live-length: qty_compare = floor_log2(n_refs)·n_refs·size/(death−birth)), documented in the source comment
- rtu_match MATCH 69/69 in src/800.c; gate_main slate_main3: "slate 1 -> 1 compatible … BANKED 1 of 1 … 143dbb89 BYTE-IDENTICAL",
EXIT 0 (.run/P32/t3s3/gate/gate_main3.log); main open 7 -> 6 (5 pinned walls + func_80039308 NEAR 17)
- func_800CD674's ILS plateaued at the SAME $a3<->$t1 pair (output-2-1 = 2 rows, no drift) — ledgered with its cost (R41)
- variants kept under .run/P32/t3s3/p1bc6c/ (the 11 spellings measured)
- gate_main .run/P32/t3s3/gate/slate_main2.json --apply: "slate 2 -> 2 compatible, 0 dropped"; clean EXE rebuild
(extract + build) -> "BANKED 2 main functions -- 143dbb89f34491258bbc27810d0a12ec8b43a8dd BYTE-IDENTICAL", EXIT 0
(.run/P32/t3s3/gate/gate_main2.log)
- func_80015B6C (src/800.c, Opus .run/P32/t3/opus/func_80015B6C.c): both journal walls fell — the "$v0/$v1 swap" was an
artefact of the s32 wh[3] frame-slot hack; the corner-copy wall is cse.c canon_reg (make_regs_eqv keeps the FIRST
register canonical) -> a barrier on the SOURCE variable `__asm__("" : "=r"(x) : "0"(x))`; four empty volatile fences
partition block 2 into five phases at zero cost; the 0xE1000200 trailer lui hoist = reuse the $6-pinned tag variable
- func_8002FDE8 (src/800_b_2.c, Opus .run/P32/t3/opus/func_8002FDE8.c): the "regalloc-priority wall" at 35 was the ARRAY
spelling of D_800A46D2 — the block-scope SCALAR `extern s16 D_800A46D2;` (as same-TU func_8002FF0C/func_800301C8) gives
35 -> 3; third `return 1` inside the == -1 arm; the §47 live-length slider COMPUTED from -dl -dg (one fence where the
constant is live and `data` dead); `one = 1;` and `i4 = idx * 4;` as separate statements
- both rtu_match MATCH in the real TU (S82 re-verification); cookbook §500-B carries the closers
- main: 12 -> 7 open (5 pinned walls + 2 NEAR)
- the 11-18 plateau had two mutually-exclusive halves under (A & 0xFF000000) | (B & 0xFFFFFF): preheader hoist order
of the two masks vs &otab[idx], and the $t3/$t4 pairing of the mask register and the slot pointer. store_field ->
store_fixed_bit_field expands the RHS bitfield extract BEFORE the destination read, which fixes loop.c's movable
order [&otab[idx]; 0xFFFFFF; 0xFF000000] AND the ior operand roles at once (operand swap alone = 35). Third witness
for §364's -O2 half (func_8001D3FC/func_80021284/func_80023570 in the same TU already use the idiom).
- kept from the S79 90->18 chain (re-measured): the §194-A fence in both arms, `code` split from its base with
compound accumulation, register u32 base __asm__("$3"), and exactly 13 zero-byte fences after pkt = D_800A5E60
(0->15, 8->13, 10/11/12->7, 13->MATCH). Dropped as now inert: the m24 $11 and e1 $4 pins.
- the S80 permuter waypoint (closeness 11) was semantically UNSOUND (m24 sunk into one arm) and was not used (R63).
- rtu_match MATCH 281/281 (coordinator-verified); gate_main --apply 1/1, main byte-identical
Drew T