+3 bodies (worker B2 claims 5-7). Candidate gate MATCH before promotion; md5 drift
check clean on all three (second use of the guard). make check green: regions=483
AGREE, differing_bytes=0 MATCH.
Region option granted: gp=-D_80121BFC on 0x80048128. This one carries PER-ACCESS
evidence in a single merge: D_80121BFC is read gp-RELATIVELY in worker B2's claim 7
row (lw v1,708(gp)) and ABSOLUTELY in claim 5's row (lui v1,0x8012 + lw v1,7164(v1)).
So the same symbol needs the override in one region and not in the other -- direct
confirmation of worker B's lever 12 that the access form is per-SITE, and an argument
that the override is a region property rather than a symbol property.
THREE NEW LEVERS (worker B2), each with a control:
1. A LOCAL SHARED BY TWO GUARD BLOCKS GETS COALESCED; TWO BRACE-SCOPED LOCALS DO NOT.
0x8008BA80: the original's first guard loads the state byte into a0 (the
parameter's own dead register) while the second guard loads *a2 into a FRESH v1.
One function-scope local makes cc1 coalesce the live ranges into a0 and DIFFs;
brace-scoping each reproduces it. A SCOPING lever, distinct from the
named-locals family.
2. THE EVALUATION ORDER OF TWO SCALED TERMS IS BYTE-REQUIRED. 0x800504E4:
base + a0*384 + a1*3072 scales a0 first; base + a1*3072 + a0*384 scales a1 first,
which is the original. Worker B's claim-1 lever extended from the operands of one
'+' to the ORDER OF TWO INDEX COMPUTATIONS.
3. AN UNSIGNED LOOP COUNTER SHOWS AS sltiu vs slti -- ONE BYTE (opcode 0x0b vs 0x0a).
0x800504E4's i < 16 is sltiu, so the counter is unsigned int. The loop-test form of
the signedness trap.
Also independently reproduced: worker C's lever 6, (unsigned)(c - 58) < 2 giving ONE
addiu+sltiu pair where c >= 58 && c <= 59 gives two tests (on 0x80048128).
+3 bodies (worker B2 claims 2-4; claim 1 was already merged). Candidate gate MATCH
before promotion. make check green: regions=480 AGREE, differing_bytes=0 MATCH.
FIRST MERGE USING THE MD5 DRIFT GUARD (adopted after the 0x800A9C24 collision).
Worker B2's claim rows carry the source md5 and all three matched on disk at merge
time, so no re-verification was needed. B2 folded its gp=-D_80121B88 region option
into the claim row itself, which is the standing rule.
Region option granted: gp=-D_80121B88 on 0x800A6998. Byte-required and verified both
ways (with the override 128 B / 0 differing; without it 120 B LENGTH-MISMATCH).
Third instance of the per-site gp form. Worth recording that on THIS row BOTH the
symbol spelling and the literal spelling are wrong for two DIFFERENT reasons: the
symbol gives the gp-relative encoding the original does not use, and the literal
makes cc1 cache the address in s0 so the frame grows 24 -> 32 bytes with an extra
saved register.
TWO NEW LEVERS (worker B2):
1. A SHARED CALL PAIR HAS TO BE A NAMED goto LABEL. 0x800A6998 is an infinite loop
whose two func_800A6FAC(0) calls appear EXACTLY ONCE in the original, reached
both by fall-through and by the w != 0 branch. Only a source naming that block
reproduces it; while/for spellings either invert the loop (156 B) or make cc1
CROSS-JUMP the two ==0 tests so the x-load goes dead (124 B). Same goto
statement-form family as the 0x800A9C24 guard, but the lever here is SHARING ONE
BLOCK rather than branch polarity.
2. && KEEPS A BRANCH THAT EARLY RETURNS FOLD AWAY -- the exact INVERSE of the
named-boolean lever broadcast earlier. Three separate if (...) return 0;
statements make cc1 fold the third guard into a branchless boolean
(xor/sltiu, 124 B); ONE && chain with a single trailing return 0 keeps the branch
(byte-identical). A goto fail; ... fail: return 0; spelling is also identical, so
the distinguishing fact is "one combined condition with one trailing return".
PAIRED RULE: when the original has a BRANCH on a boolean expression, combine the
conditions into one && chain; when it has the BRANCHLESS form, name the boolean.
Also recorded: 0x800B67B8 is the CALLER of the registered func_80082750, and the
callee's source gave the D_80121C00 spelling directly (it holds a base POINTER, not
the table address), so the argument map transferred with zero guessing -- the
family lever working as advertised.
Records the 0x800A9C24 collision (coordinator double-assignment: the row was
redistributed to B2 and then chartered to C2), B2's diagnosis that "verify the file
at the path you claim" is necessary but not sufficient because the gap is between
verify and merge, the adopted md5-in-claim-row guard, and worker A's 4 first-attempt
bodies including the second byte-exact stack-switch row that isolates the variable
to an argument move at the call site.
+4 bodies (worker A claims 19-22, all first-attempt). Candidate gate MATCH before
promotion. make check green: regions=477 AGREE, differing_bytes=0 MATCH.
THE STACK-SWITCH IDIOM IS NOW PROVEN TWICE, BYTE-EXACT, WITH NO OVERRIDE.
0x8006B9E0 matches on the first attempt with no maspsx override, no clobbers and no
operand declarations -- the three-macro form reproduces it exactly, including the
bare filler nop between the second restore and the epilogue's lw ra. Contrasting it
with A's 0x800BC658 near-match (same macros, off by 2 nops) isolates the variable:
0x8006B9E0's two calls have EMPTY delay slots while 0x800BC658's non-fast-path calls
set up an argument cc1 schedules into the slot. So the asm is not the variable -- an
ARGUMENT MOVE AT THE CALL SITE is. That narrows the 0x800BC658 remainder.
TWO NAMED-LOCAL FINDINGS, BOTH DIRECTIONS NOW OBSERVED (the family has seven
instances across the team):
- 0x8005E538: the HANDLE must be a named local loaded before the first call.
Inline, cc1 keeps only the object pointer in a callee-saved register and
RELOADS the handle after the first call (76 vs 88 bytes). Generalisation: a value
that must survive an intervening call has to be a named local.
- 0x800F66B8 is the MIRROR CASE and a useful NEGATIVE: d[0] and d[1] are each
loaded twice with neither held in a register, and the two loads of d[0] go to
DIFFERENT registers. Naming a local would have been WRONG. So naming a value can
be byte-required and NOT naming it can be byte-required; the diagnostic is the
load count, not a rule about locals.
Inline asm in src/func_8006B9E0.c is documented per the Phase 10 convention
(header states the observed sequence, the reason and the limits).
Records: worker A's 8 first-attempt bodies and two general levers (two-arm polarity
byte-required; named boolean local forces the branchless compare); worker B2's
limitation of the coordinator's polarity broadcast (both ordinary spellings give the
mirrored branch, so the guard must be a goto); the staging slip the candidate gate
caught (verified finding, wrong file staged) and the standing rule it produces
(verify the file you stage, not a scratch variant); and the dead-store-elimination
class from 0x80016F80.
Third coordinator over-generalisation a worker has caught this phase.
+8 bodies (worker A claims 11-18, all first-attempt; 16 of A's 18 claims needed
no override at all). Candidate gate MATCH before promotion.
TWO NEW LEVERS (worker A):
1. A two-arm selection's POLARITY is byte-required. For a1 = (x<2) ? a3 : saved,
the natural order and the ternary both emit beq v0,zero with the arms swapped
(right length, 5 differing bytes). Writing the larger-than arm first
(if (x >= 2) a1 = saved; else a1 = a3;) makes cc1 emit bne v0,zero with
a1 = a3 in the BRANCH DELAY SLOT, so that assignment runs on both paths and is
overwritten on the >=2 path -- which is the original exactly. Same family as the
mirrored comparison load order; second polarity case in A's partition.
2. A NAMED BOOLEAN LOCAL forces the branchless compare. rec[6] = ((a3 & 0xff) != 0) << 1
is branchy (92 vs 88); only naming the boolean first,
int flag = (a3 & 0xff) != 0; then rec[6] = flag << 1;
reproduces the original's andi / sltu / sll. Six spellings measured. cc1 will
un-do a boolean you inline when the VALUE (not the branch) is what you need.
make check green: regions=473 AGREE, differing_bytes=0 MATCH, 237 tests OK.
Worklist 1241 rows; excluded_already_registered=473.
Worker C's precision note: the draft uses a LITERAL address (deliberately, to avoid
the name-keyed gp trap), and the harness's gp rewrite only acts on SYMBOL accesses.
So --no-gp D_80121B88 had nothing to rewrite and identical output was the EXPECTED
result, not evidence about the encoding. The conclusion is unchanged (the encoding
is already correct, so the hoist is the whole residual), but the recorded REASON was
wrong and would have misled a future worker into thinking the name-keyed gp trap is
irrelevant at 0x80121B88 when it is in fact why the draft looks the way it does.
Corrected: the entry now says the override is inert by construction here, and keeps
the untried lever (a source order that stops the hoist).
+1 body (worker B2 claim 1, 0x8008A758, first attempt via the registered callee
func_80073F78). Candidate gate MATCH before promotion.
Worker C's cleanup-audit catch recorded: 0x800A6C34 (88B) is an OPEN near-match at
the correct length (16 differing bytes at 0x800A6C54) that fell out of C's staging
after a DIFF in its first batch. Added to the tracked negatives index. Coordinator
verified the residual exactly as C reported AND tested C's named lever (a) — the
gp=-D_80121B88 override does NOT close it (identical 16 bytes) — so the index
records the untried lever (a source order that stops the hoist) rather than the
disproven one. C's process note is recorded: run the cleanup audit BEFORE the final
report, not after.
make check green: regions=465 AGREE, differing_bytes=0 MATCH, 237 tests OK.
Worklist 1249 rows; index 166 rows, ordered, 0 registered.
+2 bodies (worker C claims 21-22; 19-20 were in the previous batch).
SIZE-BAND MEASUREMENT CONFIRMED (worker C, strongest evidence yet for the
size-first re-rank): after switching to the <=200B band, four consecutive rows cost
1, 1, 1 and 2 attempts, against 1-in-12 on the 200B-800B band. Same worker, same
levers, same day -- the only variable is the size band. The <=200B P2 band is where
the remaining bodies are.
make check green: regions=464 AGREE, differing_bytes=0 MATCH, 237 tests OK.
+2 bodies (worker C claims 19-20) and 3 gp symbol rows (D_80121F90,
D_8012196E, D_80121964). Candidate gate MATCH before promotion.
NEW EXCLUSION CLASS `restores_unsaved` (worker A, coordinator-verified). A body
that restores a callee-saved register it never saves cannot be a whole function:
the register it restores was established by an enclosing prologue that the derived
extent cut off. These are jal targets INSIDE a real function, so the walk began
mid-body — distinct from bad_extent_start, which flags starts that are not
function entries at all.
Verified disjoint from the matched corpus before acting, as the project requires:
0 of 462 registered regions trip the rule; 11 worklist rows do.
excluded_restores_unsaved=11; worklist 1265 -> 1253 rows. 5 new tests; suite
229 -> 237, OK. make check green: regions=462 AGREE, differing_bytes=0 MATCH.
Independent corroboration worth recording: the new rule re-derives 0x8010080C,
the false extent start worker C reported earlier via a completely different signal
(the first instruction reads a register the range never defines). Two independent
detections of one defect class. bad_extent_start is False for that row, confirming
C's observation that the older rule missed it. Its Makefile --exclude entry is
retained only as the provenance record for that defect.
+1 body (0x800C1424, worker C claim 18, closed with two register-allocation
levers: guard-on-the-expression so CSE keeps one load whose destination is the
guard's operand, and a counter initialisation as a statement so the counter
takes a2).
FORECAST FINDING (the important part of this commit): measured the matched
corpus against the remaining pool and re-ranked the lever files.
matched: 459 regions, median 48 bytes, 454 of 459 at <=200 bytes
remaining levered rows: median 456 bytes
Size is therefore the strongest predictor left, so .run/p10/lever*.tsv now ranks
size band FIRST and lever second:
P1 = <=200B and levered (47 rows across partitions)
P2 = <=200B, no lever (412) <- the unexploited band that actually matches
P3 = levered but >200B (503)
P4 = rest (303)
Worker C had proposed continuing on fresh P1 rows (old meaning: known-callee),
which under the new ranking are mostly P3 -- the 200-800B band where the
allocator/optimiser tie-breaks live. Redirected to P2 from the top.
Worker C's measured re-flag accepted (last 12 attempts produced 1 match, 8 of 9
sub-8-byte negatives being cc1 scheduling/allocation with no spelling lever) and
answered with a band change rather than a stop, since C is at 47% context.
Developer decision (2026-09-24), extending Phase 8's coprocessor/kernel allowance.
Trigger conditions recorded: plain C attempted and mechanism identified; the
inexpressibility is structural rather than a scheduling/allocation tie-break;
integer logic stays in C and scheduling still comes from cc1/maspsx; per-file
header documents the sequence, the reason and the limit.
First accepted instance: the PSX scratchpad stack switch (lui at,0x1f80 /
sw sp,1020(at) / lui sp,0x1f80 / ori sp,sp,0x3dc ... / lw sp,1020(sp)), found
independently by workers A (0x800BC658) and B (0x800BC6EC). A stack-pointer READ
was already covered by the register-name binding and needs no exemption; only the
switch does.
Explicitly does NOT reopen trapping-arithmetic, rare-epilogue or primitive-init.
+3 bodies from 447. Candidate gate MATCH before promotion.
Negatives reconciliation (the protocol step that protects worker findings from
being lost with ignored staging): imported 26 new negatives from all three
workers' staging into the tracked index. Index 140 -> 166 rows, address-ordered,
0 duplicates, 0 registered. excluded_recorded_negative 116 -> 142; worklist
1268 rows; 0 unregistered negatives survive into the worklist.
make check green: regions=459 disagreements=0 AGREE, c_regions=459
differing_bytes=0 MATCH, SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9.
+7 bodies from 440. Candidate gate MATCH before promotion on every batch.
SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9 stable; make check green
(regions=456 disagreements=0 AGREE, c_regions=456 differing_bytes=0 MATCH).
Note: my claims.with-options.tsv for worker B went stale (it predated claims
17-20) and the first attempt silently added 0 regions; regenerated from the
current claims.tsv and re-gated. Standing rule: regenerate the folded-options
claims file from the live claims.tsv immediately before every merge.
Worklist 1294 rows, excluded_already_registered=456 (= registry size).
Partitions refiltered: a=439 b=428 c=427, disjoint, union==worklist.
+8 bodies from 432 (440 total, from 400). All gated on the candidate whole-binary
before promotion. SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9 stable.
Registry option granted: gp=-D_801226F4 on 0x8002D364 (worker B). The first
candidate gate for this batch DIFFed (differing_bytes=1117197) because worker B
staged the option in a separate request file rather than in the claim row, so the
region merged without it; the tracked registry was never touched and the gate
caught it. Folded the option into the claim and re-gated to MATCH. Recorded as a
protocol event: a worker's region-option request must be folded into the claim
row before merging.
Evidence model: 0x8010080C is a FALSE EXTENT START (worker C, coordinator-verified
against the payload). Its first instruction is beq s0,zero and s0 is never written
in the range, so it is mid-body. The walk split one real 252-byte function
(0x801007E0..0x801008DC) at a spurious boundary because 0x8010080C is a jal target
from 0x8011419C. The row was unclaimable and is now a named exclusion
(excluded_named_exclusion 8 -> 9) with the reason in the Makefile and the
extents-defect record in the ledger. Fixing sf3_extents itself is left as a
bounded candidate, not attempted here.
Worklist 1304 rows, excluded_already_registered=446 (= registry size).
Partitions refiltered against it: a=441 b=432 c=431, disjoint, union==worklist.
32 new bodies from 400, all verified on the candidate whole-binary gate before
promotion. SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9 stable.
Registry requests granted (each byte-verified with a failing control):
cc1=-G8 on 0x800A6BEC; gp=-D_80121B88 on 0x80015D50
symbols D_80122700, D_80122704, D_80121AD4 (gp)
Harness: per-region maspsx modes wired through sf3_match (maspsx=noreordernop,
maspsx=regread) plus --no-jump-slot-nop/--nop-on-reg-read for range. Both are
opt-in and default-off; make check green at 441 with them off, suite 229 -> 232
tests. Carried as a TRACKED patch (tools/patches/maspsx-phase10-r1r2.patch)
because tools/maspsx/ is git-ignored, so an in-place edit would not survive a
fresh clone; patch verified to reproduce the working tree byte-identically.
R1/R2 are recorded as a MEASURED NEGATIVE: neither closes a region (cookbook
finding 40 has the mechanism and the remaining developer-owned route).
Docs: cookbook finding 40 (rare-epilogue mechanism + why the obvious maspsx fix
fails); SETUP.md maspsx patch provenance and apply step.
Negatives: 0x8010AA28 imported; index sorted by address (140 rows, 0 registered).
Full clean audit green: make clean && make all exit 0, cmp exit 0, both SHA-1
match, registry 441/0 overlaps/0 bad extents/0 missing sources, 0 firewall.
- Phase10_PLAN.md status DRAFT -> APPROVED (Goal A, 475 bodies, 70-80% ctx cap)
- phase-ends/CURRENT_PHASE.md: Phase 10 control record
- config/near_match_negatives.tsv: drop 6 rows that were already registered
(index header says every row is UNREGISTERED); index 145 -> 139 rows, 0 registered.
Worklist regenerates byte-identically after the fix.
- Baseline revalidated at 25bf4a3: make check exit 0, regions=409 disagreements=0
AGREE, c_regions=409 differing_bytes=0 MATCH, 229 tests OK, SHA-1 stable.
- Worklist regen: listed=1343, excluded_already_registered=409 (= registry size).
- 3-way partitions in .run/p10 (448/448/447, pairwise intersection 0, union == worklist).
- Roster deviation recorded and developer-approved: 3 workers, not the plan's 2.
Phase 9 closed at 400 distinct bodies / 409 regions (from 149/158), all
gates green from clean: CMP_OK, SHA-1
e173426c157384ebf1b6caf8c6fea18a85a14af9, 229 tests, make gate
c_regions=409 MATCH, extents-verify AGREE, worklist listed=1343 with
excluded_already_registered=409, firewall 0, src/ 0 untracked.
Milestone partially met (400 of 500): the blocker is recorded with per-class
evidence (tier-1 tie-break domination, class disjointness, measured rate
decay) per the plan's Or branch. PhaseEnd_Phase9.md, digest entry, and the
ledger archive (logs/Phase9.md) written. docs/PHASE9_PROTOCOL.md (scale-run
retrospective: queue fix, tier-2 pivot, family-set lever, rotation
discipline, leading-indicator rule, measured budget), docs/PHASE9_VERIFICATION.md
(all gates, incidents, class exclusions), cookbook findings 29-39,
conventions additions, README updated to 400/409.
Phase10_PLAN.md drafted (Goals A/B/C: tail squeeze vs library-boundary
investigation, developer decisions enumerated) — requires explicit approval
before any Phase 10 task; no Phase 10 work begins in this session.
The 400-body target (P9-T6 checkpoint, 251 new bodies from 149) is crossed
on the coordinator's own whole-binary gate: c_regions=409, differing_bytes=0,
SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9.
Final batch: B's last 2 family members (0x800578EC, 0x800577E8, both 100B),
11 consecutive first-attempt family matches closing the run. Cycle-4 total:
47 new bodies from worker B following the milestone-close directive
(reliable-rows over exploration). The family-as-a-set lever (scan for rows
calling a matched target; stable positions selector->arg2 sentinel->arg3
a1->arg9, per-row elsewhere) drove 11 first-attempt closes.
Workers: B 60 claims (rotated cleanly, handoff block written with 104
report entries and the corrected cookbook items), C 70 claims (earlier
rotation). Coordinator holds merge/gate/ledger at 86% protecting the
essential role.
B 9-for-9 across the family batches. 0x80057B30 has TWO incoming stack
params; the family-set lever's scope limit sharpened: stable positions
(selector->arg2, sentinel->arg3, a1->arg9, extra->arg10) + per-row
positions elsewhere — the map proves once for the STANDARD form only, and
B corrected its own earlier 'map proves once' framing (belongs in the
cookbook with the lever). Two more 100-byte callers (0x800578EC,
0x800577E8) in flight for margin. Gate MATCH whole-binary SHA-1
e173426c157384ebf1b6caf8c6fea18a85a14af9.
B: 42 new this cycle. Family rows restored the rate 3-for-3 first attempt
(selectors 6/17/15). Boundary note: 0x80057BE8 is in partition C (retired,
no race) — accepted under the standing verified-work-claimable policy. Key
finding: the family's argument map is NOT constant — stable positions
(narrowed a1 -> arg 9, 5th param -> arg 10) + per-row positions elsewhere
(no negu when there is no conditional selection — the discriminator
predicts it). Third selector-proving pair. Gate MATCH whole-binary SHA-1
e173426c157384ebf1b6caf8c6fea18a85a14af9.
B: 39 new this cycle. Finding 5 at its sharpest: ONE byte (ori vs addiu)
was the whole difference — a literal vs symbol with identical address.
Three-way family now: lui-high-half, name-keyed-gp, literal-vs-symbol —
all encoding-only source constructs. 0x8003EB18 duplicated-arms mechanism
(cc1 shares something even with explicit duplication — 100 vs 108) and
0x80012834 tie-break recorded. Gate MATCH whole-binary SHA-1
e173426c157384ebf1b6caf8c6fea18a85a14af9.
B: 38 new this cycle. 0x800AA01C three-way mode switch (if/else-if/else
chain — arms are exact complements: set bit 3/clear 6 vs set 6/clear 3 vs
clear both). Contrast finding: the move a0,v0 after the lookup decides
whether the flush gets the looked-up object or the original a0 — one
instruction, re-verified per family row (0x800AAC44 negative recorded).
Gate MATCH whole-binary SHA-1
e173426c157384ebf1b6caf8c6fea18a85a14af9.
B's family-target scan paid off a 3rd time: 0x80057B84 = the family's 4th
member, matched on the 2nd attempt with two levers — (1) branch-vs-
branchless discriminator (how many distinct values are selected decides
the spelling), (2) the mask must be INLINED not held in a local (here the
repeated expression is correct and the local is the mistake — mirror
image of the usual named-locals lever). Two negatives recorded
(0x800179E0 guard polarity, 0x800C1E54 dead local). Gate MATCH whole-
binary SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9.
B 4-for-4 first attempt via the family-as-a-set lever (scan for rows
calling the same target after a match; the argument map is paid once).
Three siblings of 0x80057748 (selectors 11/4/16, some with the 5th
incoming arg as outgoing arg 10) plus 0x8006B66C (0x8006B1CC sibling with
a per-node flag test). Byte-identical-pair-teaching-constant-as-selector
(0x8005789C vs 0x80057C30 differ only in li a1,4 vs li a1,16). Gate MATCH
whole-binary SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9.
Christopher Williams